DE202017105363U1 - Auswerten von Eingangsdatenseltenheit in Berechnungseinheiten eines neuronalen Netzes - Google Patents

Auswerten von Eingangsdatenseltenheit in Berechnungseinheiten eines neuronalen Netzes Download PDF

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DE202017105363U1
DE202017105363U1 DE202017105363.6U DE202017105363U DE202017105363U1 DE 202017105363 U1 DE202017105363 U1 DE 202017105363U1 DE 202017105363 U DE202017105363 U DE 202017105363U DE 202017105363 U1 DE202017105363 U1 DE 202017105363U1
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DE202017105363.6U 2016-10-27 2017-09-06 Auswerten von Eingangsdatenseltenheit in Berechnungseinheiten eines neuronalen Netzes Active DE202017105363U1 (de)

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US15/336,066 2016-10-27
US15/336,066 US10360163B2 (en) 2016-10-27 2016-10-27 Exploiting input data sparsity in neural network compute units
US15/465,774 US9818059B1 (en) 2016-10-27 2017-03-22 Exploiting input data sparsity in neural network compute units
US15/465,774 2017-03-22

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KR (4) KR102679563B1 (https=)
CN (2) CN114595803B (https=)
DE (2) DE202017105363U1 (https=)
HK (1) HK1254700A1 (https=)
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Families Citing this family (115)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9959498B1 (en) 2016-10-27 2018-05-01 Google Llc Neural network instruction set architecture
US10175980B2 (en) 2016-10-27 2019-01-08 Google Llc Neural network compute tile
US10360163B2 (en) 2016-10-27 2019-07-23 Google Llc Exploiting input data sparsity in neural network compute units
US10685285B2 (en) * 2016-11-23 2020-06-16 Microsoft Technology Licensing, Llc Mirror deep neural networks that regularize to linear networks
CN108205519B (zh) * 2016-12-20 2022-01-25 上海寒武纪信息科技有限公司 矩阵乘加运算装置和方法、处理装置、芯片、电子装置
US11328037B2 (en) * 2017-07-07 2022-05-10 Intel Corporation Memory-size- and bandwidth-efficient method for feeding systolic array matrix multipliers
TWI680409B (zh) * 2017-07-08 2019-12-21 英屬開曼群島商意騰科技股份有限公司 適用於人工神經網路之矩陣及向量相乘的方法
US10790828B1 (en) 2017-07-21 2020-09-29 X Development Llc Application specific integrated circuit accelerators
US10879904B1 (en) 2017-07-21 2020-12-29 X Development Llc Application specific integrated circuit accelerators
US10725740B2 (en) * 2017-08-31 2020-07-28 Qualcomm Incorporated Providing efficient multiplication of sparse matrices in matrix-processor-based devices
US11574171B2 (en) 2017-11-06 2023-02-07 Imagination Technologies Limited Neural network architecture using convolution engines
WO2019090325A1 (en) 2017-11-06 2019-05-09 Neuralmagic, Inc. Methods and systems for improved transforms in convolutional neural networks
US20190156214A1 (en) 2017-11-18 2019-05-23 Neuralmagic Inc. Systems and methods for exchange of data in distributed training of machine learning algorithms
US10936942B2 (en) 2017-11-21 2021-03-02 Google Llc Apparatus and mechanism for processing neural network tasks using a single chip package with multiple identical dies
CN111738431B (zh) * 2017-12-11 2024-03-05 中科寒武纪科技股份有限公司 神经网络运算设备和方法
US10553207B2 (en) * 2017-12-29 2020-02-04 Facebook, Inc. Systems and methods for employing predication in computational models
CN111788583B (zh) * 2018-02-09 2024-12-20 渊慧科技有限公司 连续稀疏性模式神经网络
CN111742331B (zh) * 2018-02-16 2024-09-24 三星电子株式会社 神经网络加速器
US10572568B2 (en) 2018-03-28 2020-02-25 Intel Corporation Accelerator for sparse-dense matrix multiplication
US10832133B2 (en) 2018-05-31 2020-11-10 Neuralmagic Inc. System and method of executing neural networks
US10963787B2 (en) 2018-05-31 2021-03-30 Neuralmagic Inc. Systems and methods for generation of sparse code for convolutional neural networks
US11449363B2 (en) 2018-05-31 2022-09-20 Neuralmagic Inc. Systems and methods for improved neural network execution
US11216732B2 (en) 2018-05-31 2022-01-04 Neuralmagic Inc. Systems and methods for generation of sparse code for convolutional neural networks
WO2021054990A1 (en) * 2019-09-16 2021-03-25 Neuralmagic Inc. Systems and methods for generation of sparse code for convolutional neural networks
US10599429B2 (en) * 2018-06-08 2020-03-24 Intel Corporation Variable format, variable sparsity matrix multiplication instruction
US12481861B2 (en) * 2018-07-12 2025-11-25 International Business Machines Corporation Hierarchical parallelism in a network of distributed neural network cores
WO2020014590A1 (en) * 2018-07-12 2020-01-16 Futurewei Technologies, Inc. Generating a compressed representation of a neural network with proficient inference speed and power consumption
CN110796244B (zh) * 2018-08-01 2022-11-08 上海天数智芯半导体有限公司 用于人工智能设备的核心计算单元处理器及加速处理方法
CN109344964B (zh) * 2018-08-08 2020-12-29 东南大学 一种适用于神经网络的乘加计算方法和计算电路
CN110826707B (zh) * 2018-08-10 2023-10-31 北京百度网讯科技有限公司 应用于卷积神经网络的加速方法和硬件加速器
US12205012B2 (en) * 2018-08-24 2025-01-21 Samsung Electronics Co., Ltd. Method of accelerating training process of neural network and neural network device thereof
JP6985997B2 (ja) * 2018-08-27 2021-12-22 株式会社日立製作所 機械学習システムおよびボルツマンマシンの計算方法
US12443833B2 (en) 2018-08-27 2025-10-14 Red Hat, Inc. Systems and methods for neural network convolutional layer matrix multiplication using cache memory
CN112789626B (zh) * 2018-09-27 2024-11-08 渊慧科技有限公司 可扩展和压缩的神经网络数据储存系统
US11586417B2 (en) 2018-09-28 2023-02-21 Qualcomm Incorporated Exploiting activation sparsity in deep neural networks
WO2020072274A1 (en) 2018-10-01 2020-04-09 Neuralmagic Inc. Systems and methods for neural network pruning with accuracy preservation
CN111026440B (zh) * 2018-10-09 2022-03-29 上海寒武纪信息科技有限公司 运算方法、装置、计算机设备和存储介质
JP7115211B2 (ja) * 2018-10-18 2022-08-09 富士通株式会社 演算処理装置および演算処理装置の制御方法
CN111126081B (zh) * 2018-10-31 2023-07-21 深圳永德利科技股份有限公司 全球通用语言终端及方法
US10768895B2 (en) 2018-11-08 2020-09-08 Movidius Limited Dot product calculators and methods of operating the same
KR102809535B1 (ko) * 2018-11-13 2025-05-22 삼성전자주식회사 뉴럴 네트워크를 이용한 데이터 처리 방법 및 이를 지원하는 전자 장치
US11663001B2 (en) * 2018-11-19 2023-05-30 Advanced Micro Devices, Inc. Family of lossy sparse load SIMD instructions
US11361050B2 (en) 2018-11-20 2022-06-14 Hewlett Packard Enterprise Development Lp Assigning dependent matrix-vector multiplication operations to consecutive crossbars of a dot product engine
EP3895071A1 (en) * 2018-12-11 2021-10-20 Mipsology SAS Accelerating artificial neural network computations by skipping input values
US10769527B2 (en) 2018-12-11 2020-09-08 Mipsology SAS Accelerating artificial neural network computations by skipping input values
JP7189000B2 (ja) * 2018-12-12 2022-12-13 日立Astemo株式会社 情報処理装置、車載制御装置、車両制御システム
KR102833321B1 (ko) * 2018-12-12 2025-07-10 삼성전자주식회사 뉴럴 네트워크에서 컨볼루션 연산을 수행하는 방법 및 장치
KR102721579B1 (ko) * 2018-12-31 2024-10-25 에스케이하이닉스 주식회사 프로세싱 시스템
US11544559B2 (en) 2019-01-08 2023-01-03 Neuralmagic Inc. System and method for executing convolution in a neural network
US11604958B2 (en) 2019-03-13 2023-03-14 Samsung Electronics Co., Ltd. Method and apparatus for processing computation of zero value in processing of layers in neural network
WO2020190814A1 (en) 2019-03-15 2020-09-24 Intel Corporation Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format
KR102838677B1 (ko) * 2019-03-15 2025-07-25 인텔 코포레이션 매트릭스 가속기 아키텍처를 위한 희소 최적화
KR102746968B1 (ko) * 2019-03-20 2024-12-27 에스케이하이닉스 주식회사 신경망 가속 장치 및 그것의 동작 방법
KR102749978B1 (ko) * 2019-05-10 2025-01-03 삼성전자주식회사 피처맵 데이터에 대한 압축을 수행하는 뉴럴 네트워크 프로세서 및 이를 포함하는 컴퓨팅 시스템
US11301545B2 (en) * 2019-07-11 2022-04-12 Facebook Technologies, Llc Power efficient multiply-accumulate circuitry
US20210026686A1 (en) * 2019-07-22 2021-01-28 Advanced Micro Devices, Inc. Chiplet-integrated machine learning accelerators
US11195095B2 (en) 2019-08-08 2021-12-07 Neuralmagic Inc. System and method of accelerating execution of a neural network
US12061971B2 (en) 2019-08-12 2024-08-13 Micron Technology, Inc. Predictive maintenance of automotive engines
US11635893B2 (en) * 2019-08-12 2023-04-25 Micron Technology, Inc. Communications between processors and storage devices in automotive predictive maintenance implemented via artificial neural networks
US12249189B2 (en) 2019-08-12 2025-03-11 Micron Technology, Inc. Predictive maintenance of automotive lighting
US12497055B2 (en) 2019-08-21 2025-12-16 Micron Technology, Inc. Monitoring controller area network bus for vehicle control
US11042350B2 (en) 2019-08-21 2021-06-22 Micron Technology, Inc. Intelligent audio control in vehicles
KR20210024865A (ko) * 2019-08-26 2021-03-08 삼성전자주식회사 데이터를 처리하는 방법 및 장치
US12210401B2 (en) 2019-09-05 2025-01-28 Micron Technology, Inc. Temperature based optimization of data storage operations
US11651209B1 (en) * 2019-10-02 2023-05-16 Google Llc Accelerated embedding layer computations
KR102808579B1 (ko) * 2019-10-16 2025-05-16 삼성전자주식회사 뉴럴 네트워크에서 연산을 수행하는 방법 및 장치
JP7462140B2 (ja) * 2019-10-29 2024-04-05 国立大学法人 熊本大学 ニューラルネットワーク回路及びニューラルネットワーク演算方法
JP7299134B2 (ja) * 2019-11-05 2023-06-27 ルネサスエレクトロニクス株式会社 データ処理装置及びその動作方法、プログラム
US11244198B2 (en) 2019-11-21 2022-02-08 International Business Machines Corporation Input partitioning for deep learning of large image data
US11250648B2 (en) 2019-12-18 2022-02-15 Micron Technology, Inc. Predictive maintenance of automotive transmission
FR3105659B1 (fr) 2019-12-18 2022-06-24 Commissariat Energie Atomique Procédé et dispositif de codage binaire de signaux pour implémenter des opérations MAC numériques à précision dynamique
KR102268817B1 (ko) * 2019-12-19 2021-06-24 국민대학교산학협력단 분산 클라우드 환경에서의 기계 학습 성능 평가 방법 및 장치
KR20210086233A (ko) * 2019-12-31 2021-07-08 삼성전자주식회사 완화된 프루닝을 통한 행렬 데이터 처리 방법 및 그 장치
US12566958B2 (en) 2020-01-14 2026-03-03 Red Hat, Inc. System and method of training a neural network
TWI727641B (zh) * 2020-02-03 2021-05-11 華邦電子股份有限公司 記憶體裝置及其操作方法
US11586601B2 (en) * 2020-02-05 2023-02-21 Alibaba Group Holding Limited Apparatus and method for representation of a sparse matrix in a neural network
US11604975B2 (en) 2020-04-09 2023-03-14 Apple Inc. Ternary mode of planar engine for neural processor
CN111445013B (zh) * 2020-04-28 2023-04-25 南京大学 一种针对卷积神经网络的非零探测器及其方法
US12530573B1 (en) 2020-05-19 2026-01-20 Red Hat, Inc. Efficient execution of group-sparsified neural networks
KR102418794B1 (ko) * 2020-06-02 2022-07-08 오픈엣지테크놀로지 주식회사 하드웨어 가속기를 위한 파라미터를 메모리로부터 액세스하는 방법 및 이를 이용한 장치
CN113835675A (zh) * 2020-06-23 2021-12-24 深圳市中兴微电子技术有限公司 数据处理装置及数据处理方法
US20220012304A1 (en) * 2020-07-07 2022-01-13 Sudarshan Kumar Fast matrix multiplication
CN115843365A (zh) * 2020-07-17 2023-03-24 索尼集团公司 神经网络处理装置、信息处理装置、信息处理系统、电子设备、神经网络处理方法和程序
KR102871496B1 (ko) 2020-07-17 2025-10-14 삼성전자주식회사 뉴럴 네트워크 장치 및 그의 동작 방법
CA3186225A1 (en) 2020-07-21 2022-01-27 Mostafa MAHMOUD System and method for using sparsity to accelerate deep learning networks
US11928176B2 (en) * 2020-07-30 2024-03-12 Arm Limited Time domain unrolling sparse matrix multiplication system and method
US12386683B2 (en) * 2020-09-08 2025-08-12 Technion Research And Development Foundation Ltd. Non-blocking simultaneous multithreading (NB-SMT)
JPWO2022070947A1 (https=) 2020-09-30 2022-04-07
US12229659B2 (en) 2020-10-08 2025-02-18 Samsung Electronics Co., Ltd. Processor with outlier accommodation
KR102900550B1 (ko) * 2020-10-14 2025-12-16 삼성전자주식회사 가속기 및 이를 포함한 전자 장치
US20210042617A1 (en) * 2020-10-27 2021-02-11 Intel Corporation Accelerated loading of unstructured sparse data in machine learning architectures
US11861327B2 (en) * 2020-11-11 2024-01-02 Samsung Electronics Co., Ltd. Processor for fine-grain sparse integer and floating-point operations
US11861328B2 (en) * 2020-11-11 2024-01-02 Samsung Electronics Co., Ltd. Processor for fine-grain sparse integer and floating-point operations
CN115552396A (zh) * 2020-11-30 2022-12-30 谷歌有限责任公司 具有多个累加器的脉动阵列单元
US11556757B1 (en) 2020-12-10 2023-01-17 Neuralmagic Ltd. System and method of executing deep tensor columns in neural networks
US20230306243A1 (en) * 2020-12-10 2023-09-28 Neuronix AI Labs Inc. Neural networks processing units weight sparsity removal
CN112862086B (zh) * 2020-12-25 2025-01-24 南京蓝洋智能科技有限公司 一种神经网络运算处理方法、装置及计算机可读介质
KR102541461B1 (ko) 2021-01-11 2023-06-12 한국과학기술원 저전력 고성능 인공 신경망 학습 가속기 및 가속 방법
US12210663B2 (en) * 2021-01-13 2025-01-28 University Of Florida Research Foundation, Inc. Decommissioning and erasing entropy in microelectronic systems
US11853717B2 (en) * 2021-01-14 2023-12-26 Microsoft Technology Licensing, Llc Accelerating processing based on sparsity for neural network hardware processors
US20220253692A1 (en) * 2021-02-05 2022-08-11 Samsung Electronics Co., Ltd. Method and apparatus of operating a neural network
TWI847030B (zh) * 2021-05-05 2024-07-01 創鑫智慧股份有限公司 矩陣乘法器及其操作方法
US11940907B2 (en) * 2021-06-25 2024-03-26 Intel Corporation Methods and apparatus for sparse tensor storage for neural network accelerators
US12555036B2 (en) * 2021-08-20 2026-02-17 Xilinx, Inc. Weight sparsity in data processing engines
US20220012012A1 (en) * 2021-09-24 2022-01-13 Martin Langhammer Systems and Methods for Sparsity Operations in a Specialized Processing Block
US11669489B2 (en) * 2021-09-30 2023-06-06 International Business Machines Corporation Sparse systolic array design
US11960982B1 (en) 2021-10-21 2024-04-16 Neuralmagic, Inc. System and method of determining and executing deep tensor columns in neural networks
US12494051B2 (en) * 2021-11-16 2025-12-09 Canon Kabushiki Kaisha Apparatus for performing filter processing using convolution operation, method of performing filter processing, and medium
CN114499537A (zh) * 2022-01-17 2022-05-13 奥比中光科技集团股份有限公司 一种数据压缩和解压缩方法及装置
KR102729077B1 (ko) * 2022-03-10 2024-11-13 리벨리온 주식회사 뉴럴 프로세싱 장치
CN116804973B (zh) * 2022-03-18 2024-06-18 深圳鲲云信息科技有限公司 地址生成装置、方法、数据缓存器和人工智能芯片
US20230073661A1 (en) * 2022-11-14 2023-03-09 Intel Corporation Accelerating data load and computation in frontend convolutional layer
US20240119269A1 (en) * 2023-12-18 2024-04-11 Arnab Raha Dynamic sparsity-based acceleration of neural networks
TWI898651B (zh) * 2024-06-12 2025-09-21 新加坡商艾沛芯科技股份有限公司 記憶體裝置及其操作方法
US20260111173A1 (en) * 2024-10-17 2026-04-23 Edgecortix Inc. On-chip non-zero value unpacking and distribution

Family Cites Families (72)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3754128A (en) 1971-08-31 1973-08-21 M Corinthios High speed signal processor for vector transformation
JPS4874139A (https=) * 1971-12-29 1973-10-05
JPS5364439A (en) * 1976-11-20 1978-06-08 Agency Of Ind Science & Technol Linear coversion system
JPS58134357A (ja) 1982-02-03 1983-08-10 Hitachi Ltd ベクトルプロセッサ
EP0156648B1 (en) 1984-03-29 1992-09-30 Kabushiki Kaisha Toshiba Convolution arithmetic circuit for digital signal processing
US5267185A (en) 1989-04-14 1993-11-30 Sharp Kabushiki Kaisha Apparatus for calculating matrices
JPH0748207B2 (ja) * 1989-04-14 1995-05-24 シャープ株式会社 行列演算装置
US5138695A (en) 1989-10-10 1992-08-11 Hnc, Inc. Systolic array image processing system
JPH03167664A (ja) 1989-11-28 1991-07-19 Nec Corp マトリクス演算回路
WO1991019248A1 (en) 1990-05-30 1991-12-12 Adaptive Solutions, Inc. Neural network using virtual-zero
WO1991019267A1 (en) 1990-06-06 1991-12-12 Hughes Aircraft Company Neural network processor
US5287464A (en) 1990-10-24 1994-02-15 Zilog, Inc. Semiconductor multi-device system with logic means for controlling the operational mode of a set of input/output data bus drivers
JP3318753B2 (ja) 1991-12-05 2002-08-26 ソニー株式会社 積和演算装置および積和演算方法
AU658066B2 (en) * 1992-09-10 1995-03-30 Deere & Company Neural network based control system
JPH06139218A (ja) 1992-10-30 1994-05-20 Hitachi Ltd ディジタル集積回路を用いて神経回路網を完全に並列にシミュレートするための方法及び装置
US6067536A (en) * 1996-05-30 2000-05-23 Matsushita Electric Industrial Co., Ltd. Neural network for voice and pattern recognition
US5742741A (en) 1996-07-18 1998-04-21 Industrial Technology Research Institute Reconfigurable neural network
US5905757A (en) 1996-10-04 1999-05-18 Motorola, Inc. Filter co-processor
US6243734B1 (en) 1998-10-30 2001-06-05 Intel Corporation Computer product and method for sparse matrices
JP2001117900A (ja) 1999-10-19 2001-04-27 Fuji Xerox Co Ltd ニューラルネットワーク演算装置
US20020044695A1 (en) * 2000-05-05 2002-04-18 Bostrom Alistair K. Method for wavelet-based compression of video images
JP2003244190A (ja) 2002-02-19 2003-08-29 Matsushita Electric Ind Co Ltd データフロー制御スイッチ用プロセッサ及びデータフロー制御スイッチ
US7016529B2 (en) * 2002-03-15 2006-03-21 Microsoft Corporation System and method facilitating pattern recognition
US7493498B1 (en) * 2002-03-27 2009-02-17 Advanced Micro Devices, Inc. Input/output permission bitmaps for compartmentalized security
US7426501B2 (en) 2003-07-18 2008-09-16 Knowntech, Llc Nanotechnology neural network methods and systems
US7818729B1 (en) * 2003-09-15 2010-10-19 Thomas Plum Automated safe secure techniques for eliminating undefined behavior in computer software
US7693299B2 (en) 2004-01-13 2010-04-06 New York University Method, system, storage medium, and data structure for image recognition using multilinear independent component analysis
GB2436377B (en) 2006-03-23 2011-02-23 Cambridge Display Tech Ltd Data processing hardware
CN101441441B (zh) * 2007-11-21 2010-06-30 新乡市起重机厂有限公司 起重机智能防摇控制系统的设计方法
JP4513865B2 (ja) 2008-01-25 2010-07-28 セイコーエプソン株式会社 並列演算装置および並列演算方法
EP2283578A1 (en) 2008-05-21 2011-02-16 Nxp B.V. A data handling system comprising memory banks and data rearrangement
US8321652B2 (en) * 2008-08-01 2012-11-27 Infineon Technologies Ag Process and method for logical-to-physical address mapping using a volatile memory device in solid state disks
EP2290563B1 (en) * 2009-08-28 2017-12-13 Accenture Global Services Limited Accessing content in a network
US8589600B2 (en) 2009-12-14 2013-11-19 Maxeler Technologies, Ltd. Method of transferring data with offsets
US8595467B2 (en) 2009-12-29 2013-11-26 International Business Machines Corporation Floating point collect and operate
US8676874B2 (en) 2010-12-06 2014-03-18 International Business Machines Corporation Data structure for tiling and packetizing a sparse matrix
US8457767B2 (en) * 2010-12-31 2013-06-04 Brad Radl System and method for real-time industrial process modeling
US8977629B2 (en) 2011-05-24 2015-03-10 Ebay Inc. Image-based popularity prediction
US8806171B2 (en) 2011-05-24 2014-08-12 Georgia Tech Research Corporation Systems and methods providing wear leveling using dynamic randomization for non-volatile memory
US8812414B2 (en) 2011-05-31 2014-08-19 International Business Machines Corporation Low-power event-driven neural computing architecture in neural networks
US8909576B2 (en) 2011-09-16 2014-12-09 International Business Machines Corporation Neuromorphic event-driven neural computing architecture in a scalable neural network
US9201828B2 (en) 2012-10-23 2015-12-01 Analog Devices, Inc. Memory interconnect network architecture for vector processor
US9606797B2 (en) 2012-12-21 2017-03-28 Intel Corporation Compressing execution cycles for divergent execution in a single instruction multiple data (SIMD) processor
US9921832B2 (en) 2012-12-28 2018-03-20 Intel Corporation Instruction to reduce elements in a vector register with strided access pattern
US20150067273A1 (en) * 2013-08-30 2015-03-05 Microsoft Corporation Computation hardware with high-bandwidth memory interface
US9477628B2 (en) 2013-09-28 2016-10-25 Intel Corporation Collective communications apparatus and method for parallel systems
CN103761213A (zh) * 2014-02-14 2014-04-30 上海交通大学 基于循环流水计算的片上阵列系统
US9323525B2 (en) 2014-02-26 2016-04-26 Intel Corporation Monitoring vector lane duty cycle for dynamic optimization
CN103970720B (zh) * 2014-05-30 2018-02-02 东南大学 基于大规模粗粒度嵌入式可重构系统及其处理方法
EP3186753B1 (en) * 2014-08-29 2021-04-28 Google LLC Processing images using deep neural networks
CN104463209B (zh) * 2014-12-08 2017-05-24 福建坤华仪自动化仪器仪表有限公司 一种基于bp神经网络的pcb板上数字代码识别方法
US9666257B2 (en) 2015-04-24 2017-05-30 Intel Corporation Bitcell state retention
US10013652B2 (en) * 2015-04-29 2018-07-03 Nuance Communications, Inc. Fast deep neural network feature transformation via optimized memory bandwidth utilization
US10489703B2 (en) 2015-05-20 2019-11-26 Nec Corporation Memory efficiency for convolutional neural networks operating on graphics processing units
CN107690663B (zh) * 2015-06-05 2022-04-12 渊慧科技有限公司 白化神经网络层
US10275393B2 (en) 2015-10-08 2019-04-30 Via Alliance Semiconductor Co., Ltd. Tri-configuration neural network unit
CN205139973U (zh) * 2015-10-26 2016-04-06 中国人民解放军军械工程学院 基于fpga器件构建的bp神经网络
US9875104B2 (en) 2016-02-03 2018-01-23 Google Llc Accessing data in multi-dimensional tensors
US10552119B2 (en) 2016-04-29 2020-02-04 Intel Corporation Dynamic management of numerical representation in a distributed matrix processor architecture
GB201607713D0 (en) * 2016-05-03 2016-06-15 Imagination Tech Ltd Convolutional neural network
CN106023065B (zh) * 2016-05-13 2019-02-19 中国矿业大学 一种基于深度卷积神经网络的张量型高光谱图像光谱-空间降维方法
CN106127297B (zh) 2016-06-02 2019-07-12 中国科学院自动化研究所 基于张量分解的深度卷积神经网络的加速与压缩方法
US9959498B1 (en) 2016-10-27 2018-05-01 Google Llc Neural network instruction set architecture
US10175980B2 (en) 2016-10-27 2019-01-08 Google Llc Neural network compute tile
US10360163B2 (en) 2016-10-27 2019-07-23 Google Llc Exploiting input data sparsity in neural network compute units
US10733505B2 (en) 2016-11-10 2020-08-04 Google Llc Performing kernel striding in hardware
CN106529511B (zh) 2016-12-13 2019-12-10 北京旷视科技有限公司 图像结构化方法及装置
US10037490B2 (en) 2016-12-13 2018-07-31 Google Llc Performing average pooling in hardware
US20180189675A1 (en) 2016-12-31 2018-07-05 Intel Corporation Hardware accelerator architecture and template for web-scale k-means clustering
US11164071B2 (en) 2017-04-18 2021-11-02 Samsung Electronics Co., Ltd. Method and apparatus for reducing computational complexity of convolutional neural networks
US10572409B1 (en) 2018-05-10 2020-02-25 Xilinx, Inc. Sparse matrix processing circuitry
CN113383346A (zh) * 2018-12-18 2021-09-10 莫维迪厄斯有限公司 神经网络压缩

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