JPWO2022070947A1 - - Google Patents
Info
- Publication number
- JPWO2022070947A1 JPWO2022070947A1 JP2022553812A JP2022553812A JPWO2022070947A1 JP WO2022070947 A1 JPWO2022070947 A1 JP WO2022070947A1 JP 2022553812 A JP2022553812 A JP 2022553812A JP 2022553812 A JP2022553812 A JP 2022553812A JP WO2022070947 A1 JPWO2022070947 A1 JP WO2022070947A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
- G06F7/5443—Sum of products
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/78—Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
- G06N3/0464—Convolutional networks [CNN, ConvNet]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/067—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using optical means
- G06N3/0675—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using optical means using electro-optical, acousto-optical or opto-electronic means
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/80—Camera processing pipelines; Components thereof
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Computing Systems (AREA)
- Biophysics (AREA)
- General Engineering & Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biomedical Technology (AREA)
- Data Mining & Analysis (AREA)
- Signal Processing (AREA)
- Multimedia (AREA)
- Software Systems (AREA)
- Mathematical Analysis (AREA)
- Artificial Intelligence (AREA)
- Computational Linguistics (AREA)
- Pure & Applied Mathematics (AREA)
- Evolutionary Computation (AREA)
- General Health & Medical Sciences (AREA)
- Molecular Biology (AREA)
- Mathematical Optimization (AREA)
- Computational Mathematics (AREA)
- Neurology (AREA)
- Algebra (AREA)
- Databases & Information Systems (AREA)
- Image Processing (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2020166280 | 2020-09-30 | ||
| PCT/JP2021/034103 WO2022070947A1 (ja) | 2020-09-30 | 2021-09-16 | 信号処理装置、撮像装置、信号処理方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPWO2022070947A1 true JPWO2022070947A1 (https=) | 2022-04-07 |
Family
ID=80950317
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022553812A Abandoned JPWO2022070947A1 (https=) | 2020-09-30 | 2021-09-16 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20230333816A1 (https=) |
| JP (1) | JPWO2022070947A1 (https=) |
| CN (1) | CN116210228A (https=) |
| DE (1) | DE112021005190T5 (https=) |
| WO (1) | WO2022070947A1 (https=) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20220150319A (ko) * | 2020-03-06 | 2022-11-10 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 촬상 장치 및 전자 기기 |
| US20220253692A1 (en) * | 2021-02-05 | 2022-08-11 | Samsung Electronics Co., Ltd. | Method and apparatus of operating a neural network |
| US11979674B2 (en) * | 2022-09-08 | 2024-05-07 | Micron Technology, Inc. | Image enhancement using integrated circuit devices having analog inference capability |
| US12266184B2 (en) * | 2022-09-08 | 2025-04-01 | Micron Technology, Inc. | Surveillance cameras implemented using integrated circuit devices having analog inference capability |
| US12538048B2 (en) * | 2022-09-08 | 2026-01-27 | Micron Technology, Inc. | Image sensor with analog inference capability |
| US12437810B2 (en) * | 2022-11-29 | 2025-10-07 | Micron Technology, Inc. | Memory device performing multiplication using logical states of memory cells |
| WO2024162015A1 (ja) * | 2023-02-03 | 2024-08-08 | ソニーセミコンダクタソリューションズ株式会社 | 撮像装置、データ処理方法、及び、記録媒体 |
| US20240304255A1 (en) * | 2023-03-09 | 2024-09-12 | Micron Technology, Inc. | Memory device for multiplication using memory cells with different thresholds based on bit significance |
| JP7696532B2 (ja) * | 2023-05-17 | 2025-06-20 | 三菱電機モビリティ株式会社 | 異常判定装置、および、異常判定方法 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4546157B2 (ja) * | 2004-06-03 | 2010-09-15 | キヤノン株式会社 | 情報処理方法、情報処理装置、撮像装置 |
| GB2474901B (en) * | 2009-10-30 | 2015-01-07 | Advanced Risc Mach Ltd | Apparatus and method for performing multiply-accumulate operations |
| US10360163B2 (en) | 2016-10-27 | 2019-07-23 | Google Llc | Exploiting input data sparsity in neural network compute units |
| KR102415508B1 (ko) * | 2017-03-28 | 2022-07-01 | 삼성전자주식회사 | 컨볼루션 신경망 처리 방법 및 장치 |
| CN107622305A (zh) * | 2017-08-24 | 2018-01-23 | 中国科学院计算技术研究所 | 用于神经网络的处理器和处理方法 |
| US10943652B2 (en) * | 2018-05-22 | 2021-03-09 | The Regents Of The University Of Michigan | Memory processing unit |
| US11663001B2 (en) * | 2018-11-19 | 2023-05-30 | Advanced Micro Devices, Inc. | Family of lossy sparse load SIMD instructions |
| CN111669527B (zh) * | 2020-07-01 | 2021-06-08 | 浙江大学 | 一种cmos图像传感器内的卷积运算电路 |
-
2021
- 2021-09-16 JP JP2022553812A patent/JPWO2022070947A1/ja not_active Abandoned
- 2021-09-16 WO PCT/JP2021/034103 patent/WO2022070947A1/ja not_active Ceased
- 2021-09-16 DE DE112021005190.3T patent/DE112021005190T5/de active Pending
- 2021-09-16 CN CN202180065035.1A patent/CN116210228A/zh active Pending
- 2021-09-16 US US18/042,395 patent/US20230333816A1/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| CN116210228A (zh) | 2023-06-02 |
| DE112021005190T5 (de) | 2023-09-14 |
| WO2022070947A1 (ja) | 2022-04-07 |
| US20230333816A1 (en) | 2023-10-19 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20240821 |
|
| A762 | Written abandonment of application |
Free format text: JAPANESE INTERMEDIATE CODE: A762 Effective date: 20250521 |