DE2015643A1 - Process for the production of multilayer electrical circuit panels - Google Patents

Description

2Q1 & 643

April 1, 1970 '■

Dr.Schie / E

Docket EN 968 042

USSerial Έο. 812

Applicant: International Business Machines Corporation, Armonk, N.T. 10504 (V.St.A.).-.... "

Representative! Patent attorney Dr.-Ing. Rudolf Schiering, 7030 Böblingen / Württ., Westerwaldweg 4

Process for the production of multilayer circuit panels

The invention relates to a method for producing Multilayer Stroinkkreispaneln · It particularly relates to a process for the production of multilayer printed circuits, involving additional methods for formation the conductor is used within each layer or layer · The conductors are formed by metallic deposition over photosensitive masks, which, one after the other removed and replaced by liquid dielectrics will. These liquid dielectrics are converted into a solid form. In the invention, additional Layers formed one after the other by repetition of the procedure.

Process for the production of multilayer circuit panels have already become known from American patents 3,350,498 and 3,405,227. In addition, a such a method in IBM Technical Disclosure Bulletins, September 1967, Volume 10, Issue 4, pages 359 to 360 and in April 1966, Volume 8, Issue 11, page 1482

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wrote. Furthermore, the method on which the invention is based was also published in December 1959 (Volume 2, Issue 4) on pages 7 and 8 in the IBM Technical Disclosure Bulletins. In these procedures that have become known however, it is not used by liquid dielectrics and their conversion made use of in the solid state.

With continued efforts in practice to further reduce the size of multi-layer printed To get to circuit panels, the problem of interconnection layers becomes more and more difficult · The previous ones P methods for making such circuits lead in particular then to difficulties where holes have to be drilled in certain places to insert conductor pins, if these circuits are to be particularly small. These difficulties in making miniature circuits and to overcome it when building multi-layer systems, is the object on which the invention is based.

The construction of the vertical interconnections and The layers of circuit lines can be built up by either one or two processes. In which In one process, a photo cover layer is selectively exposed on a layer of conductive material, in particular copper. Then the top layer is developed and the metal is selectively etched so that in the desired places Circuit conductors or pins are left over. The remaining photo opacifier is removed and the etched areas are then filled in by pressing an insulating material onto the surface. After that, the isolation away from the upper toil of the pipes.

Another layer of metal is added to this soldering tube; and Ii'i BLLduiiK dor photo protective layer and the var-

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The etching steps are repeated on the next well of circuits or pins. Successive layers of pins or conductors can be added in a similar manner.

In a second method of forming circuit conductors an insulating paste is then applied to a substrate by etching or shielding. This paste consists, for example, of a resin that is applied to selected areas of the surface. Portions of the circuit conductors under the resin are exposed to form pins. Across the entire surface of the insulator is made a '. thin layer of conductive material applied. The exposed circuit conductors and portions of conductive material are masked. The unmasked parts are then electroplated built up. . . '

By, niehtmaskierende parts of the conductive material in the form of circuit conductors, a second circuit layer is then formed and the structure fortgeführtο The mask corresponds ■ .fernt _r and the conductive material is not clad path · etched. Most circuit conductors and pins are made by plating, so the latter process is an additional process. '. . ':

The characteristic properties of the well-known, subtractive Processes greatly limit the extent of miniaturization that can be achieved. A major disadvantage here is the difficulty in controlling the undercut and the uniformity of the etch for fine conductors. A second disadvantage is due to the pressing in of the sheet-shaped Given isolator. This procedure leads to breaks "at Pins or circuit conductors. Furthermore, in the known method in the vicinity of edges of the conductor and Pins itch and cavities arise because of the isolation.

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does not fit in everywhere when pressed in. The emergence of gaps, pores or cavities when press-fitting leads to an undesirable circuit impedance · In addition, at the known process wastes metal and uses numerous baths for etching and rinsing.

The additional processes overcome several disadvantages of the subtraction methods. The dissolution of ladders and pens can only be achieved by exposing and developing the photo cover layer. Only with this is a finer training of Ladders and pens possible. These processes preserve metal and also reduce the number of treatment baths. That Problem of undercut is fixed, and the number of Glass exposure originals can be reduced.

However, the known active processes still involve the difficulty of establishing the necessary ones Isolation between layers. The shielding and spraying method proposed for a paste requires because of the irregular Corners at the holes have large openings. When forming pins with diameters greater than 0.7 mm, these known processes are decisive. With smaller dimensions, however, there is the uniformity of circuit line or pin not guaranteed because of the change in cross-sectional area · If pin and conductor size are reduced, then the changes will have edge irregularities a larger proportion of the cross-sectional area of the conductor formed. This becomes the electrical Resistance and pen thickness not uniform. These values become unreliable. The production profit is accordingly low, so that the cost increases significantly.

It is then a primary object of the invention, an additional one Process for the construction of multilayer printed circuits to provide a substantial reduction

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in terms of the size of the circuit conductors and pins, in order to achieve an increase in the circuit density.

Another object of the invention is a method of forming circuit conductors and pins in which the Number of procedural steps required is reduced.

Another object of the invention is to provide a method to create multilayer printed circuits in which the insulating material is between the Circuit layers in easy flow overcomes all irregularities of the circuit level in such a way that gaps or pores or impermissible stresses on conductors and pins are avoided.

Further objects of the invention are to provide a Process for the formation of circuit conductors and pins, which leads to uniform cross-sections, namely at a wide range of sizes, and which enables a reduction in the capital required for this. Included this process is intended to allow the insulation to be positioned after the conductors have been formed in each layer.

For a method of making multi-layer circuit panels Thereafter, the invention consists in -that at least one surface of a substrate with an electrically conductive material is coated so that selected areas of this material are covered with a protective layer, that an electrically conductive material is additionally deposited on the areas not covered by the protective layer is to get there the thickness to a predetermined one Increase level that the protective layer and the conductive Material below is removed that liquid., Iaolieren- ■. '■ .. · ■■. ■■ .-. , 6 - ■

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of the material is spread on the substrate, where the protective layer and the conductive layer up to at least a depth equal to the height of the additionally applied material have been removed and that the insulating material is converted to a solid homogeneous mass.

In order to achieve the set goals, the invention uses an additional method in the formation of circuit conductors and pen used in which an electrically insulating substrate with a thin layer of electrically conductive Material is covered, that is in turn coated with a photosensitive cover layer.

The thickness of the cover layer is at least equal to that of the required minimum insulation between the circuit conductor levels. The photosensitive cover layer is irradiated with light via a main photographic plate and developed, so that the remaining photo layer covers the conductive material with the exception of those places where a circuit conductor or a pen is to be formed.

The exposed areas of the conductive material are formed by a deposition process until the top surface the developed photo layer is reached, with which the conductors or pins are formed. The developed photo top layer is then removed, leaving the built-up conductors and a thin conductive layer on the substrate. To remove the exposed thin layer, a brief acid etch is used so that only conductors are on the substrate surface remain.

A liquid or powdered insulating resin or glass is poured over the substrate surface to a depth which is at least equal to the thickness of the conductor.

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201564a

At this point the healed resin or the glass surface can ' roughened, a thin layer of conductive material added and the process repeated, to make the pins of the interconnection to the next layer.

This method of circuit construction enables the photosensitive cover layer to be reduced in size in view of the resolution. Accordingly, there is also a larger one Circuit density possible. The use of a liquid for the insulating material or a powdered insulating Material eliminates the risk of conductor breakage or damage and prevents the formation of gaps. Because of the reduction in treatment methods by baths and development stations, the necessary is also becoming Stake capital smaller. The method according to the invention also allows wide variation in the arrangement of the Circuit conductors and the pins as these can be started or terminated at any point desired.

The invention is hereinafter with reference to the drawings for an example embodiment explained in more detail:

FIGS. 1 to 6 illustrate the method steps for I.

a process for making multilayer electrical circuit panels according to the invention.

Fig. 7 shows a cross section through a multi-layer circuit panel, which has been produced by the method according to FIGS.

Referring to Fig. 1, a suitable insulating substrate 10 made of glass fabric epoxy resin or ceramic with an electrically conductive material 11, for example made of copper, quickly covered. Such a quick covering with material can through

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formed the known electrodeless deposition methods to create a layer a few microns thick. Steel of any kind can also be used as the substrate used as thin electrolytically deposited metal effective as a separating layer. The separating layer can be flash etched at the end of the process removed. This layer creates a temporary electrical circuit to all potential circuit peaks on the substrate surface.

Next, a photosensitive cover layer 12 is applied brought. This photo cover layer can be one of the commercially available photo cover layers. The application happens usually by brushing, spinning or dipping. A preferred photo cover layer is that under the name "Eiston" known product from E. I. DuPont de Nemours Co. "Riston" is in leaf shape and various Thicknesses available. This material is coated on the clad metal 11. It can be two or more than two Thicknesses are layered successively to achieve the required thickness. The thickness of the applied Photo cover layer is determined by the thickness of the circuit conductor or by the desired height of the pen

P The photo cover layer is irradiated with light via a mask in order to form the areas 13. These are crosswise connected and leave a protective layer at certain points during the metal deposition · The Areas 14 are unexposed. After development, the photo cover layer is removed, leaving the thin metal layer behind 11. This »is uncovered in those areas in which the circuit conductors and pins are constructed target. It should be noted that infrared sensitive cover layers can also be used. The one described so far Photo overlay process refers to the negative

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procedure. When using the positive method, supplies the light incident on the top layer is reversed pattern.

After the exposed photo cover layer has been developed, the layer 11, as shown in FIG. 2, becomes conductive Material 15, for example copper, added. The metal ,. application is preferably carried out by electroplating. the conductive layer 11 is used during electroplating as. an electrode so that none of them were covered with photo cover layer Areas can be built up at the same time. The photo cover layer also serves as a protective plating layer · The metal deposit is continued until · the desired Ni " veau is reached. This is usually the upper part of the cover layer 12. In Figures 2 to 7, these are electrodeless Plated layers are shown differently from the electroplated layers. However, this type of representation is only made for the sake of explanation been. It does not come into consideration ^. if the same metal is applied in both cases.

At the end of the electroplating, the remaining photo cover layer material is used removed. This is generally done by immersion in a solvent and in conjunction with a Wiping off the exposed layer. Sometimes it may be necessary to work with an ultrasonic excitation. After removing the photo cover layer, the substrate is immediately immersed in an acid etch to remove the metal 11 in the To remove areas 13 where the photo cover layer has been during electroplating. The etchant attacks that too Electrically deposited metal. Of this, however, is only a small amount affected »- 'since the time to erode the. Layer 11 is relatively short. Figure 3: "shows the substrate the ötrosjkkreis for this 2eibpuiild> .. ■

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a liquid or powdered insulating material 16 is applied as shown in Fig. 4- «The dielectric is preferably an organic thermosetting resin or a thermoplastic resin either im liquid, unhealed states or in a powdered, semi-healed B-state. For this procedure has Epoxy resin proven to be "particularly well suited · The liquid state of the resin allows the dielectric under it." the influence of gravity flows out around the circuit conductors without the need to use a pressure process. The dielectric is preferably brought to a level sufficient to cover the circuit elements. This helps ensure that each element is surrounded by insulation.

Another dielectric material with suitable properties is powdered glass of low sintering temperature, for example borosilicate. The glass powder is applied in an amount sufficient to cover the circuit elements. The sintering then takes place at a temperature of, for example, 700 to 850 ^° C. in order to form a solid mass.

The substrate, which is made of insulating material in places, is placed in a furnace in order to convert it into a solid, homogeneous state or to sinter it. Circuit conductors and pins are exposed on the upper part by removing the excess dielectric. Removal can be done by rubbing, for example by sanding and polishing or by shearing as with the microtome. The methods to be used should be effective to clean the metal surfaces sufficiently so that a good ο ir contact nut duv iiHohsbun Möt; allnchic; hl; possible iut. tf «rm JK» l-.wf »ncHf, ·, kviui ν in short cn: miaches Ai:? on voffisfliihüu aiJ-Lti, um diti surfaces d« r Sbromkr; iseleme.iUi / u

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BATH ORIGINAL

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prepare. The glass that covers the circuit elements is removed by rubbing or lapping »

The dielectric surface can be treated to make the To increase the adhesive force of the next conductor layer. this happens by common micro-recording methods, for example by steam blower, drop blower etc .. The adhesive force can also increased by inclusion of micropots in the surface with which a better binding force by mechanical means or an improved chemical bond is effected ·. The removal of the micro-sized inclusion particles from the surface by chemical means such as leaching leads to an increase in the mechanical bond.

The second layer of circuit elements is added to the first using the same sequence of process steps. According to Fig. 5, the high-speed layer 17 consists of copper, which is electrodeless up to the upper part of the first Layer of the deposited elements 13 and the annealed Resin 16 as shown in Figure 4- "" has been plated. The cured resin is preferably micro-roughened to a to achieve good adhesion of the electrodeless applied metal. Then a layer 18, the photo cover layer 18, applied and exposed at the points 19.

According to Fig. 6, the circuit elements 20 in those areas electroplated, where the unexposed photo cover layer is removed during development. The exposed Photo cover layer is then removed and layer 17 is briefly etched as described above. Liquid or powdered Resin 21 or glass is added and cured - to complete the second layer.

Figure 7 shows several layers, which one after the other in the invention Way have been built. It is too © r-

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fancy having the circuit pins or circuit conductors in any desired location in the middle of the layers can be started or stopped. Quality control and testing can be carried out on every location of circuit elements and the layer, if found damaged, can be restored or replaced or be removed

The process step in which liquid or powdered Dielectric is used is particularly advantageous because it precludes the application of pressure here to to pull the semi-solid dielectric around the conductor elements. The pressure often leads to the breakage of elements that only a few thousandths of an inch in diameter. The liquid dielectric flows easily into sharp Corners and edges and therefore provides a uniform impedance. It also provides an improved base for the Circuit panel

Claims

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Claims (16)

- 13 - Patents . experienced for the production of multiple circuit panels, characterized in that at least one surface of a substrate is coated with an electrically conductive material, that selected areas of this material are covered with a protective layer, that on the areas not covered by the protective layer, an additional electrically conductive material is deposited to increase the thickness to a predetermined level there that the protective layer and the conductive material underneath are removed, - that liquid insulating material is spread on the substrate, where the protective layer and the conductive layer to at least a depth equal to the height of the additionally applied material have been removed and that the insulating material is converted to a solid homogeneous mass. . 2.) The method according to claim 1, characterized in that the liquid, insulating material on the substrate up to is liquid to a depth sufficient to cover the additionally applied conductive material and that the insulating material is removed to a level which sufficient to cover the additionally applied conductive material " to expose the insulating material after healing 3 ·) Method according to claims 1 and 2, characterized in that the exposed surface of the insulating Material is roughened to improve the adhesive force for applying other materials 4.) Process according to claims 1 to 3 _S, characterized in that the electrically conductive material is covered with a photo-graphically sensitive substance in order to leave a protective layer in these areas after the selective exposure and development. 5.) Process according to claims 1 to 4, characterized in that that the electrically conductive layer by electrodeless deposition of metal and that in addition deposited electrically conductive material is produced by electrolytic deposition of metal 6.) Process according to claims 1 to 5 _f , characterized in that the electrically conductive layer and the additionally deposited conductive material consist of the same metal. 7.) Process according to Claims 1 to 5i, characterized in that that the electrically conductive layer and the additionally deposited conductive material of different Made of metals 8.) Process according to claims 3 to 7t characterized in that that the roughened surface and the additionally deposited conductive material with an electrically conductive material can be covered in an additional process step. 9.) Process according to claims 1 to 8, characterized in that that the insulating material consists of an organic resin, which in liquid form on the Substrate is given - 15 - 10.) Method according to claims 1 "to 8, characterized in that that the insulating material consists of an organic resin, which in powder form on the sub-, strat is given » 11.) Process according to claims 1 to 10, characterized in that that the insulating material consists of a thermosetting organic resin. 12.) Process according to claims 1 to 10, characterized in that that the insulating material made of a thermoplastic Resin consists of I 13.) Process according to claims 1 to 8, characterized in that the insulating material consists of powdered Glass is made. - '' 14.) Process according to claims 1 to 13, characterized in that that the substrate consists of an electrically insulating substance. 15 «) Method according to claims 1 to 13, characterized in that that the substrate consists of an electrically conductive substance 16.) Process according to claims 1 to 13, characterized in that that the substrate consists of both electrically conductive Parts as well as electrically insulating parts. 00 9845/164 egg soap