DE19983443B4 - Außer-der-Reihe-Snooping für Multiprozessor-Computersysteme - Google Patents
Außer-der-Reihe-Snooping für Multiprozessor-Computersysteme Download PDFInfo
- Publication number
- DE19983443B4 DE19983443B4 DE19983443T DE19983443T DE19983443B4 DE 19983443 B4 DE19983443 B4 DE 19983443B4 DE 19983443 T DE19983443 T DE 19983443T DE 19983443 T DE19983443 T DE 19983443T DE 19983443 B4 DE19983443 B4 DE 19983443B4
- Authority
- DE
- Germany
- Prior art keywords
- snoop
- order
- request
- node
- requests
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0813—Multiuser, multiprocessor or multiprocessing cache systems with a network or matrix configuration
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/130,302 US6112283A (en) | 1998-08-06 | 1998-08-06 | Out-of-order snooping for multiprocessor computer systems |
| US09/130,302 | 1998-08-06 | ||
| PCT/US1999/017040 WO2000008564A1 (en) | 1998-08-06 | 1999-07-27 | Out-of-order snooping for multiprocessor computer systems |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE19983443T1 DE19983443T1 (de) | 2001-07-26 |
| DE19983443B4 true DE19983443B4 (de) | 2007-07-19 |
Family
ID=22444049
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19983443T Expired - Fee Related DE19983443B4 (de) | 1998-08-06 | 1999-07-27 | Außer-der-Reihe-Snooping für Multiprozessor-Computersysteme |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6112283A (enExample) |
| JP (1) | JP4414096B2 (enExample) |
| AU (1) | AU5133799A (enExample) |
| DE (1) | DE19983443B4 (enExample) |
| GB (1) | GB2357867B (enExample) |
| WO (1) | WO2000008564A1 (enExample) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6574219B1 (en) * | 1998-08-06 | 2003-06-03 | Intel Corp | Passive message ordering on a decentralized ring |
| US6377582B1 (en) * | 1998-08-06 | 2002-04-23 | Intel Corporation | Decentralized ring arbitration for multiprocessor computer systems |
| US6848003B1 (en) * | 1999-11-09 | 2005-01-25 | International Business Machines Corporation | Multi-node data processing system and communication protocol that route write data utilizing a destination ID obtained from a combined response |
| US6604162B1 (en) | 2000-06-28 | 2003-08-05 | Intel Corporation | Snoop stall reduction on a microprocessor external bus |
| DE60221235T2 (de) | 2001-02-24 | 2008-04-10 | International Business Machines Corp. | Datenerfassungstechnik für die schnelle zeichengabe |
| US20030115402A1 (en) * | 2001-11-16 | 2003-06-19 | Fredrik Dahlgren | Multiprocessor system |
| JP2003271574A (ja) | 2002-03-14 | 2003-09-26 | Hitachi Ltd | 共有メモリ型マルチプロセッサシステムにおけるデータ通信方法 |
| US8185602B2 (en) | 2002-11-05 | 2012-05-22 | Newisys, Inc. | Transaction processing using multiple protocol engines in systems having multiple multi-processor clusters |
| US7069362B2 (en) * | 2003-05-12 | 2006-06-27 | International Business Machines Corporation | Topology for shared memory computer system |
| US7644237B1 (en) * | 2003-06-23 | 2010-01-05 | Mips Technologies, Inc. | Method and apparatus for global ordering to insure latency independent coherence |
| US7551564B2 (en) * | 2004-05-28 | 2009-06-23 | Intel Corporation | Flow control method and apparatus for single packet arrival on a bidirectional ring interconnect |
| US7360008B2 (en) * | 2004-12-30 | 2008-04-15 | Intel Corporation | Enforcing global ordering through a caching bridge in a multicore multiprocessor system |
| US7451231B2 (en) * | 2005-02-10 | 2008-11-11 | International Business Machines Corporation | Data processing system, method and interconnect fabric for synchronized communication in a data processing system |
| US20060176890A1 (en) * | 2005-02-10 | 2006-08-10 | International Business Machines Corporation | Data processing system, method and interconnect fabric for improved communication in a data processing system |
| US7707387B2 (en) * | 2005-06-01 | 2010-04-27 | Microsoft Corporation | Conditional execution via content addressable memory and parallel computing execution model |
| US7451297B2 (en) | 2005-06-01 | 2008-11-11 | Microsoft Corporation | Computing system and method that determines current configuration dependent on operand input from another configuration |
| US7793040B2 (en) | 2005-06-01 | 2010-09-07 | Microsoft Corporation | Content addressable memory architecture |
| JP4912789B2 (ja) * | 2006-08-18 | 2012-04-11 | 富士通株式会社 | マルチプロセッサシステム,システムボードおよびキャッシュリプレース要求処理方法 |
| JP4680851B2 (ja) * | 2006-08-18 | 2011-05-11 | 富士通株式会社 | システムコントローラ,同一アドレスリクエストキューイング防止方法および情報処理装置 |
| CN101821717A (zh) | 2007-10-18 | 2010-09-01 | Nxp股份有限公司 | 采用高速缓存一致性负荷测试控制的电路和方法 |
| WO2012077169A1 (ja) * | 2010-12-06 | 2012-06-14 | 富士通株式会社 | 情報処理システムおよび情報送信方法 |
| US8635411B2 (en) * | 2011-07-18 | 2014-01-21 | Arm Limited | Data processing apparatus and method for managing coherency of cached data |
| JP6003607B2 (ja) * | 2012-12-14 | 2016-10-05 | 富士通株式会社 | サーバ装置 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE68925470T2 (de) * | 1988-12-05 | 1996-08-14 | Ibm | Verfahren zum Abrufen von potentiell ungültigen Daten in einem Mehrrechnersystem |
| US5682516A (en) * | 1994-03-01 | 1997-10-28 | Intel Corporation | Computer system that maintains system wide cache coherency during deferred communication transactions |
| EP0817077A2 (en) * | 1996-07-01 | 1998-01-07 | Sun Microsystems, Inc. | A multiprocessing system configured to perform prefetching operations |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5025365A (en) * | 1988-11-14 | 1991-06-18 | Unisys Corporation | Hardware implemented cache coherency protocol with duplicated distributed directories for high-performance multiprocessors |
| US5715428A (en) * | 1994-02-28 | 1998-02-03 | Intel Corporation | Apparatus for maintaining multilevel cache hierarchy coherency in a multiprocessor computer system |
| US5751986A (en) * | 1994-03-01 | 1998-05-12 | Intel Corporation | Computer system with self-consistent ordering mechanism |
| US5623628A (en) * | 1994-03-02 | 1997-04-22 | Intel Corporation | Computer system and method for maintaining memory consistency in a pipelined, non-blocking caching bus request queue |
| US5604450A (en) * | 1995-07-27 | 1997-02-18 | Intel Corporation | High speed bidirectional signaling scheme |
-
1998
- 1998-08-06 US US09/130,302 patent/US6112283A/en not_active Expired - Lifetime
-
1999
- 1999-07-27 JP JP2000564132A patent/JP4414096B2/ja not_active Expired - Fee Related
- 1999-07-27 WO PCT/US1999/017040 patent/WO2000008564A1/en not_active Ceased
- 1999-07-27 DE DE19983443T patent/DE19983443B4/de not_active Expired - Fee Related
- 1999-07-27 AU AU51337/99A patent/AU5133799A/en not_active Abandoned
- 1999-07-27 GB GB0102431A patent/GB2357867B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE68925470T2 (de) * | 1988-12-05 | 1996-08-14 | Ibm | Verfahren zum Abrufen von potentiell ungültigen Daten in einem Mehrrechnersystem |
| US5682516A (en) * | 1994-03-01 | 1997-10-28 | Intel Corporation | Computer system that maintains system wide cache coherency during deferred communication transactions |
| EP0817077A2 (en) * | 1996-07-01 | 1998-01-07 | Sun Microsystems, Inc. | A multiprocessing system configured to perform prefetching operations |
Also Published As
| Publication number | Publication date |
|---|---|
| HK1035045A1 (en) | 2001-11-09 |
| GB2357867A (en) | 2001-07-04 |
| WO2000008564A8 (en) | 2000-04-27 |
| DE19983443T1 (de) | 2001-07-26 |
| GB2357867B (en) | 2003-04-09 |
| WO2000008564A1 (en) | 2000-02-17 |
| US6112283A (en) | 2000-08-29 |
| GB0102431D0 (en) | 2001-03-14 |
| JP2002522827A (ja) | 2002-07-23 |
| AU5133799A (en) | 2000-02-28 |
| JP4414096B2 (ja) | 2010-02-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8110 | Request for examination paragraph 44 | ||
| 8125 | Change of the main classification |
Ipc: G06F 13372 |
|
| 8364 | No opposition during term of opposition | ||
| 8339 | Ceased/non-payment of the annual fee | ||
| R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |
Effective date: 20110201 |