DE19982502T1 - Vorrichtung, System und Verfahren einer physischen Blockadressen-Wiederherstellung für zyklische Fehlerkorrektur-Codes - Google Patents

Vorrichtung, System und Verfahren einer physischen Blockadressen-Wiederherstellung für zyklische Fehlerkorrektur-Codes

Info

Publication number
DE19982502T1
DE19982502T1 DE19982502T DE19982502T DE19982502T1 DE 19982502 T1 DE19982502 T1 DE 19982502T1 DE 19982502 T DE19982502 T DE 19982502T DE 19982502 T DE19982502 T DE 19982502T DE 19982502 T1 DE19982502 T1 DE 19982502T1
Authority
DE
Germany
Prior art keywords
error correction
block address
physical block
recovery apparatus
correction codes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19982502T
Other languages
English (en)
Inventor
Peter Vasiliev
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seagate Technology LLC
Original Assignee
Seagate Technology LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seagate Technology LLC filed Critical Seagate Technology LLC
Publication of DE19982502T1 publication Critical patent/DE19982502T1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515—Reed-Solomon codes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1803—Error detection or correction; Testing, e.g. of drop-outs by redundancy in data representation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1866—Error detection or correction; Testing, e.g. of drop-outs by interleaving
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
    • G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel
    • G11B27/19—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
    • G11B27/28—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording
    • G11B27/30—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording
    • G11B27/3027—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording used signal is digitally coded
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • Probability & Statistics with Applications (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Algebra (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Quality & Reliability (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
DE19982502T 1998-01-08 1999-01-08 Vorrichtung, System und Verfahren einer physischen Blockadressen-Wiederherstellung für zyklische Fehlerkorrektur-Codes Withdrawn DE19982502T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US7076298P 1998-01-08 1998-01-08
PCT/US1999/000531 WO1999035575A1 (en) 1998-01-08 1999-01-08 A physical block address recovery apparatus, system and method for cyclic error correction codes

Publications (1)

Publication Number Publication Date
DE19982502T1 true DE19982502T1 (de) 2000-11-30

Family

ID=22097244

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19982502T Withdrawn DE19982502T1 (de) 1998-01-08 1999-01-08 Vorrichtung, System und Verfahren einer physischen Blockadressen-Wiederherstellung für zyklische Fehlerkorrektur-Codes

Country Status (7)

Country Link
US (1) US6574774B1 (de)
JP (1) JP2002501310A (de)
KR (1) KR20010033954A (de)
CN (1) CN1288542A (de)
DE (1) DE19982502T1 (de)
GB (1) GB2346234B (de)
WO (1) WO1999035575A1 (de)

Families Citing this family (55)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3450756B2 (ja) * 1999-09-08 2003-09-29 松下電器産業株式会社 誤り訂正方法および誤り訂正装置
US6973579B2 (en) 2002-05-07 2005-12-06 Interdigital Technology Corporation Generation of user equipment identification specific scrambling code for the high speed shared control channel
US7979712B2 (en) * 2002-07-01 2011-07-12 International Business Machines Corporation Network system, server and information terminal for list matching
US6891694B2 (en) * 2002-08-23 2005-05-10 Hitachi Global Storage Technologies Netherlands B.V. Method for writing streaming audiovisual data to a disk drive
US7203890B1 (en) 2004-06-16 2007-04-10 Azul Systems, Inc. Address error detection by merging a polynomial-based CRC code of address bits with two nibbles of data or data ECC bits
US7398449B1 (en) * 2004-06-16 2008-07-08 Azul Systems, Inc. Encoding 64-bit data nibble error correct and cyclic-redundancy code (CRC) address error detect for use on a 76-bit memory module
US7225381B1 (en) 2005-06-02 2007-05-29 Lehman Thomas F Error detection and correction method
US7539924B1 (en) 2005-11-15 2009-05-26 Western Digital Technologies, Inc. Disk drive implementing data path protection by encoding large host blocks into sub blocks
US7840878B1 (en) * 2006-04-11 2010-11-23 Marvell International Ltd. Systems and methods for data-path protection
US20080140740A1 (en) * 2006-12-08 2008-06-12 Agere Systems Inc. Systems and methods for processing data sets in parallel
US8370561B2 (en) * 2006-12-24 2013-02-05 Sandisk Il Ltd. Randomizing for suppressing errors in a flash memory
US8127200B2 (en) * 2006-12-24 2012-02-28 Sandisk Il Ltd. Flash memory device and system with randomizing for suppressing errors
US8291306B2 (en) * 2008-07-02 2012-10-16 Joseph Schweiray Lee Encoder of cyclic codes for partially written codewords in flash memory
JP5422974B2 (ja) * 2008-11-18 2014-02-19 富士通株式会社 誤り判定回路及び共有メモリシステム
US8397107B1 (en) * 2009-12-11 2013-03-12 Western Digital Technologies, Inc. Data storage device employing data path protection using both LBA and PBA
US8443167B1 (en) 2009-12-16 2013-05-14 Western Digital Technologies, Inc. Data storage device employing a run-length mapping table and a single address mapping table
US8194340B1 (en) 2010-03-18 2012-06-05 Western Digital Technologies, Inc. Disk drive framing write data with in-line mapping data during write operations
US8699185B1 (en) 2012-12-10 2014-04-15 Western Digital Technologies, Inc. Disk drive defining guard bands to support zone sequentiality when butterfly writing shingled data tracks
US8856438B1 (en) 2011-12-09 2014-10-07 Western Digital Technologies, Inc. Disk drive with reduced-size translation table
US9330715B1 (en) 2010-03-22 2016-05-03 Western Digital Technologies, Inc. Mapping of shingled magnetic recording media
US8687306B1 (en) 2010-03-22 2014-04-01 Western Digital Technologies, Inc. Systems and methods for improving sequential data rate performance using sorted data zones
US8693133B1 (en) 2010-03-22 2014-04-08 Western Digital Technologies, Inc. Systems and methods for improving sequential data rate performance using sorted data zones for butterfly format
US8756361B1 (en) 2010-10-01 2014-06-17 Western Digital Technologies, Inc. Disk drive modifying metadata cached in a circular buffer when a write operation is aborted
US8954664B1 (en) 2010-10-01 2015-02-10 Western Digital Technologies, Inc. Writing metadata files on a disk
US8793429B1 (en) 2011-06-03 2014-07-29 Western Digital Technologies, Inc. Solid-state drive with reduced power up time
US8756382B1 (en) 2011-06-30 2014-06-17 Western Digital Technologies, Inc. Method for file based shingled data storage utilizing multiple media types
US8924814B2 (en) 2012-08-28 2014-12-30 Seagate Technology Llc Write management using partial parity codes
WO2013038464A1 (en) * 2011-09-16 2013-03-21 Hitachi, Ltd. Multi-stage encoding and decoding of bch codes for flash memories
US8671250B2 (en) 2011-12-15 2014-03-11 Western Digital Technologies, Inc. Data storage device generating redundancy for data path protection of a parity sector
US9213493B1 (en) 2011-12-16 2015-12-15 Western Digital Technologies, Inc. Sorted serpentine mapping for storage drives
US8819367B1 (en) 2011-12-19 2014-08-26 Western Digital Technologies, Inc. Accelerated translation power recovery
US8612706B1 (en) 2011-12-21 2013-12-17 Western Digital Technologies, Inc. Metadata recovery in a disk drive
US8914706B2 (en) 2011-12-30 2014-12-16 Streamscale, Inc. Using parity data for concurrent data authentication, correction, compression, and encryption
US8683296B2 (en) 2011-12-30 2014-03-25 Streamscale, Inc. Accelerated erasure coding system and method
US8996957B1 (en) 2012-05-22 2015-03-31 Pmc-Sierra, Inc. Systems and methods for initializing regions of a flash drive having diverse error correction coding (ECC) schemes
US9021337B1 (en) 2012-05-22 2015-04-28 Pmc-Sierra, Inc. Systems and methods for adaptively selecting among different error correction coding schemes in a flash drive
US9183085B1 (en) 2012-05-22 2015-11-10 Pmc-Sierra, Inc. Systems and methods for adaptively selecting from among a plurality of error correction coding schemes in a flash drive for robustness and low latency
US8972824B1 (en) 2012-05-22 2015-03-03 Pmc-Sierra, Inc. Systems and methods for transparently varying error correction code strength in a flash drive
US9021336B1 (en) * 2012-05-22 2015-04-28 Pmc-Sierra, Inc. Systems and methods for redundantly storing error correction codes in a flash drive with secondary parity information spread out across each page of a group of pages
US9176812B1 (en) 2012-05-22 2015-11-03 Pmc-Sierra, Inc. Systems and methods for storing data in page stripes of a flash drive
US9047214B1 (en) 2012-05-22 2015-06-02 Pmc-Sierra, Inc. System and method for tolerating a failed page in a flash device
US9021333B1 (en) 2012-05-22 2015-04-28 Pmc-Sierra, Inc. Systems and methods for recovering data from failed portions of a flash drive
US8793556B1 (en) 2012-05-22 2014-07-29 Pmc-Sierra, Inc. Systems and methods for reclaiming flash blocks of a flash drive
US8788910B1 (en) 2012-05-22 2014-07-22 Pmc-Sierra, Inc. Systems and methods for low latency, high reliability error correction in a flash drive
US9026867B1 (en) 2013-03-15 2015-05-05 Pmc-Sierra, Inc. Systems and methods for adapting to changing characteristics of multi-level cells in solid-state memory
US9081701B1 (en) 2013-03-15 2015-07-14 Pmc-Sierra, Inc. Systems and methods for decoding data for solid-state memory
US9009565B1 (en) 2013-03-15 2015-04-14 Pmc-Sierra, Inc. Systems and methods for mapping for solid-state memory
US9053012B1 (en) 2013-03-15 2015-06-09 Pmc-Sierra, Inc. Systems and methods for storing data for solid-state memory
US9208018B1 (en) 2013-03-15 2015-12-08 Pmc-Sierra, Inc. Systems and methods for reclaiming memory for solid-state memory
US8953269B1 (en) 2014-07-18 2015-02-10 Western Digital Technologies, Inc. Management of data objects in a data object zone
US9875055B1 (en) 2014-08-04 2018-01-23 Western Digital Technologies, Inc. Check-pointing of metadata
US9703989B1 (en) * 2014-12-23 2017-07-11 Altera Corporation Secure physically unclonable function (PUF) error correction
CN108665940B (zh) * 2018-05-14 2020-09-04 联芸科技（杭州）有限公司 Ecc编码电路、解码电路以及存储器控制器
CN110209524B (zh) * 2019-06-18 2022-12-06 哈尔滨工业大学 一种抗单粒子瞬态效应的ecc译码器加固方法
US11537466B2 (en) 2021-04-27 2022-12-27 Western Digital Technologies, Inc. Detection of data discrepancy after XOR recovery

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60183669A (ja) * 1984-03-02 1985-09-19 Nec Corp メモリ制御装置
US4608693A (en) * 1984-05-07 1986-08-26 At&T Bell Laboratories Fault detection arrangement for a digital conferencing system
US4675736A (en) * 1985-09-25 1987-06-23 Humphrey Instruments, Inc. Superimposed analog video image on plotted digital field tester display
KR950009386B1 (ko) * 1993-04-21 1995-08-21 삼성전자주식회사 어드레스 생성회로
US5896406A (en) * 1997-03-31 1999-04-20 Adaptec, Inc. Shift register-based XOR accumulator engine for generating parity in a data processing system

Also Published As

Publication number Publication date
WO1999035575A1 (en) 1999-07-15
US6574774B1 (en) 2003-06-03
GB2346234B (en) 2002-12-18
JP2002501310A (ja) 2002-01-15
GB0009926D0 (en) 2000-06-07
KR20010033954A (ko) 2001-04-25
CN1288542A (zh) 2001-03-21
GB2346234A (en) 2000-08-02

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Legal Events

Date Code Title Description
8127 New person/name/address of the applicant

Owner name: SEAGATE TECHNOLOGY LLC, SCOTTS VALLEY, CALIF., US

8139 Disposal/non-payment of the annual fee