DE19942677A1 - Compensating component used in metal oxide semiconductor transistor (MOST) comprises an n-conducting drift zone provided in a silicon semiconductor body - Google Patents
Compensating component used in metal oxide semiconductor transistor (MOST) comprises an n-conducting drift zone provided in a silicon semiconductor bodyInfo
- Publication number
- DE19942677A1 DE19942677A1 DE19942677A DE19942677A DE19942677A1 DE 19942677 A1 DE19942677 A1 DE 19942677A1 DE 19942677 A DE19942677 A DE 19942677A DE 19942677 A DE19942677 A DE 19942677A DE 19942677 A1 DE19942677 A1 DE 19942677A1
- Authority
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- Prior art keywords
- type
- drift zone
- compensation component
- semiconductor body
- compensation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 24
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 24
- 239000010703 silicon Substances 0.000 title claims abstract description 24
- 239000004065 semiconductor Substances 0.000 title claims abstract description 11
- 229910044991 metal oxide Inorganic materials 0.000 title 1
- 150000004706 metal oxides Chemical class 0.000 title 1
- 239000002019 doping agent Substances 0.000 claims abstract description 14
- 238000004519 manufacturing process Methods 0.000 claims abstract description 10
- 238000000151 deposition Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 19
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 14
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 claims description 14
- 229910052711 selenium Inorganic materials 0.000 claims description 14
- 239000011669 selenium Substances 0.000 claims description 14
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 claims description 13
- 229910052717 sulfur Inorganic materials 0.000 claims description 13
- 239000011593 sulfur Substances 0.000 claims description 13
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 8
- BKVIYDNLLOSFOA-UHFFFAOYSA-N thallium Chemical compound [Tl] BKVIYDNLLOSFOA-UHFFFAOYSA-N 0.000 claims description 8
- 229910052738 indium Inorganic materials 0.000 claims description 7
- 229910052763 palladium Inorganic materials 0.000 claims description 7
- 229910052716 thallium Inorganic materials 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 4
- 229910052698 phosphorus Inorganic materials 0.000 claims description 4
- 239000011574 phosphorus Substances 0.000 claims description 4
- 238000005468 ion implantation Methods 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 2
- 238000002513 implantation Methods 0.000 description 14
- 125000004429 atom Chemical group 0.000 description 9
- 239000000370 acceptor Substances 0.000 description 7
- 239000000758 substrate Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 4
- 230000008021 deposition Effects 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000000407 epitaxy Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 235000012431 wafers Nutrition 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000002800 charge carrier Substances 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000018109 developmental process Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 125000003748 selenium group Chemical group *[Se]* 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 125000004434 sulfur atom Chemical group 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- WLNBMPZUVDTASE-HXIISURNSA-N (2r,3r,4s,5r)-2-amino-3,4,5,6-tetrahydroxyhexanal;sulfuric acid Chemical compound [O-]S([O-])(=O)=O.O=C[C@H]([NH3+])[C@@H](O)[C@H](O)[C@H](O)CO.O=C[C@H]([NH3+])[C@@H](O)[C@H](O)[C@H](O)CO WLNBMPZUVDTASE-HXIISURNSA-N 0.000 description 1
- 241001474977 Palla Species 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 108090000623 proteins and genes Proteins 0.000 description 1
- 238000000746 purification Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
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Abstract
Description
Die vorliegende Erfindung betrifft ein Kompensationsbauele ment sowie ein Verfahren zu dessen Herstellung.The present invention relates to a compensation component ment and a method for its production.
Die Durchlaßverluste bei MOS-Transistoren setzen sich be kanntlich aus Verlusten im Kanal zwischen Sourcezone und Drainzone und aus ohmschen Verlusten im Driftbereich, der zur Aufnahme einer Raumladungszone im Sperrfall des MOS-Transi stors dient, zusammen. Bei Hochvolt-MOS-Transistoren ist ge rade der durch den Driftbereich bedingte Anteil an den ohm schen Verlusten besonders hoch und dominant.The conduction losses in MOS transistors settle known from losses in the channel between the source zone and Drain zone and from ohmic losses in the drift area, which leads to Inclusion of a space charge zone in the blocked case of the MOS Transi stors serves together. In high-voltage MOS transistors is ge rade the part of the ohm caused by the drift range losses are particularly high and dominant.
Zur Reduzierung der ohmschen Verluste im Driftbereich bei Hochvolt-MOS-Transistoren wurden die Kompensationsbauelemente entwickelt: bei diesen befinden sich hoch n-leitende Gebiete und hoch p-leitende Gebiete in vertikaler Richtung im Drift bereich nebeneinander. Hierzu sind beispielsweise in einen hoch n-dotierten Halbleiterkörper säulenförmige hoch p-do tierte Gebiete eingebracht. Dabei ist die Nettodotierung ho rizontal über dem Driftbereich gemittelt nahezu kompensiert. Das heißt, in dem obigen Beispiel gleicht die Dotierung der p-dotierten säulenförmigen Gebiete praktisch die Dotierung des n-leitenden Halbleiterkörpers aus.To reduce ohmic losses in the drift range High-voltage MOS transistors became the compensation components developed: these are highly n-conducting areas and high p-type regions in the vertical direction in the drift area side by side. For example, in one highly n-doped semiconductor body columnar high p-do introduced areas. The net funding is ho rizontally averaged over the drift range almost compensated. That is, in the example above, the doping is the same as p-doped columnar areas practically the doping of the n-type semiconductor body.
Wird an ein solches Kompensationsbauelement eine Sperrspan nung angelegt, so befindet sich ein wesentlicher Teil der Ge genladung der ionisierten Dotierstoffatome in der gleichen horizontalen Ebene, so daß in vertikaler Richtung zwischen den beiden Hauptoberflächen des Halbleiterkörpers die elek trische Feldstärke noch wenig reduziert wird. Mit anderen Worten, es liegt hier in vertikaler Richtung nur ein geringer resultierender Gradient der elektrischen Feldstärke vor. Da her kann in vertikaler Richtung die Sperrspannung über einer geringeren Dicke des Driftbereiches des Kompensationsbauele mentes abgebaut werden.Is a blocking chip on such a compensation component a substantial part of the Ge gene charge of the ionized dopant atoms in the same horizontal plane, so that in the vertical direction between the two main surfaces of the semiconductor body, the elec trical field strength is still little reduced. With others Words, there is only a small amount here in the vertical direction resulting gradient of the electric field strength. There forth, the reverse voltage over a reduced thickness of the drift area of the compensation component mentes are reduced.
Da aber im Durchlaßfall eine höhere wirksame n-Dotierung im Driftbereich zur Verfügung steht, zeichnen sich Kompensati onsbauelemente im Vergleich zu herkömmlichen, flächengleichen MOS-Transistoren durch drastisch geringere Verluste im lei tenden Zustand aus. Kompensationsbauelemente haben so einen erheblich reduzierten Einschaltwiderstand Ron.But since a higher effective n-doping in Drift range is available, stand out compensation onsbauelemente compared to conventional, equal area MOS transistors due to drastically lower losses in the lei condition. Compensation components have one significantly reduced on-resistance Ron.
Die Herstellung von Kompensationsbauelementen ist aufwendig, was durch die alternierende Struktur der p-leitenden und n- leitenden Gebiete im Driftbereich bedingt ist, also durch ei ne in lateraler Richtung alternierende p/n/p/n. . .-Struktur.The production of compensation components is complex, which is due to the alternating structure of the p-type and n- conductive areas in the drift area is caused by egg ne p / n / p / n alternating in the lateral direction. . .-Structure.
Bisher gibt es zwei verschiedene Methoden zum Herstellen der artiger alternierender p/n/p/n. . .-Strukturen von Kompensati onsbauelementen:So far there are two different methods of making the like alternating p / n / p / n. . . Structures by Kompensati onsbauelemente:
Bei der bevorzugten Methode werden mehrstufige Epitaxiepro zesse mit zwischengeschalteten Implantationen angewandt. Kon kret werden hier n-leitende epitaktische Schichten auf ein n+-leitendes Siliziumsubstrat aufgetragen, und nach jedem Epitaxieprozeß wird eine Implantation von Boratomen an über einanderliegenden Stellen vorgenommen, so daß bei einer nach folgenden Wärmebehandlung die übereinanderliegenden Bor- Implantationen ein säulenförmiges p-leitendes Gebiet in einem n-leitenden Gebiet bilden.In the preferred method, multi-stage epitaxial processes with intermediate implantations are used. Specifically, n-type epitaxial layers are applied to an n + -conducting silicon substrate, and after each epitaxial process, boron atoms are implanted at mutually overlapping locations, so that, after a subsequent heat treatment, the superimposed boron implantations have a columnar p-type Form an area in an n-type area.
Bei der anderen üblichen Methode werden in einen Siliziumkör per des einen Leitungstyps tiefe Trenches eingebracht, die anschließend mit Silizium des anderen Leitungstyps aufgefüllt werden.In the other usual method, a silicon body introduced deep trenches of one line type, the then filled with silicon of the other conductivity type become.
Beiden bekannten Methoden ist gemeinsam, daß sie für jede Chipgröße in einer gewünschten Spannungsklasse einen exakt angepaßten Unterbau im Silizium des Driftbereiches erfordern und ihre Prozessierung äußerst aufwendig und damit teuer ist.Both known methods have in common that they are for each Chip size in a desired voltage class one exactly require adapted substructure in the silicon of the drift area and their processing is extremely complex and therefore expensive.
Trotz dieses erheblichen Nachteiles einer komplizierten Pro zessierung und eines großen Aufwandes wurde bisher nicht dar an gedacht, ein Kompensationsbauelement sowie ein Verfahren zu dessen Herstellung auf andere Weise so zu gestalten, daß diese Nachteile überwunden werden können. Der vorliegenden Erfindung liegt daher die neue Aufgabe zugrunde, ein Kompen sationsbauelement sowie ein Verfahren zu dessen Herstellung derart anzugeben, daß auf aufwendige und teure Prozessierung verzichtet werden kann.Despite this significant disadvantage of a complicated pro Cessation and a great deal of effort has so far not been shown thought of a compensation component and a method to manufacture it in a different way so that these disadvantages can be overcome. The present The invention is therefore based on the new object, a compen station component and a method for its production to indicate such that on complex and expensive processing can be dispensed with.
Zur Lösung dieser Aufgabe sind erfindungsgemäß ein Kompensa tionsbauelement sowie ein Verfahren zu dessen Herstellung mit den Merkmalen der jeweiligen unabhängigen Patentansprüche vorgesehen. Vorteilhafte Weiterbildungen der Erfindung erge ben sich aus den Unteransprüchen.To solve this problem, a compensa according to the invention tion component and a method for its production with the features of the respective independent claims intended. Advantageous further developments of the invention are derived from the subclaims.
Wesentlich an der vorliegenden Erfindung ist der Grundgedan ke, entweder in die üblicherweise n-leitende Grunddotierung der Driftzone homogen verteilte p-leitende Atome mit etwa der gleichen Dotierungskonzentration wie die n-leitende Grunddo tierung einzubringen oder aber das Konzept einer n-leitenden Grunddotierung zu verlassen und in einen p-leitenden Silizi umkörper einen relativ rasch diffundierenden Dotierstoff mit Donatoreigenschaften einzubringen, wie insbesondere Schwefel und/oder Selen, um so mit diesem rasch diffundierenden Do tierstoff die gewünschten n-leitenden säulenartigen Gebiete zu erzeugen.The basic idea of the present invention is essential ke, either in the usual n-type basic doping in the drift zone homogeneously distributed p-type atoms with approximately that same doping concentration as the n-type basic do or the concept of an n-type Leave basic funding and in a p-type silicon with a relatively rapidly diffusing dopant To bring in donor properties, in particular sulfur and / or selenium, so with this rapidly diffusing Do the desired n-type columnar regions to create.
Im folgenden soll zunächst auf die erste Alternative, also die homogene Verteilung von Atomen des einen Leitungstyps in einer Grunddotierung des anderen Leitungstyps des Driftberei ches eingegangen werden. Obwohl im folgenden dabei in Einzel heiten erläutert wird, wie p-dotierende bzw. -leitende Atome, nämlich insbesondere Indiumatome, Thalliumatome und Palla diumatome in eine übliche n-leitende Dotierung einer Driftzo ne aus beispielsweise Phosphor eingebracht werden, können die Leitungstypen gegebenenfalls bei entsprechender Auswahl der Atome auch umgekehrt sein. Gleiches gilt selbstverständlich auch für die weiter unten näher erläuterte zweite Methode.In the following, the first alternative is said to be the homogeneous distribution of atoms of one conduction type in a basic funding of the other line type of drift driving ches are received. Although in the following in single is explained how p-doping or conducting atoms, namely in particular indium atoms, thallium atoms and palla diumatome in a usual n-type doping of a driftzo ne can be introduced from, for example, phosphorus Line types, if appropriate, with the appropriate selection of Atoms can also be reversed. The same applies of course also for the second method explained in more detail below.
Bei der Auswahl des Dotierstoffes für die erste Methode, also für das Einbringen von p-dotierenden Atomen in eine übliche n-Dotierung einer Driftzone, muß darauf geachtet werden, daß der Abstand zwischen dem Akzeptor-Energieniveau und der Va lenzbandkante von Silizium größer ist als etwa 150 meV, so daß bei Raumtemperatur im thermischen Gleichgewicht nur ein sehr geringer Anteil der Akzeptoratome ionisiert ist. In Durchlaßrichtung des Kompensationsbauelementes wird die n- leitende Dotierung des Driftbereiches damit nur zu einem ge ringen Anteil kompensiert, so daß das Kompensationsbauele ment, insbesondere ein Transistor, die gewünschten niedrigen Durchlaßverluste hat.When choosing the dopant for the first method, that is for the introduction of p-doping atoms into a conventional one n-doping of a drift zone, care must be taken that the distance between the acceptor energy level and the Va lenzbandkante of silicon is greater than about 150 meV, so that at room temperature in thermal equilibrium only one very small proportion of the acceptor atoms is ionized. In The forward direction of the compensation component is the n- conductive doping of the drift region thus only to a ge wrestle compensated so that the compensation component ment, especially a transistor, the desired low Has leakage losses.
Außerdem sollte der Abstand zwischen dem Akzeptorniveau und der Valenzbandkante größer als der Abstand zwischen dem Dona torniveau und der Leitungsbandkante des Siliziums sein. Im Sperrfall wird nämlich eine Raumladungszone aufgebaut, die dazu führt, daß die bei der Ionisation der Akzeptoren frei werdenden Löcher sofort abfließen und nicht mit anderen Ak zeptorrümpfen in Wechselwirkung treten können. Es werden dann also in kurzer Zeit alle Akzeptoren ionisiert, so daß die Do natoren im Volumen des Driftbereiches kompensiert sind. Das heißt, es liegen ähnliche Verhältnisse wie bei üblichen Kom pensationsbauelementen vor.In addition, the distance between the acceptance level and the valence band edge is greater than the distance between the Dona gate level and the conduction band edge of the silicon. in the In the event of a lock, a space charge zone is built up leads to the free ionization of the acceptors holes will drain immediately and not with other Ak the fuselage can interact. Then there will be thus ionizing all acceptors in a short time, so that the Do nators in the volume of the drift range are compensated. The means that there are similar conditions as with conventional com pension components.
Ein wesentlicher Vorteil der ersten Methode liegt in einer besonders einfachen und damit billigen Prozeßführung im Ver gleich zum Stand der Technik mit Epitaxien und Implantationen bzw. tiefen Trenches. Der p-leitende Dotierstoff, also insbe sondere Indium, Thallium und Palladium, kann ohne weiteres gleichzeitig mit der n-Dotierung beim Abscheiden der epitak tischen Schicht erzeugt werden, so daß die Implantationen entfallen können. Auch kann ein auf diese Weise behandelter epitaktischer Wafer als Grundmaterial für alle Chipgrößen ei ner Spannungsklasse verwendet werden, was die Logistik erheb lich vereinfacht und eine Verkürzung der Durchlaufzeiten er laubt. Während des Abscheideprozesses für die epitaktischen Schichten ist es nämlich möglich, die Dotierstoffzusammenset zung über die Dicke der epitaktischen Schichten zu verändern und damit die Bauelement-Eigenschaften entsprechend einzu stellen.A major advantage of the first method is one particularly simple and therefore cheap litigation in Ver state of the art with epitaxy and implantation or deep trenches. The p-type dopant, in particular special indium, thallium and palladium can easily at the same time as the n-doping when the epitac is deposited table layer are generated so that the implantations can be omitted. Also treated in this way epitaxial wafer as the basic material for all chip sizes voltage class can be used, which increases logistics simplified and a reduction in throughput times leaves. During the deposition process for the epitaxial Namely, layers it is possible to compose the dopant change over the thickness of the epitaxial layers and thus the component properties accordingly put.
Alternativ zur Abscheidung einer mit Indium, Thallium oder Palladium dotierten epitaktischen Schicht ist es möglich, die p-Dotierung vor dem Start einer Vorderseitenbearbeitung in üblicher Weise einzubringen oder während des Prozesses durch Öffnungen in entsprechenden Fenstern einzudiffundieren.As an alternative to depositing one with indium, thallium or Palladium doped epitaxial layer it is possible to p-doping before the start of front processing in in the usual way or during the process Diffuse openings in appropriate windows.
Von Bedeutung ist dabei, daß der p-leitende Dotierstoff Clu ster bildet, die ortsverschieden von der n-leitenden Dotie rung des Driftbereiches ist. Damit soll ein direkter Übergang von Elektronen aus dem Donatorniveau in das Akzeptorniveau verhindert werden, während in einer Ebene über eine größere Fläche immer noch eine Kompensation der Ladungsträger er reicht wird.It is important that the p-type dopant Clu ster forms, which are different from the n-type dopie is the drift range. This is supposed to be a direct transition of electrons from the donor level to the acceptor level be prevented while in one plane over a larger one Surface still compensates for the charge carriers is enough.
Bei dem erfindungsgemäßen Kompensationsbauelement sollte der Randabschluß n-lastig sein, was durch eine entsprechende Do tierung mit beispielsweise Selen erreicht werden kann. Der Vorteil dieses Donatorstoffes liegt darin, daß er ebenfalls mehrere tiefe Energieniveaus, wie beispielsweise ein tiefes Energieniveau mit etwa 310 meV Abstand zur Leitungsbandkante besitzt. Damit wird eine ähnliche Zeitverzögerung beim Aufbau der Raumladungszone und Sperrspannung erreicht, wie in einem homogenen Halbleitermaterial, was sich günstig auf die Ab schalteigenschaften eines Transistors und die Stabilität von dessen Rand auswirkt. In the compensation component according to the invention, the Edge closure be n-heavy, which is indicated by a corresponding do can be achieved with selenium, for example. The The advantage of this donor substance is that it is also several low energy levels, such as one deep Energy level with about 310 meV distance to the conduction band edge owns. This will result in a similar time delay during setup the space charge zone and reverse voltage reached as in one homogeneous semiconductor material, which is favorable on the Ab switching characteristics of a transistor and the stability of whose edge affects.
Bei der zweiten Methode, auf die im folgenden näher eingegan gen werden soll, werden Schwefel und Selen durch Diffusion in Siliziumscheiben eingebracht, da diese dort relativ schnell diffundieren, so daß eine Dotierung in einer bestimmten Scheibentiefe mit einer relativ geringen Temperatur-/Zeit belastung der Scheiben realisiert werden kann.In the second method, which is discussed in more detail below sulfur and selenium are diffused in Silicon wafers introduced because they are relatively fast there diffuse so that a doping in a certain Disc depth with a relatively low temperature / time load on the panes can be realized.
Schwefelatome und Selenatome lassen sich beispielsweise durch eine maskierte Implantation mit einem nachfolgenden Eintreib schritt in die Siliziumscheiben eindiffundieren. Die Dotie rungskonzentration von n-leitenden Bereichen läßt sich dann ohne weiteres durch die Dosis der Schwefel- bzw. Selenimplan tation, die Eintreibtemperatur und die Eintreibzeit steuern. Als Maskierungsschichten für die Implantation von Schwefel oder Selen können in üblicher Weise Siliziumdioxid oder Pho tolackschichten mit ausreichender Dicke herangezogen werden. Es hat sich gezeigt, daß eine Dicke von etwa 1 µm ausreichend ist.For example, sulfur atoms and selenium atoms can be a masked implantation with a subsequent drive-in diffuse into the silicon wafers. The Dotie concentration of n-conducting areas can then be easily by the dose of the sulfur or selenium implan tation, the driving temperature and the driving time control. As masking layers for the implantation of sulfur or selenium can in the usual way silicon dioxide or Pho tolac layers with sufficient thickness can be used. It has been shown that a thickness of approximately 1 μm is sufficient is.
Durch die im Vergleich zu einer Bordiffusion wesentlich kür zere Diffusionszeit von Schwefel und Selen läßt sich die Zahl der notwendigen epitaktischen Schichten verringern, was eine deutliche Kostenreduzierung mit sich bringt.Due to the fact that it is much shorter compared to on-board diffusion The diffusion time of sulfur and selenium can be reduced of the necessary epitaxial layers reduce what a brings significant cost reduction.
Die Dotierungskonzentration in den p-leitenden Bereichen läßt sich besonders gut eingrenzen, da ja bevorzugt von einem p- leitenden Grundmaterial ausgegangen wird.The doping concentration in the p-type regions leaves narrow yourself down particularly well, since a p- conductive base material is assumed.
In dem n-leitenden säulenartigen Bereichen kann gegebenen falls eine vertikale Variation des Kompensationsgrades vorge nommen werden, wenn beispielsweise zwei verschiedene n-do tierende Implantationsebenen zur Anwendung gebracht werden oder die Konzentration des n-leitenden Dotierstoffes während der Abscheidung der epitaktischen Schicht verändert wird.In the n-type columnar regions, there may be if a vertical variation of the degree of compensation is pre be taken if, for example, two different n-do implantation levels are used or the concentration of the n-type dopant during the deposition of the epitaxial layer is changed.
Eine spezielle Eigenschaft von mit Schwefel bzw. Selen do tierten Siliziumschichten besteht darin, daß die effektive Dotierungskonzentration solcher Siliziumschichten mit der Temperatur ansteigt, da Schwefel und Selen als Dotierungs stoffe Energieniveaus aufweisen, die tief in der Silizium- Bandlücke liegen. Dadurch werden im Durchlaßzustand des Bau elementes mit zunehmender Temperatur immer mehr freie La dungsträger zur Verfügung gestellt. Da aber die Beweglichkeit der freien Ladungsträger mit zunehmender Temperatur abnimmt, ergibt sich somit eine reduzierte Abhängigkeit des Einschalt widerstandes Ron von der Temperatur. Im Sperrzustand, in wel chem sich die Schwefelatome bzw. Selenatome in der Raumla dungszone befinden, sind diese dagegen vollständig aktiviert.A special property of sulfur or selenium do Tiert silicon layers is that the effective Doping concentration of such silicon layers with the Temperature rises because of sulfur and selenium as doping substances have energy levels that are deep in the silicon Band gap lie. This will be in the open state of the construction element with increasing temperature more and more free La manpower provided. But since the mobility the free charge carrier decreases with increasing temperature, This results in a reduced dependency on switching on Ron withstood the temperature. In the locked state, in wel chem the sulfur atoms or selenium atoms in the Raumla zone, they are fully activated.
Nachfolgend wird die Erfindung anhand der Zeichnungen näher erläutert. Es zeigen:The invention will be described in more detail below with reference to the drawings explained. Show it:
Fig. 1 eine schematische Schnittdarstellung zur Er läuterung eines Ausführungsbeispiels, bei dem Schwefel oder Selen durch Implantation in ei nen Halbleiterkörper eingebracht werden, um in diesem Kompensationsgebiete zur Herstel lung eines Driftbereiches für ein Kompensati onsbauelement zu erzeugen, Fig. 1 is a schematic sectional view He purification of one embodiment may be incorporated in the sulfur or selenium by implantation in egg nen semiconductor body in order in this compensation regions for the manufacture development of a drift region for a Kompensati onsbauelement to produce,
Fig. 2 eine schematische Veranschaulichung einer durch Cluster gebildeten p-Dotierung aus bei spielsweise Indium, Thallium oder Palladium in einem n-leitenden Gebiet eines Driftberei ches, und FIG. 2 shows a schematic illustration of a p-doping formed by clusters from, for example, indium, thallium or palladium in an n-conducting region of a drift region, and
Fig. 3 und 4 Banddarstellungen zur Erläuterung der Dotie rung nach dem Beispiel von Fig. 2. FIGS. 3 and 4 Band diagrams for explaining the Dotie tion according to the example of FIG. 2.
Fig. 1 zeigt den Driftbereich eines Kompensationsbauelemen tes, wie beispielsweise eines MOS-Transistors mit einem p+- leitenden Siliziumsubstrat 1, auf dem eine p-leitende Silizi umschicht 2 beispielsweise durch eine oder mehrere Epitaxien aufgebracht ist. In diese Schicht 2, die ein p-leitendes Ge biet darstellt, werden durch Diffusion von Schwefel und/oder Selen n-leitende säulenartige Gebiete 3 eingebracht, die so hoch dotiert sind, daß die Nettodotierung horizontal, also senkrecht zum Verlauf der Gebiete 3, gemittelt nahezu kompen siert ist. Fig. 1 shows the drift range of a Kompensationsbauelemen tes, such as a MOS transistor with a p + - conductive silicon substrate 1 , on which a p-type silicon layer 2 is applied, for example, by one or more epitaxies. In this layer 2 , which represents a p-type region, n-type columnar regions 3 are introduced by diffusion of sulfur and / or selenium, which are doped so highly that the net doping is horizontal, that is perpendicular to the course of the regions 3 , averaged is almost compensated.
Dies kann beispielsweise durch eine maskierte Ionenimplanta tion (vgl. Pfeile 5) mit Hilfe einer etwa 1 µm dicken Maske 4 aus Siliziumdioxid oder Photolack geschehen. Die Dotierungs konzentration in den auf diese Weise entstehenden n-leitenden Gebieten 3 läßt sich dann über die Dosis der Schwefel- bzw. Selenimplantation, die Eintreibtemperatur bei dem nachfolgen den Temperaturschritt und die Eintreibzeit hiervon steuern.This can be done, for example, by means of a masked ion implantation (cf. arrows 5 ) with the aid of an approximately 4 μm thick mask 4 made of silicon dioxide or photoresist. The doping concentration in the resulting n-type regions 3 can then be controlled via the dose of the sulfur or selenium implantation, the driving temperature in the subsequent temperature step and the driving time thereof.
Da Schwefel und Selen in Silizium relativ schnell diffundie ren, läßt sich auf diese Weise der Driftbereich eines Kompen sationsbauelementes ohne aufwendige und zahlreiche Epitaxie- und Implantationsschritte herstellen, was eine bedeutsame Ko stenreduktion bedeutet.Because sulfur and selenium diffuse relatively quickly in silicon ren, the drift range of a compen station component without complex and numerous epitaxy and implantation steps, which is a significant knockout reduction means.
Eine vertikale Variation des Kompensationsgrades kann er reicht werden, indem beispielsweise eine zusätzliche Implan tationsebene (vgl. Strichlinie 6) vorgesehen wird: in einem ersten Epitaxieschritt wird die Schicht 2 bis zu der Höhe der Strichlinie 6 auf dem Siliziumsubstrat 1 aufgewachsen. Es schließt sich dann eine erste Implantation an, um so bei spielsweise die unteren Teile der Gebiete 3 höher zu dotieren als deren oberen Teile. Mit einem weiteren Epitaxie- und Im plantationsschritt, verbunden mit einem Eintreibschritt am Ende der epitaktischen Abscheidung, wird sodann die in der Fig. 1 dargestellte Anordnung fertiggestellt.A vertical variation of the degree of compensation can be achieved, for example, by providing an additional implantation level (see dashed line 6 ): in a first epitaxial step, layer 2 is grown on the silicon substrate 1 up to the level of the dashed line 6 . It is then followed by a first implantation in order to dope the lower parts of the regions 3 higher than the upper parts thereof. The arrangement shown in FIG. 1 is then completed with a further epitaxial and implantation step, combined with a driving-in step at the end of the epitaxial deposition.
Während bei dem Ausführungsbeispiel von Fig. 1 (zweite Metho de) definierte n- und p-leitende Gebiete im Driftbereich vor liegen, gilt dies für das Ausführungsbeispiel der Fig. 2 bis 4 (erste Methode) nicht: dort sind in ein n-leitendes Gebiet 7 (vgl. Fig. 2) clusterartige p-leitende Gebiete 8 mit Akzep toratomen aus Indium, Thallium und/oder Palladium eingela gert. Diese p-leitenden Gebiete 8 in dem n-leitenden Gebiet 7 mit beispielsweise Phosphor-Donatoratomen sind so hoch do tiert, daß wie im Ausführungsbeispiel von Fig. 1 horizontal über dem Driftbereich die Nettodotierung gemittelt nahezu kompensiert ist.While in the embodiment of FIG. 1 (second method) there are defined n- and p-type regions in the drift region, this does not apply to the embodiment of FIGS. 2 to 4 (first method): there are n-type ones Area 7 (see FIG. 2) cluster-like p-type areas 8 with acceptor atoms made of indium, thallium and / or palladium. These p-type regions 8 in the n-type region 7 with, for example, phosphorus donor atoms are so highly doped that, as in the embodiment of FIG. 1, the net doping is almost compensated for horizontally over the drift region.
Die p-Dotierung für die Gebiete 8 kann praktisch gleichzeitig mit der n-Dotierung des Gebietes 7 beim Abscheiden einer ent sprechenden epitaktischen Schicht erzeugt werden. Das heißt, wenn auf ein Siliziumsubstrat, wie beispielsweise das Silizi umsubstrat 1 der Fig. 1 eine epitaktische Schicht aufgetragen wird, dann wird diese Abscheidung so vorgenommen, daß die da durch gebildete epitaktische Schicht mit der n-leitenden Phosphor-Grunddotierung mit den darin eingelagerten cluster artigen Gebieten 8, die mit Indium, Thallium oder Palladium dotiert sind, aufwächst.The p-doping for the regions 8 can be generated practically simultaneously with the n-doping of the region 7 when depositing a corresponding epitaxial layer. That is, if an epitaxial layer is applied to a silicon substrate, such as the silicon substrate 1 of FIG. 1, then this deposition is carried out in such a way that the epitaxial layer formed by the n-type basic phosphorus doping with those embedded therein cluster-like areas 8 , which are doped with indium, thallium or palladium.
Anstelle von Indium, Thallium und Palladium können gegebenen falls auch andere Materialien gewählt werden. Wesentlich ist aber, daß der Abstand D (vgl. Fig. 3) zwischen dem Akzeptor- Energieniveau 9 und der Valenzbandkante 10 des Siliziums grö ßer ist als 150 meV und auch größer ist als der Abstand d zwischen dem Donatorniveau 11 und der Leitungsbandkante 12. Dabei ist darauf zu achten, daß die entsprechenden Energieni veaus örtlich versetzt voneinander sind, wie dies in Fig. 4 schematisch angedeutet ist, um einen direkten Übergang zwi schen den Niveaus zu vermeiden. Bei örtlich gleichzeitigem Vorkommen von n- und p-leitender Dotierung im mikroskopischen Maßstab liegt damit eine homogene Kompensation bei entspre chendem Fehlen von hoch n-leitenden Zonen mit erhöhter elek trischer Leitfähigkeit vor. Mit anderen Worten, während mi kroskopisch n- und p-leitende Gebiete getrennt sind, besteht makroskopisch, das heißt bezogen auf den Maßstab der Durch bruchsladung, eine homogene Ladungsverteilung mit einem even tuell überlagerten Gradienten im Sinne eines variablen Säu lenkonzepts. Instead of indium, thallium and palladium, other materials can optionally be selected. It is essential, however, that the distance D (cf. FIG. 3) between the acceptor energy level 9 and the valence band edge 10 of the silicon is greater than 150 meV and is also greater than the distance d between the donor level 11 and the conduction band edge 12 . Care must be taken to ensure that the corresponding energies are spatially offset from one another, as is indicated schematically in FIG. 4, in order to avoid a direct transition between the levels. In the case of local simultaneous occurrence of n- and p-type doping on a microscopic scale, there is therefore a homogeneous compensation in the absence of highly n-type zones with increased electrical conductivity. In other words, while microscopically n- and p-conducting regions are separated, macroscopically, i.e. based on the scale of the breakthrough charge, there is a homogeneous charge distribution with a possibly superimposed gradient in the sense of a variable column concept.
11
Siliziumsubstrat
Silicon substrate
22nd
p-leitende Siliziumschicht
p-type silicon layer
33rd
n-leitendes Gebiet
n-type area
44th
Maske
mask
55
Pfeile für Ionenimplantation
Arrows for ion implantation
66
Strichlinie für erste Epitaxieschicht
Dash line for the first epitaxial layer
77
Driftbereich
Drift range
88th
clusterartige Kompensationsgebiete
cluster-like compensation areas
99
Akzeptorniveau
Level of acceptance
1010th
Valenzbandkante
Valence band edge
1111
Donatorniveau
Donor level
1212th
Leitungsbandkante
d Abstand zwischen Donatorniveau und Leitungsband
D Abstand zwischen Akzeptorniveau und Valenzband
Conduction band edge
d Distance between donor level and conduction band
D Distance between the acceptance level and the valence band
Claims (9)
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DE19964214A DE19964214C2 (en) | 1999-09-07 | 1999-09-07 | Method for producing a drift zone of a compensation component |
PCT/EP2000/008707 WO2001018870A2 (en) | 1999-09-07 | 2000-09-06 | Charge compensating semiconductor device and method for the production thereof |
US10/093,306 US6504230B2 (en) | 1999-09-07 | 2002-03-07 | Compensation component and method for fabricating the compensation component |
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DE19948906A1 (en) * | 1999-10-11 | 2001-05-03 | Infineon Technologies Ag | Deep-diffused n-conducting region production in p-doped silicon substrate comprises ion implanting sulfur or selenium as n-foreign material into regions and subsequently heat treating |
DE10122364A1 (en) * | 2001-05-09 | 2002-11-21 | Infineon Technologies Ag | Compensation component, circuit arrangement and method |
DE10122361A1 (en) * | 2001-05-09 | 2002-11-21 | Infineon Technologies Ag | Semiconductor element used as a MOSFET or IGBT comprises a semiconductor layer of first conductivity embedded in semiconductor body |
DE10314596B3 (en) * | 2003-03-31 | 2004-11-25 | Infineon Technologies Ag | Metal oxide semiconductor-compensation transistor component has a semiconductor body with a rear side with deep macropores or trenches vertically aligned to source electrode structures on the front side and to the sink regions |
DE102007027626A1 (en) * | 2007-06-12 | 2008-12-18 | Infineon Technologies Austria Ag | Semiconductor element e.g. metaloxide semiconductor field effect transistor, comprises a crystalline semiconductor body with a drift stretch structure having a vertically directed trench structure filled up with semiconductor material |
DE102007044414A1 (en) * | 2007-09-17 | 2009-03-19 | Infineon Technologies Austria Ag | Semiconductor component e.g. MOS field effect transistor, has intermediate zones arranged on ditch walls, where intermediate zones are high-impedance with respect to loading compensation zones and drift zones |
US7560783B2 (en) | 2002-04-19 | 2009-07-14 | Infineon Technologies Ag | Metal-semiconductor contact, semiconductor component, integrated circuit arrangement and method |
DE10262169B4 (en) * | 2002-04-19 | 2016-11-03 | Infineon Technologies Ag | Semiconductor device and integrated circuit arrangement so |
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Cited By (13)
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DE19948906A1 (en) * | 1999-10-11 | 2001-05-03 | Infineon Technologies Ag | Deep-diffused n-conducting region production in p-doped silicon substrate comprises ion implanting sulfur or selenium as n-foreign material into regions and subsequently heat treating |
DE19948906C2 (en) * | 1999-10-11 | 2001-08-09 | Infineon Technologies Ag | Process for producing deeply diffused n-type regions in a p-doped silicon substrate |
DE10122364B4 (en) * | 2001-05-09 | 2006-10-19 | Infineon Technologies Ag | Compensation component, circuit arrangement and method |
DE10122361A1 (en) * | 2001-05-09 | 2002-11-21 | Infineon Technologies Ag | Semiconductor element used as a MOSFET or IGBT comprises a semiconductor layer of first conductivity embedded in semiconductor body |
DE10122361C2 (en) * | 2001-05-09 | 2003-06-18 | Infineon Technologies Ag | Semiconductor component controllable by field effect |
DE10122364A1 (en) * | 2001-05-09 | 2002-11-21 | Infineon Technologies Ag | Compensation component, circuit arrangement and method |
US7193293B2 (en) | 2001-05-09 | 2007-03-20 | Infineon Technologies Ag | Semiconductor component with a compensation layer, a depletion zone, and a complementary depletion zone, circuit configuration with the semiconductor component, and method of doping the compensation layer of the semiconductor component |
US7560783B2 (en) | 2002-04-19 | 2009-07-14 | Infineon Technologies Ag | Metal-semiconductor contact, semiconductor component, integrated circuit arrangement and method |
DE10262169B4 (en) * | 2002-04-19 | 2016-11-03 | Infineon Technologies Ag | Semiconductor device and integrated circuit arrangement so |
DE10314596B3 (en) * | 2003-03-31 | 2004-11-25 | Infineon Technologies Ag | Metal oxide semiconductor-compensation transistor component has a semiconductor body with a rear side with deep macropores or trenches vertically aligned to source electrode structures on the front side and to the sink regions |
DE102007027626A1 (en) * | 2007-06-12 | 2008-12-18 | Infineon Technologies Austria Ag | Semiconductor element e.g. metaloxide semiconductor field effect transistor, comprises a crystalline semiconductor body with a drift stretch structure having a vertically directed trench structure filled up with semiconductor material |
DE102007027626B4 (en) * | 2007-06-12 | 2015-08-06 | Infineon Technologies Austria Ag | Semiconductor device and method of making the same |
DE102007044414A1 (en) * | 2007-09-17 | 2009-03-19 | Infineon Technologies Austria Ag | Semiconductor component e.g. MOS field effect transistor, has intermediate zones arranged on ditch walls, where intermediate zones are high-impedance with respect to loading compensation zones and drift zones |
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