DE19738542A1 - Datenverarbeitungseinrichtung - Google Patents

Datenverarbeitungseinrichtung

Info

Publication number
DE19738542A1
DE19738542A1 DE19738542A DE19738542A DE19738542A1 DE 19738542 A1 DE19738542 A1 DE 19738542A1 DE 19738542 A DE19738542 A DE 19738542A DE 19738542 A DE19738542 A DE 19738542A DE 19738542 A1 DE19738542 A1 DE 19738542A1
Authority
DE
Germany
Prior art keywords
address
bit
access
register
instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19738542A
Other languages
German (de)
English (en)
Inventor
Toshiyuki Maruyama
Masahito Matsuo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE19738542A1 publication Critical patent/DE19738542A1/de
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/355—Indexed addressing
    • G06F9/3552—Indexed addressing using wraparound, e.g. modulo or circular addressing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Executing Machine-Instructions (AREA)
  • Information Transfer Systems (AREA)
  • Advance Control (AREA)
DE19738542A 1997-02-19 1997-09-03 Datenverarbeitungseinrichtung Ceased DE19738542A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03496097A JP3789583B2 (ja) 1997-02-19 1997-02-19 データ処理装置

Publications (1)

Publication Number Publication Date
DE19738542A1 true DE19738542A1 (de) 1998-08-27

Family

ID=12428726

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19738542A Ceased DE19738542A1 (de) 1997-02-19 1997-09-03 Datenverarbeitungseinrichtung

Country Status (4)

Country Link
US (1) US5924114A (enExample)
JP (1) JP3789583B2 (enExample)
KR (1) KR100249631B1 (enExample)
DE (1) DE19738542A1 (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7032100B1 (en) * 1999-12-17 2006-04-18 Koninklijke Philips Electronics N.V. Simple algorithmic cryptography engine
GB2363869B (en) * 2000-06-20 2004-06-23 Element 14 Inc Register addressing
US6647484B1 (en) * 2000-09-19 2003-11-11 3 Dsp Corporation Transpose address mode in general purpose DSP processor
GB2371641B (en) * 2001-01-27 2004-10-06 Mitel Semiconductor Ltd Direct memory access controller for circular buffers
JP3856737B2 (ja) * 2002-07-19 2006-12-13 株式会社ルネサステクノロジ データ処理装置
US20070094663A1 (en) * 2005-10-25 2007-04-26 Anbarani Hossein A Flexible ordered execution mechanism for multi-threaded processors
JP4973154B2 (ja) * 2006-11-29 2012-07-11 ヤマハ株式会社 演算処理装置、メモリアクセス方法、及びプログラム
US9325625B2 (en) 2010-01-08 2016-04-26 Citrix Systems, Inc. Mobile broadband packet switched traffic optimization
US8560552B2 (en) * 2010-01-08 2013-10-15 Sycamore Networks, Inc. Method for lossless data reduction of redundant patterns
US8514697B2 (en) * 2010-01-08 2013-08-20 Sycamore Networks, Inc. Mobile broadband packet switched traffic optimization
US20120185741A1 (en) * 2011-01-14 2012-07-19 Sergey Sergeevich Grekhov Apparatus and method for detecting a memory access error
US8502710B2 (en) * 2011-09-13 2013-08-06 BlueStripe Software, Inc. Methods and computer program products for providing a compressed circular buffer for efficient storage of network performance data
US9348558B2 (en) * 2013-08-23 2016-05-24 Texas Instruments Deutschland Gmbh Processor with efficient arithmetic units
US9478312B1 (en) 2014-12-23 2016-10-25 Amazon Technologies, Inc. Address circuit
US10180829B2 (en) * 2015-12-15 2019-01-15 Nxp Usa, Inc. System and method for modulo addressing vectorization with invariant code motion

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4908748A (en) * 1987-07-28 1990-03-13 Texas Instruments Incorporated Data processing device with parallel circular addressing hardware
US5623621A (en) * 1990-11-02 1997-04-22 Analog Devices, Inc. Apparatus for generating target addresses within a circular buffer including a register for storing position and size of the circular buffer
US5463749A (en) * 1993-01-13 1995-10-31 Dsp Semiconductors Ltd Simplified cyclical buffer

Also Published As

Publication number Publication date
KR19980069845A (ko) 1998-10-26
US5924114A (en) 1999-07-13
KR100249631B1 (ko) 2000-03-15
JP3789583B2 (ja) 2006-06-28
JPH10232821A (ja) 1998-09-02

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8131 Rejection