DE1952636C3 - Method for manufacturing a semiconductor device with a Schottky contact - Google Patents
Method for manufacturing a semiconductor device with a Schottky contactInfo
- Publication number
- DE1952636C3 DE1952636C3 DE19691952636 DE1952636A DE1952636C3 DE 1952636 C3 DE1952636 C3 DE 1952636C3 DE 19691952636 DE19691952636 DE 19691952636 DE 1952636 A DE1952636 A DE 1952636A DE 1952636 C3 DE1952636 C3 DE 1952636C3
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor body
- semiconductor
- oxide layer
- schottky contact
- metal electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title claims description 31
- 238000000034 method Methods 0.000 title claims description 6
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 239000002184 metal Substances 0.000 claims description 10
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Description
Die Erfindung betrifft ein Verfahren zum Herstellen einer Halbleiteranordnung mit einem Schottky-Kontakt, insbesondere Schottky-Diode, deren Metallektrode mit ihrem Rand auf einer Oxidschicht aufliegt, die in den Halbleiterkörper eingebettet ist und zusammen mit der Halbleiteroberfläche eine ebene Auflage für die Metallelektrode bildet.The invention relates to a method for producing a semiconductor arrangement with a Schottky contact, in particular Schottky diode, the metal electrode of which rests with its edge on an oxide layer which is shown in the semiconductor body is embedded and together with the semiconductor surface a flat support for the Metal electrode forms.
Ein derartiges Verfahren ist aus der BE-PS 7 04 674 bekannt. Bei diesem bekannten Verfahren wird die Oxidschicht durch lokale Oxydation in den Halbleiterkörper versenkt, um ein planares Halbleiterbauelement zu erzielen.Such a method is known from BE-PS 7 04 674. In this known method, the Oxide layer sunk into the semiconductor body by local oxidation to form a planar semiconductor component to achieve.
Der Erfindung liegt die Aufgabe zugrunde, ein Verfahren zum Herstellen einer Halbleiteranordnung mit einem Schottky-Kontakt anzugeben, welches durch einfache Oxydation eine sich zur Erzielung besonders guter Sperreigenschaften relativ tief in den Halbleiterkörper erstreckende, lokal begrenzte Oxidschicht ergibt, die relativ dünn ausgebildet werden kann. Diese Aufgabe wird durch die im Anspruch 1 angegebenen Maßnahmen gelöstThe invention is based on the object of a method for producing a semiconductor arrangement to indicate with a Schottky contact, which one is particularly suitable for achieving through simple oxidation good barrier properties, locally delimited oxide layer extending relatively deep into the semiconductor body results, which can be made relatively thin. This object is given by the claim 1 Measures resolved
Durch eine entsprechende Ausbildung der Vertiefung wird bei dem Verfahren nach der Erfindung erreicht, daß bei höheren Spannungen tiefer liegende Raumladungszonen, die vom Schottky-Kontakt ausgehen, seitlich an die in der Vertiefung befindliche Oxidschicht anstoßen und dadurch von der Oxidschicht begrenzt werden. Wenn hier von einer Vertiefung im Halbleiterkörper die Rede ist, so ist darunter keine Mesaätzung zu verstehen, bei der — wie bei der US-PS 32 94 600 — sämtliches Halbleitermaterial, welches sich seitlich vom Mesaberg befindet, bis zum Rand des Halbleiterkörpers weggeätzt wird.With the method according to the invention, a corresponding formation of the recess is achieved that, at higher voltages, deeper-lying space charge zones that originate from the Schottky contact, laterally abut the oxide layer located in the recess and thereby delimited by the oxide layer will. If a depression in the semiconductor body is mentioned here, there is no mesa etching underneath understand in the - as in US-PS 32 94 600 - all semiconductor material, which is from the side Mesaberg is located until the edge of the semiconductor body is etched away.
Die Erfindung wird im folgenden an Hand der Zeichnung erläutertThe invention is explained below with reference to the drawing
Die Figur zeigt eine Schottky-Diode mit einem Halbleiterkörper 1, der beispielsweise aus Silizium
besteht. Auf die eine Seite des Halbleiterkörpers 1 ist eine Metallschicht 3 aufgebracht, die zusammen mit dem
Halbleiterkörper 1 einen Schottky-Kontakt bildet Der Halbleiterkörper 1 weist eine außerhalb des Bereiches
der Metallschicht 3 befindliche Ätzvertiefung 7 auf. Oxydiert man bei einem Halbleiterkörper aus Silizium
diese Vertiefung sowie einen parallel zur Halbleiteroberfläche verlaufenden Teil des Halbleiterkörpers, der
sich von der Metallschicht 3 bis in die Vertiefung 7 erstreckt, so entsteht eine Oxidschicht 2 mit einem
parallel zur Halbleiteroberfläche verlaufenden Teil 8 der zusammen mit dem Halbleiteroberflächenteil 9 als
ebene Auflage für die Metallschicht 3 dient, sowie ein in der Vertiefung 7 befindlicher Oxidschichtteil. Dieser
Oxidschichtteil gewährleistet bei entsprechender Anbringung der Vertiefung 7, daß die Vorderfront 5 der
raumladungsfreien Zone 4 des Schottky-Kontaktes auch dann einen oberen Verlauf beibehält, wenn sich die
raumladungsfreie Zone 4 relativ tief in den Halbleiterkörper 1 erstreckt.
Die Oxidschicht 2 wird vorzugsweise durch lokale Oxydatior. des Halbleiterkörpers 1 hergestellt. Um zu
gewährleisten, daß der Halbleiterkörper 1 nur an derjenigen Stelle oxydiert wird, an der die Oxidschicht 2
vorgesehen ist, wird der übrige Teil des Halbleiterkörpers 1 mit einer Maske bedeckt, die eine Oxydation des
Halbleiterkörpers an den unerwünschten Stellen verhindert. Als Material für eine solche Oxydationsmaske
eignet sich beispielsweise Siliziumnitrid.The figure shows a Schottky diode with a semiconductor body 1, which consists for example of silicon. A metal layer 3, which together with the semiconductor body 1 forms a Schottky contact, is applied to one side of the semiconductor body 1. The semiconductor body 1 has an etching recess 7 located outside the area of the metal layer 3. If, in the case of a semiconductor body made of silicon, this recess and a part of the semiconductor body that runs parallel to the semiconductor surface and extends from the metal layer 3 into the recess 7 is oxidized, then an oxide layer 2 is produced with a part 8 that runs parallel to the semiconductor surface and together with the semiconductor surface part 9 serves as a flat support for the metal layer 3, as well as an oxide layer part located in the recess 7. When the recess 7 is appropriately attached, this oxide layer part ensures that the front 5 of the space charge-free zone 4 of the Schottky contact maintains an upper profile even when the space charge-free zone 4 extends relatively deep into the semiconductor body 1.
The oxide layer 2 is preferably by local oxidizer. of the semiconductor body 1 produced. In order to ensure that the semiconductor body 1 is only oxidized at the point at which the oxide layer 2 is provided, the remaining part of the semiconductor body 1 is covered with a mask which prevents oxidation of the semiconductor body at the undesired points. Silicon nitride, for example, is suitable as a material for such an oxidation mask.
Hierzu 1 Blatt Zeichnungen1 sheet of drawings
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19691952636 DE1952636C3 (en) | 1969-10-18 | 1969-10-18 | Method for manufacturing a semiconductor device with a Schottky contact |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19691952636 DE1952636C3 (en) | 1969-10-18 | 1969-10-18 | Method for manufacturing a semiconductor device with a Schottky contact |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| DE1952636A1 DE1952636A1 (en) | 1971-04-29 |
| DE1952636B2 DE1952636B2 (en) | 1980-06-19 |
| DE1952636C3 true DE1952636C3 (en) | 1981-04-30 |
Family
ID=5748604
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19691952636 Expired DE1952636C3 (en) | 1969-10-18 | 1969-10-18 | Method for manufacturing a semiconductor device with a Schottky contact |
Country Status (1)
| Country | Link |
|---|---|
| DE (1) | DE1952636C3 (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2422257A1 (en) * | 1977-11-28 | 1979-11-02 | Silicium Semiconducteur Ssc | FILLING AND GLASSIVIATION PROCESS AND NEW FILLING STRUCTURE |
| DE3030564A1 (en) * | 1980-08-13 | 1982-03-11 | SEMIKRON Gesellschaft für Gleichrichterbau u. Elektronik mbH, 8500 Nürnberg | Semiconductor device for high inverse voltages - with outer layer of pn junction enclosed by peripheral zone |
| DE3530167A1 (en) * | 1985-08-23 | 1987-03-05 | Messerschmitt Boelkow Blohm | Modulator for coherent optical radiation |
| SE465384C (en) * | 1987-09-28 | 1996-06-24 | Carl Eric Jaederberg | Mounting device for two duct sections in one air duct intended for air treatment installations |
| FR2630190B1 (en) * | 1988-04-13 | 1990-08-10 | Niled Sa | WELDING PROTECTIVE STRIP OF TUBULAR ELEMENTS |
| DE19741970B4 (en) * | 1997-09-23 | 2004-07-08 | Infineon Technologies Ag | Edge structure for semiconductor device with high breakdown voltage |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3294600A (en) * | 1962-11-26 | 1966-12-27 | Nippon Electric Co | Method of manufacture of semiconductor elements |
| NL153374B (en) * | 1966-10-05 | 1977-05-16 | Philips Nv | PROCESS FOR THE MANUFACTURE OF A SEMICONDUCTOR DEVICE PROVIDED WITH AN OXIDE LAYER AND SEMI-CONDUCTOR DEVICE MANUFACTURED ACCORDING TO THE PROCEDURE. |
-
1969
- 1969-10-18 DE DE19691952636 patent/DE1952636C3/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE1952636A1 (en) | 1971-04-29 |
| DE1952636B2 (en) | 1980-06-19 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C3 | Grant after two publication steps (3rd publication) | ||
| 8339 | Ceased/non-payment of the annual fee | ||
| AG | Has addition no. |
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