DE1802956B2 - PRINTING DEVICE - Google Patents

Description

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Furthermore, it is generally impractical to interrupt the data transmission or to request repeated transmission.

The object of the invention is to overcome the difficulties of known teleprinter systems and to provide a printing apparatus that can real print lines at high speed of remotely transmitted messages without loss of message data, even during longer intervals of short line transmission.

The object is achieved by a printing device of the type mentioned at the beginning, which is characterized by a plurality of control memories which correspond to the message memories, by

Control characters into one of the control memories in response to each transmitted line feed command character LF which is transmitted together with the message characters, by read-out means for the control memory to cause the document to be fed in accordance with the stored line feed control characters, and by means for preventing loading linefeed control characters into the control stores when the capacity of the message stores to store new message characters is reduced to a predetermined level.

According to an embodiment of the printing device according to the invention are devices for automatic entry of a line feed control character in one of the control memories, if a message mark for printing is stored in the last printing position of a line on the document is, foreseen, the facilities in response to the aroeiten of the facilities are operable to prevent the loading of the line feed control characters.

By means of the printing device according to the invention, message data can be written into line book sub-segments are received and printed out successively in fractional line segments, the Feed of the document is suspended. Since this means that short data lines are not a full line segment in the Need storage, the storage efficiency is increased. Special symbols are printed out to indicate where the function command was omitted or at which point in the text the function command should be run. The printing device according to the invention is suitable for short line situations adapted without the capacity of the memory has been increased for this purpose.

The invention is explained below with reference to the drawing, for example.

FIG. 1 is a generalized schematic diagram of a preferred embodiment of FIG Printing device according to the invention;

F i g. Fig. 2 is a diagram in which the location of Figs. 3a to 3d is reproduced with respect to one another;

Figs. 3a to 3d are illustrations that when assembled 2 is a detailed schematic circuit diagram of that shown generally in FIG form preferred embodiment of the printing device;

Fig. 4 is a detailed circuit diagram the timer and character position generator circuits shown generally in Figure 3b are reproduced;

F i g. 5 is a waveform diagram of the timing Relationships among the sixteen basic timer pulses generated by the timing circuit of Figure 4;

F i g. 6 is a schematic diagram showing the relationship between print hammers and the printing tape of the printing device according to the invention is reproduced

_{| O} general description

A preferred embodiment of the invention is described below with reference to FIG. 1 General described. Printing is done by means of a row individually controllable print hammers 16, which

new uaiensienungen are arranged in a print line on a recording medium 14 opposite one another. A chain outr a belt 10, which carries types, rotates continuously around two sprockets 11 or the like. The types pass behind the print line in repeated succession. The recording medium or document 14 is indexable by means of a paper feed control device 500 so that successive print lines are arranged in alignment with the hammers 16. An ink ribbon can be placed between the document 14 and the hammers 16 to produce prints when the men 16 press the document 14 against selected types on the belt 10, or the document 14 can be coated with a pressure sensitive marking surface, The individually controllable hammers 16 are operated via a zone selection switch matrix? 8 by individual hammer drivers in a circuit 2 (j. The hammers 16 are divided into a plurality of pressure zones, the number of hammers in each zone preferably being the same The number of hammer drivers in the circuit 20 is equal to the number of hammers 16 in a single print zone, and the selection matrix 18 operates to connect the hammer drivers to the hammers 16 of the active zone. since a small number of hammer driver circuits are "time shar." ed «) and a single driver is required for each hammer.

Data to be printed are received serially by bit and character on an input data line having a single channel by means of input signal circuits 200 . Received data characters are transmitted in parallel in bits and in series in characters under the control of feed control circuits 300 to a data memory 30 in which they are temporarily stored and await reading for printing. Format control characters are distributed individually and in groups between the input data characters. The format control characters consist of carriage return CR, line feed LF, tabulator TAB and format feed FF. These characters are decoded upon receipt by the circuits 200 and trigger the input to a control store 40 of predetermined control characters which control the operation of the zone selection matrix 18 and the paper feed control device 500.

The data memory 30 is divided into a plurality of memory groups, each of which is green

has a number of character storage locations equal to the number of print hammers in a print zone. The control store 40 is divided into a plurality of character storage locations, one There is character storage location in memory 30 for each group. The feed and read control circuits 300 and 400 always operate so that by addressing any memory group in the Memory 30 automatically addresses the assigned character storage location in memory 40. the The total number of groups in memory 30 can be selected, however, is as shown Embodiment selected a number equal to three times the number of pressure zones to a total storage capacity to create the same or corresponding three full print lines.

The circuits 200 decode each incoming character and provide an indication of whether the Character a message character or a space character, a format control character, a carriage return * or similar is a leading character, a line feed character, a tab character, or a format character. In In accordance with common messaging practice, each character received comprises an equal number of data pulses, and each pulse represents as a binary 1 or a binary 0. The circuits 200 comprise a shift register and a Switching register for regrouping each input character from serial to parallel arrangement.

When a full data character is put together in the input circuits, it becomes parallel under the control of the feed control circuits 300 to the data memory 30 to be transferred in a predetermined Storage group to be saved. The saved Character read from the memory 30 and by a comparator 22 with a coded character which is provided at the output of the timer and character generator 100. if if this comparison results in a match, a pressure signal is sent from the comparison device 22 sent out, thereby causing the character to be in the desired printing position on the document 14 is printed.

Receipt of format control characters by the input circuits 200 results in the following control processes:

1. If the format control character, or the first of a series of sequential format _as control characters either a CR, LF or FF character, the group in the memory 30, in which the preceding data characters have been placed, separated (with the exception of special Short line conditions (described below), whether or not it is full, and the next group in memory 30 is used to store the next received data characters J ₀

2. If the received Fonnat control character TAB signal is, all character positions are in the data memory between the character position storing the last data characters and a character position representing the TAB position in the print line Character positions filled automatically (with the exception of when working in a Short line situation), with internally generated whitespace characters.

3. If the Fonnat control character is a CR character, the input circuits 200 automatically cause that control bits are entered into the character position in the control memory 40, the is assigned to the newly opened group in the data memory 30, which is responsible for printing of the next received data characters, starting with the leftmost one Position of the print line, effected (position 1 in print zone 1).

4. If dan format control characters LF characters, cause the input circuits 200 that control bit !, be input to the character position in the control memory 40 associated with the newly opened group in the data memory 30, which causes the paper feed controller 500, the document 14 advanced the line spacing before the deck assembly begins printing the next received data characters. When a plurality of LF signals are received, the control bits input into memory 40 are such that they cause? That is, the paper feed controller 500 advances the document 14 a number of line spacings equal to the number of LF signals received.

5. If the format control character is an FF character, input circuits 200 cause a control bit to be entered into the character position in memory 40 associated with the newly opened group in data memory 30, triggering paper advance control 500 to initiate the document 14 to advance to the first print line on the next form (assuming document 14 is a web of interconnected forms) before beginning printing of the next received data characters.

In order to achieve "real-time printing" of the input data, ie printing of each data character essentially the same as the time at which it was received. The reading from the data memory must take place under the control of the reading control circuits essentially simultaneously with the entry of the received input characters into the memory. In order to achieve this and still maintain the separation of reading and supply processes, which is necessary for the memory to work properly, the system is timed by a repeated sequence of timer pulses generated by the timer circuits, each sequence having a basic time cycle certainly. The circuits are synchronized with the movement of the tape nest, as described below, and occur at a speed which is very high compared to the speed at which the input data is received. Each circuit is divided into two halves, the first half being the work of the lead control circuits 300 and the second half being the work of the reading control circuits.

Controls circuits 400. Thus, the input access and / ioutput access to the memory 30 are designed as a time-division multiplex circuit in order to enable "interleaved" feeding of data into the memory and reading of data from the memory.

The read control circuits 400 address the data storage groups and the corresponding character positions in the control memory 40 sequentially, with each group remaining addressed until all of the format operations indicated by the control characters have been carried out and all of the data stored in the group has been printed. When a new group is addressed, the control character is checked by the paper feed controller 500 and any necessary feeding operations are performed before printing begins. When printing begins, the character positions in the data storage group are sequentially scanned and the characters stored therein are compared with the ao encoded output of generator 100 to cause printing. This scanning sequence is repeated until all characters in the group have been printed. Then the next data group is addressed for reading. as

As explained above, the printing apparatus performing a line feed operation can be apparent do not print at the same time. During such periods there must therefore be additional characters in the data memory 30, but no data characters can be taken out of the memory will. Under normal working conditions, when the data is in full rows or near full Lines are printed, enough data is left in memory between line feeds subtracted so that the mean data extraction speed is at least equal to the mean data entry speed and usually exceeds this.

However, in the so-called short line situation, more than a full line of data is received at the input during the period during which the paper feed operation is being performed. This creates a situation where the average data entry speed exceeds the average data withdrawal speed. Usually, short times are random and infrequent, and the capacity of the data memory 30 is sufficient to provide the necessary data storage. However, if a long string of short lines is received, data will accumulate in memory 30 and since the memory capacity is limited, there is a possibility that the system will exceed the memory capacity or buffer capacity of the system and data will be lost.

In the embodiment described here, this disadvantageous condition is prevented by the use of circuits which are included in the output circuits 200 and which check periodically to determine how many groups in the memory 30 have been emptied by reading and are thus available for recording data. If the number of available data groups than a certain vorbesthnmte arrival 6g is smaller figure, di3 system is automatically determined on> Fort Write "-the methods (tail mode) switched This operation is to the storage capacity of the memory 30 to maintain characterized in that the memory with 100% efficiency is used and is designed to increase the average speed of data extraction from memory 30 by temporarily disabling the execution of format control operations. If the system works in the update mode, the format control characters received at the input do not have an automatic effect. table addressing a new group in memory 30 to receive the next data characters. Instead, successive blocks of incoming data are "updated" together in memory, and a new memory group is not set up until the previous memory group is completely filled. The normal response of the system to received format control characters is prevented as described above, and the only effect of such characters is to trigger the entry of an internally generated special character into the memory 30. This particular character, when entered into memory 30, is subsequently printed out along with the data characters and serves to indicate the fact that a format control operation has been omitted while also indicating the location in the printed text at which the format control operation was performed should have occurred.

The system continues to work in the »update« mode of operation until the test circuits indicate that the short-line critical situation is over and an appropriate number is freed from storage groups. This "localize execution is necessarily at the expense of the format of the message, however, it is a guarantee against any loss of the actual Message given itself, although an understandable representation in print is created with as much of the format information as the original message has, the format only otherwise indicated.

Single description; terminology

In the detailed schematic circuit diagrams of FIGS. 3 and 4 showing an exemplary embodiment, standard logic circuits or standard logic circuits are represented by blocks, a brief description of which is given below. The particular circuit design of each block is well within the knowledge of those skilled in the art of digital electronic circuits. To avoid excessive arrowhead lettering on the drawings, all lines connected to either the left or bottom of a circuit block represent input leads, and all lines connected to either the top or right of a circuit block are output leads, unless: that the opposite is indicated by an arrow head on the line.

A block labeled with the & symbol represents a logical AND circuit in which a signal of the upper voltage value (more positive), which is used in the logical system, is generated on the output line when positive signals are present on all input lines. All other combinations of input signals

generate a low voltage signal nation from counter output signals to a

(more negative) on the output line. signal on a separate decoding output

In ODEP circuits is converted on any or line, several input lines a positive signal at the printing unit

Output generated. 5 In an exclusive OR circuit, as shown in Fig. 3b, includes a

A positive output signal is generated when a positive preferred embodiment of a printing unit has a

tive signal on one of the two input lines continuous print chain or a continuous one

and only exists on one. Printing tape 10, which is driven by a motor with constant

A block marked with / represents an inverter ίο speed in clockwise direction by two Circuit in which a positive signal is driven to chain wheels or pulleys 11

the input line has a negative signal at the output. A plurality of types are on the belt 10

transmission line generated and vice versa. arranged and is in a straight line according to

A block labeled D provides a link behind the recording medium 14 onto which

delay circuit that works to get the output 15 to be printed out. On the den

any voltage-moving type present at the input opposite side

to reproduce the pattern exactly, with all the span of the document 14 being a number of

transitions appearing at the entrance to trigger a print hammer 16 to print sixteen line

predetermined time interval are delayed. chen on one line on the document 14. At the

In each monostable multivibrator, any embodiment shown are for purposes of FIG positive voltage transition at the input clarity only sixteen print hammers 16 put a positive pulse of a predetermined fixed duration. It is to be understood that in practice one at the exit. much larger number of hammers, for example

Flip-flop circuits, made of some kind of eighty hammers, can be used to make one a bistable circuit design are to be printed as longer print lines. The Hammers 16 Circuits that have a positive signal are in two equal groups of eight hammers S-input causes the 1-output to be divided positive for the purpose of being in a first zone (the and remains positive, while the O output is the same - first eight data positions in the print line) and in becomes negative early and remains negative, and at which a second print zone to print (the second chen causes a positive signal at the input, 30 eight data positions in the print line). Attacks that the O output becomes positive and remains positive, a print hammer at the time at which while the 1 output is negative at the same time, a type on tape 10 will be in precise detail and remains negative. A flip-flop with a positive direction with the hammer, leads to "flic level at the 1 output being called a flip-flop gender" generating this print mark on the denotes which is 35 document 14 in the set state. In practice, there is an ink ribbon between, and if there is a positive level at the 0 appearance, the hammers 16 and the document 14 are present. it is arranged as a flip-flop in order to provide color for this operation, referred to reset state. A flip-flop The document 14, once it has been set, can then only be fed out of the plane of the drawing by means of the paper feed to a positive signal at the input to the control device 500, which makes it possible Initial state), and when it is in light, a plurality of print lines on top of each other in the reset state, it speaks to generate next.

only on a positive signal at the ^ -input The printing tape 10 carries a plurality of in

at. equally spaced types which the

A block marked with a gate represents a gate- 45 different characters of a complete alpha-

circuit, which represent a plurality of logical AND numeric type series. Two converters

Includes circuits, each of which receives a signal, 12a and 126 sense time stamps on tape 10

that fade in at one of its two inputs and generate an impulse when responding

become sou, end of which each a fade-in signal to each brand. The transducers 12 can, for example

the other of its inputs receives the one 50 magnetic pickups, the slots or gears

Glare signal input line is fobbed off by an arrow head drive teeth on the belt 10, or you can-

and be a positive signal on their photocells, the openings in the belt 10

activates all AND circuits in the gate. feel. The transducer 12 a senses a single time

A mark, divided into sections 1, 2, 4, etc., is attached to tape 10 for each type, and each block represents a binary counter in which a pulse generated in this way causes a positive signal at the ADVUP input as a character pulse CP. The transducer 126 senses a single time that the mark shown on the output lines on the tape 10, and the binary number advances by a count of 1 when responding and the pulse generated thereupon is denoted as an incremental pulse at which a positive signal is indicated at RESET-O-Em As can be seen below, this function causes the initial state of the counter fc »impulses for the timing of the operation to return to 0 (negative signals on all logic circuits, the output lines with the speed). A pulse is generated on the transmission of the movement of the printing tape 10 exactly synchronous output of the counter every time it has to be siert.

The initial state changes from all positive to The distance between neighboring types

all negative output signals changes 65 to the printing tape 10 is exactly IV »of the distance

A block labeled a decoder is one between adjacent print hammers 16. This The decoder which is connected to the output of a ratio is shown in FIG. 6 reproduced in detail. Counter is connected and each particular combination In Fig. 6 there are sixteen print hammers in aic

an i blocks numbered from 1 to 16 are shown, angsi- ⁽ 'ύ and a segment of tape 10 is shown what

1 moves past the hammers 16 to the left. j | Since the distance between the types is exactly IV7

M is the distance of adjacent print hammer BE, x is 1 can be seen, that only two print hammers voreinc m hands, the g to the in F i. 6 again Jj given point in time are in exact alignment with nter M of a type. These are hammers 1 (the first white hammer in pressure zone 1) and 9 (the first one of ■■ hammers in pressure zone 2, which are in alignment with the 110 'm types A and H, respectively. After 9 the printing tape 10 has moved a distance .15 to the ■ left (the distance between the communication I line of type B and the center line of hammer 2), the hammer 2 and 10 are in alignment on S ^m ' ¹ of type B or /. At a later point in time, types C and J move in alignment with hammer 3 and 11, respectively. The complete scanning sequence of eight hammers is shown in the diagrammatic representation of FIG. 6 reproduced, in which the first order is shown in which the types select S rend of the hammers come in alignment with the te 1. A complete scan cycle if I comprises eight time intervals TS to TZ, which are shown on the D 1 left-hand side of this illustration ie I The condition on the belt 10, as it is given in Fig. 6 again-I I, is that which belongs to the time interval 75, 1 I. The total extent of the belt movement is 1 I in the column S on the right side of the illustration given i I. It is to be noted that at the start, j to the time interval TS of the next Abtastkreislaufs, Ϊ the types B and / herself f in alignment with the heme are numbers 1 and 9, respectively, and that when the Cycle j continues, every hammer there r offered type

■ the type to the right of the type is the same Hammer on the previous scanning circuit

|; has been presented. If so sixty-four

■ Different types are available in the series ^r ₍ are 64 times the time cycle 7 * 5 to TZ is required-

I borrowed to bring the full range of types to any hammer. This is therefore the maximum time that is required to have a full 8 character zone! of data to print.

j As explained in detail below, is

J each of the eight main time intervals 75 to TZ divided by the timer circuits 100 into sixteen smaller time intervals TO to Γ15 A "main time cycle" thus represents the time that that for a single pass of the main time intervals 75 to TZ (time for a sample of eight Hammering is required) and "idle time cycle" is the time required to cycle through time intervals 70 to 715 (the time between the point in time at which a type is in alignment with a given hammer and the point in time elapses to which the next type arrives in alignment with the next print hammer on the right). Therefore, each main time cycle is divided into 128 auxiliary time intervals. It can then be seen that no two print hammers in the active print zone are exactly closed for correct printing. can be operated at the same time, since no two hammers are in exact alignment with the types at the same time within a pressure zone. As is known, this arrangement serves to save components, since a single comparison device can be used to generate hammer actuation pulses, and these pulses do not need to be temporarily stored in secondary memory, but can instead be used to trigger the hammer; used at the time of their creation. Of course, when this arrangement is used, the data characters stored in the memory 30 for each printing position in the printing zone must be read and presented to the comparison device 22 in synchronism with the order in which the corresponding printing hammers in the zone align with the types.

According to FIG. 3 b, the hammer drive circuit 20 comprises eight separate hammer drivers. These eight drivers correspond to the eight print hammers in the print zone. Accordingly, each driver output line is b via the gates 18a and 18 with a print hammer in each pressure zone connected beispiels-

the first hammer driver is connected to hammer 1 via gate 18a and to hammer9 via gate 186, etc. The gates 18a and 18b are activated by the mutually exclusive outputs of a zone flip-flop 44. Consequently

he can print in only one at a time Take place in the pressure zone.

Each urinary driver in circuit 20 is conditioned to be actuated by one of eight input lines 406 coming from reading control circuits 400. As discussed below, conditioning signals appear sequentially on these input lines in synchronism with the occurrence of main cycle intervals 75 through TZ.

The comparison device 22 receives an input signal with six parallel bits from the character position generator 150 and compares this with an input signal of six parallel bits from an input-output register 32 which is assigned to the data storage matrix 31 of the memory 30. At the time interval 712 of each secondary cycle at which data present in the register 32 is to be printed, an AND circuit 441 generates a signal which activates the comparator 22 and causes it to generate a pulse at its output when the two signals comprising six bits, which have been fed to the comparison device 22, correspond to one another or match one another. The output signal of the comparator 22 is fed to an AND circuit 23, which responds during the printing time (all preparatory line feed operations are ended) by transmitting a pulse to the driver circuits 20 This activates the selected hammer driver circuit to print a character in the active print zone . The actuation signal is also transmitted back to the read control circuit 400 in order to prevent the data character Iu from returning to its place in the memory matrix 31 in the register 32.

Timer and character position generator 100

As shown in Fig. 3b, the timer and character position generator 100 includes a clock Circuit 101 to generate the sixteen slave loop timer signals 70 to 715 and the character position generaior 150 to create a six

13 14

comprehensive ALsgangssignak to generate the impulse. Therefore, the oscillator 107 can merö

«Facility 22 to show which type is working in exactly 128 cycles before it is because Λ

direction in the active pressure zone while each is switched off. The oscillator 187 works with mer 0

In-time cycle during a printing process during ^{% s} * h » the time between CP pulses, Dah

Alignment comes 5 when the printing tape 10 moves at low speed T 3 de

e details of circuits 101 and 150 speed moved. Therefore, the short oscillator side ensures

shown in Fig.4. The circuit 101 pause, which at the end of each main time cycle on- in Ai

t a flip-flop 103, the 1-output -nit occurs that the oscillator 107 actually exactly to the pressure

Toroscillator 107 is connected to the one train time of occurrence of the next CP pulse zone Square waves are generated as long as the output io is faded in, even if the printing band direction is correct Flip-flops 103 is positive. The oscillator voltage increases speed and the next CP pressure

transmit. », in order to receive the signals from a decoding pulse a little before the point in time at which zone

ikreis 113 to be displayed and a counter 111 chem it should usually appear. Of course- Stronr

Tortzuscnanen over the delay circuit 1U9. ucn wiru mc cratmaiui _H au ^, ..w .... j: - p—. t , "_

The flip-flop 103 is reduced by the character pulse CP, 15 speed, simply by one bit behind!

which is generated by the converter 12a (FIG. 3b) is extended. Nebe

The character generator 150 is also shown in FIG

Counters 401 in the reading control circuits 400 F i g. 4 reproduced, and it has a six digit pressure

reset. lungs comprehensive binary main counter 151 on, the hami

The decoding circuit 113 responds to each grain 20 so connected. that he entered a zone through a gate 153

Bination of binary signals on the four output six positions having binary secondary counter for

lines of the counter 111 in that a positive feeds. The secondary meter is in two three-digit groups "

tive output signal on one of the sixteen halves 169 and 171 having openings for the next

Output lines 7 "0 to 715 is generated. Standing signals are subdivided for purposes of description. Show«

of these lines, which are activated by the oscillator 107. The main counter 151 is counted by each CP

are dazzled, represent the sixteen auxiliary time pulse incremented by one count. Thus, 1

Intervals TO to 715 are . In response to the main counter 151, a special coded signal konr

for a completely negative output from the print V for each of the 64 different types

Counter 111 is generated and 715 corresponds to a full band 10. The successive appearance of this ersi

constantly positive output signal from counter 111. 30 signals represents the order of presentation of the win

The output signals from the oscillator 107 together represent type symbols on the print hammer 0 (an imagi- and

with the sixteen timer pulses 70 to 715 nary digit, which by a hammer distance on the!

are in the waveform diagram of FIG. 5 on the left side of hammer 1). aj

shows. The gate 153 is from an AND circuit 159 Dn

The generated by the delay circuit 109 activated 35 to the count of the counter 151 parallel tough

The delay is approximately equal to half the length to be transmitted to the secondary counter 169, 171. This time

negative dwell time or idle time between each transmission appears at time interval 72 during am

two positive output pulses of the oscillator 107. of the first main time interval 75 (determined by act

This delay is required in order to prevent a 0 output of the decoding circuit 405) every wit

that the signals from the counter 111 through the 40 main timing circuit during the push. 22nd

During this time, the decoder is faded in. The immediately following 7 3 signal activates an im

the one during which the counter 111 switches. Furthermore AND circuit 165, which in turn causes

is, since the signal which the flip-flop 103 back- an AND circuit 161 generates a signal when the

represents to turn off the oscillator 107 , at 715 the pressure zone 2 is the active pressure zone, or the de

of the last secondary time interval of a main time circuit 45 causes an AND circuit 163 to generate a signal

run is generated, demonstrates a delay circuit 105 when the print zone 1, the active print zone 1 *

required to prevent the last one from being 715- . A signal from AND circuit 161 is directly O '

Output of the decoder 113 is short-circuited. into the eighth position of the secondary counter 169,171

Since the frequency of oscillator 107 is fixed and wear, which causes a count of 1 *

since the operation of the plant depends on the addition of eight to the 50 count just received by ei

Output of the oscillator 107 at the rate the main counter 151 was introduced. A signal Z

of the printing tape 10 is synchronized, the AND circuit 163 goes through an OR el

Knowing precautions are taken to low circuit 167 and will go straight into the first el

Fluctuations in the belt speed are taken into account by the secondary counter 169, 171 , whereby h ¹

sight. This is done by setting the period 55 causes win '. That a count of I added 0

of the oscillator 107 is equal to the Viso of the time that will be. C.

Print ribbon motor operating at rated speed, the reason for adding the I T count

needed to move the printing tape 10 by a distance or 8 at the secondary counter 169, 171 at the beginning of each S

exactly equal to the distance between zsvei neighbors- main timing cycle during pressing is in 1

th types (the time between CP-Tmpul- 60 the fact that the main counter 151 has a code s

sen). The counter 401 (Fig. 3a), which creates the oscilloscope reference for the imaginary O-pressure hammer '·

to the flip-flop 103, is a and that, in order to have a correct reference for the first ·

three-position binary counter, which can be created by hammer in pressure zone 1, a counting '

each CP pulse is reset and must be added after the value of 1, while the

the time interval 715 of each secondary time cycle around 65 Creation of a correct reference for the first ham-

a count is incremented. The carry signal mer in print zone 2 adds a count of 8

of counter 401 will thus have to be added to the end of the eighth. The number 1 is used because '

Secondary time cycle after the appearance of each CP- the pressure hammer 1 by one type from the urine-

15 16

r7 is mer θ away, and the number 8 is used. that a sequence of error signals is the wrong one

sr because the hammer 9 indicates eight types of urinary work of the system and the detection

it merO is away. such a sequence can for example be used

3, Therefore, at time interval 753 (sub-interval will light up an error indicator

»- 73 of the main pinterval TS) to let the air, output signal of the 5 and to prevent further printing,

r- sub-counter 169, 171 the character code of the current during a non-tracking tape recording

f- in alignment with the hammer 1 coming device or the like is activated to the input

n print mark if print zone 1 is the active message for later printing according to the corresponding

s zone is, or to save the character code of the currently in correction of the system,

l · direction with the print hammer 9 coming to _ _nn

Pressure mark when the pressure zone 2, the active input circuits 200

Zone is. The OR-D'.e adds input circuits 200 to the time interval 7 "Sl5 in FIG. 3c

Circuit 167 the secondary meter 169, 171 a white and 3d shown, and they include JIe electricity

■ tj subsequent interval TT the counting in the 15 A character reception and decoding circuit 202 j secondary counter 169. 171 the character code of the character receives the transmitted input data in the form ι j represents that with the print hammer 2 when a serial bit series character by character from j print zone 1 is the active zone or with the pressure of the input gate line and collects each character r 'hammer 10 comes into alignment when the print zone 2 is the active zone in a register with a single serial input. Similarly, 20 and a parallel output. Anytime. j at the time interval Γ15 of each of the following main- at which the register a full character is supplied to circuits TU to TY a further single count, the circuit 202 generates a positive on the secondary counter 169, 171 added to an on output signal on one of the six output line display of the character to generate the urge to indicate what kind of character empmeni 3 to 8 when rite print zone 1 the active zone as has been caught. Data and spaces will be is. or with hammers 11-16 in parallel alignment by bits coming out of the register and over if print zone 2 is the active zone. Gate 206 and an OR circuit 208 in which the main counter 151 is incremented by 1 when the next main time cycle is initiated by the character storage location of the memory matrix 31 over-appearance of the next CP pulse, which is then followed by one of the eight characters, the main counter 151 is incremented by 1, 30 address lines 304 and one of the six memories and the slave counters 169. 171 is addressed by a weighing group address line 312. The repetition of the circuit described above properly gate 206 is set by an AND circuit 214. It can therefore be seen that when the activated activated by the first Π signal takes place, the output of the slave occurs after the data line goes positive. Counters 169, 171 is a six bit encoded 35. The same output signal from the AND circuit symbol is representative of the types which in turn cause one OR circuit 228 to generate another in alignment with the hammers of the feed signal which is the Data characters get into the active print zone. This 6-B signal is input to the memory matrix 31. The output signal, as previously described, from the comparator from the OR circuit 228 is used for various purposes 22, hammer actuation 40 other purposes to generate pulses described below. The character position generator 150 receives address counter 301, for resetting a flipterhin as an input signal the incrementing pulse, flops 226, for resetting a flip-flop 331, which is detected by the converter 12b. This Si- for setting a flip-flop 333 and for the Kongnal is fed to an input of an AND circuit 45 ditioning an input of an AND current 157, the other input of a circuit 284.

OR circuit 155 signals are fed if the received data character is not a blank with all six output lines of the counter is sign, an AND circuit calls 218 151 is connected. The AND circuit 157 produces 8-character bits, which is a "signal" bit, an error signal indicating the fact that the 50 has passed the gate 206 along with the token Counter 151 is not entered in sync with the print tape 10. As related below chronism is located. When the two are written to in sync with the memory read process chronism, if the incremental pulse appears, this character bit is used to whenever the counter 151 determines in its that in memory 30 to be printed, O output state and all inputs of the 55 chen are available. If the received data j OR circuit 155 are negative. If the character is a space, a j stepping time of any input of the OR inverter circuit 222, which is connected to the empty output j circuit 155 is positive (if the main counter of decoder 202 is connected, the AND current 151 is not at 0), causes the error circuit 218 to be made ineffective, so that the additional signal the AND circuit 157 prevents the 60 addition of the signal bit from being reset. The empty counter 151 to 0 over the delay circuit character is thus in its effect a space] 156. Such an error signal usually appears in memory 30 somewhere.

! once (while the system is switched on) to If the received character is any of the

j to produce initial synchronism when format control character is CR, LF or FF is working

the belt 10 initially comes up to speed. 65 a gate 204 to the first time interval Tl, after-

No means are shown, in addition to which the output of the circuit 202 becomes positive,

to act on the error signal, as such means do not cause an output of

Form part of the invention. It can be seen, however, an OR circuit 232 for setting the

209 535/408

17 I »

Gnippen flip-flops 331 is transmitted. This data character received at the input subsequently _w ,

The output signal also has the effect that the first print hammer in zone 1 _includes

Reset flip-flop 333 is printed via an AND circuit. _e i _nge

337 and an OR circuit 335 back by fading in an LF signal through the ^ ₁₆

set and set a flip-flop 254 . Furthermore 5 gate 204 _{is exerted in} addition to exercising the above

conditions the output signal from the OR current written function still an AND current ^ e

circuit 232 partially includes an AND circuit 236 which activates circuit 291 to cause an OR of _the

is used to fade in a special circuit 292 a monostable trigger circuit 293 trig _bits?

ren "Fortschreibec character Gert in the memory 30, whereby a pulse is erzeugt_ which the _fo hn

to trigger under conditions that are below »o line feed number 294 to continue a payment .

to be discribed. switches. The output of the counter 204 becomes _w j _r d

The setting of the flip-flop 331 triggers a faded in by a gate circuit 296 to in certain

monostable flip-flop 345, whereupon a pulse to be included the control character, which is in _C nts |

iiivr oin ι iisin-Tnr 321 and an OR circuit the control storage matnx 41 is entered. That the

315 is transmitted to the storage group 15 by aas ιογλμ 8 ^ιΙΚΓι - '"- ^ ¹ " ^o: ö—'"Kii.itu _1N

address counter W9 to advance a count. also an AND circuit 274 and an _en d,

The counter 309 is a three position OR circuit 278 to set the overflow flip-flop Eini Binary counter, the outputs of which must be reset to a decoder 280.

Circuit 311 led to a signal fading in an FF signal through the gate

one of the six memory group address lines 20 204 continues to perform in addition to the above ^ _ε ,

312 to generate. Each of these lines causes the functions described to activate an _n äc

when activated, there is a separate TJND circuit 268 to cause a _n c

Storage group receives input data. Thus, OR-Stromkre.s 270 a flip-flop 272 sets. _n äc

The setting output of the flip-flop 272 generates an on

catch of a CR, LF or FF character automatically 25 bits, which is included in the control character I

the addresser «of the next storage group should be in and which indicates that the advance of the

a sequence, regardless of whether the previous document 14 to the first Druckstellimg of the

Storage group completely filled with data characters on the next form is required. Still in

is or not. Since there are only six groups in the matrix, the output of the flip-flop 272 makes over stel

31 are present, the 5 -th output line 312 30 an inverter 295 a gate circuit 296 is ineffective

to the input of an AND circuit 313 together, whereby an O-line feed count η the in

fed back to the counter 309 is brought on every sixth control character, regardless of the Ve

Reset counter increment pulse to 0. Number produced at the output of counter 294 24 (

The setting of the flip-flop 331 becomes is. Reception of arht or more consecutively

Furthermore, an AND circuit 343 partially konr 35 the LF character causes an _au i

ditioned in order to produce a counter disable function- Carry output is produced, whereby the du

call, during a tabulation process, flip-flop 272 is set. Thus generate more one

as described below. as seven consecutive LF commands automa- Str

By resetting the flip-flop 333, the table becomes a head-off-form command. _w j,

this flip-flop ready to respond to a subsequent input 40 Will the work of the input circuits 200. Ai

Addressing the control signal from the OR circuit 228, as far as it has been described so far, summarized, _p0

in order to add a control character to the control memory matrix41, every data and space character that appears on the _s jg

as described below. Data input has been received through gate J ₄₀

By setting the flip-flop 254, the system 206 is in the memory matrix 31 at the particular Sti

put on standby, a "Fortschreibeprüffolge saved" 45 character and group site that of the _n ä

traversing at a later time as feed address lines 304 and 312 is determined. Ze

it will be described later to determine the number of times that any of the format control characters 32 are received

memory CR ₁ LF or FF available for receiving data causes the feed control le ·

groups in the matrix 31 to be determined. Circuits 300 the next storage group address- O

Fade in a C7? -S: signal through the gate current 50, and the various control flip-flops 256th _ga

circle 204 causes in addition to exercising the straight 266 and 272 and the line feed control counter 294 dt

The functions described continue to be set to suit the various format χ _χ

of a flip-flop 266 via an AND gate 264 and control processes to be displayed by the received cc

Furthermore, a reset of a flip-flop 280 via format control characters can be requested. -,

an AND gate 276 and an OR circuit 278. 55 Then triggers as soon as the next data character si

This latter flip-flop 280 acts in an »over- from the output of the AND circuit 214 in the B run «situation as described below, memory is entered, the OR stroke circle 228

to automatically cause a line to (by setting flip-flop 333) the monostable Ie

feed control bit is generated, which in the trigger stage 347 to make a gate 242 effective. F. Control character is included, which is stored in the 60 This will save the character (including a

chermatrix 41 is entered. Signalbiis) in the control memory matrix 41 IS

Setting the flip-flop 266 causes a give. A delay circuit 349 is connected to the a

OR circuit 258 provided the pressure zone flip-flop output of the monostable multivibrator 347, a <

256 sets, whereby the set output of thus the output pulse of the OR circuit d

If this is positive, a count in the counter 294 is input to the inclusion of a 65 228 time

Provide print zone 1 as the bits determining the active zone if such a process occurs through the s.

, '. ρ to produce the control character. This causes the set state of the overflow flip-flop 280 S

as described below that the next is required. I.

19 20

When the gate 242 opens, a seven bit in the same direction 244 generates a positive signal to a comprehensive control character in the memory array 41 at its output, if a match is obtained. If the output of the comparator 244 consists of a signal bit, * wei (mutually positive mutually exclusive at time 72 or 73 of the test circuit) bit from the output of the pressure 5, it is known that less than two empty zone flip-flops 246, one bit from the output chergruppen in matrix 31 for reception of the head-off-form flip-flop 272 and three input data are available. Should, however, the off bits that are supplied by the line feed counter 294 in the comparison device 244 during any time. Before the character position in the memory matrix of one of the time intervals 74, 75, 76 or 77 of the 241, at which the control character is stored, becomes positive in the test circuit, it is then known that the memory group address lines 312 determine that there are more than two available memory groups. The active address line of this group are.

corresponds of course to the storage group in The reason for these provisions is as follows:

the memory matrix 31, which is then addressed. The reading control circuits 400 can be used at

After the input process of gate 242 has been completed, no 15 addressing of memory groups for reading

f? ^det wilim ^ h, ^m rt, ^ l? ^oßenmass i ^Iom ^ ^reis 311 ^d S9 ^{mak in front of the well} see, the ßesenwärtsie under input pulse through to the flip-flops 272, 266 of the control of the supply control circuits 300 · data

and 280 are reset and the counter 294 is fed to zero. If thus the reading can be traced back. The control circuits are thus completely synchronized with the feeder, restored in preparation for the generation of the 20, the reading control circuits 400 address the next control characters in response to the same memory group as the feed control current next received format control characters or the circuits 300. Thus, no data can be received in any of the next received format control characters at which of the other five storage groups are present, input. _unc j _a j | _e five memory groups are thus available for buffers in the input circuits 200, 25 memories are still available. This means that if the test circuits are provided, which are periodically driven by the supply group address counter 309 by the sixth level of the availability of memory groups, determine an off in the memory matrix 31 in order to provide a fixed access signal from the comparison device 244 as to whether the system is for Update mode of operation is not received from time T1. The output must be switched. The main circuits 30 signals of the comparator 244 at the time in this group are flip-flops 254 and 240, a dots Γ6, TS or 74 means that four, three comparators 244 and an AND circuit or two available (empty) memory groups are available - 24h. At any point in time at which there is a starting band.

signal from the OR circuit 232 when responding When the reading control circuits 400 by four

on the passage of a CR, LF or FF signal 35 memory groups behind the feed control circuit through gate 204, the flip-flop 254 will be 300, only one memory group is set to, whereby the right input for AND reception of new input data free. In this situation, circuit 252 conditioned, comparator 244 generates an output. Thereafter, as soon as the data line is signaled during the second time interval 73 of the response to the receipt of a data character 40 test circuit. In the worst case, when positive, the AND circuit 252 is an output the read control circuits 400 by five storage signal, which AND circuits 341, 238 and 246 groups behind the feed control circuits 300 conditions or makes effective. When the AND _s i _na , j _s t reaches the buffer capacity of the memory, circuit 341 is so conditioned, the _un d there are no memory groups to accommodate the next 72-, 73-, 74-, 75-, 76- and 77- ₄₅ new input data available. In this case, the timer signals that are received from the OR circuits, the output signal of the comparators 244, 323 and 325 at the OR circuits 327 at the time interval 72, are applied to the first time, by the AND circuit 341 at the interval of the Test circuit.

OR circuit 315 is applied, which is connected to the In the described embodiment

output of the feed group address counter 309, each of these last two buffer states is considered to be critical. These six incremental pulses drive the designated, and they require that the system is switched to the state of the six output lines 312 of the de-update state in order to prevent a coding circuit 311 over a full cycle of loss of data,
^ n and leave when the 77 timer ends- This is done as follows: The AND current-

signals energizes the same output line that was energized to circuit 246 receives an input signal from the beginning of the test circuit. OR circuit 323, which during each of the time

The same 72 pulse that the test circuit input signals 74, 75, 76 and 77 is active. On conducts, activates AND circuit 238 to set an output from comparator 244 flip-flop 240. during any of these time intervals

The comparator 244 thus compares the 60 that the AND circuit 246 has an output pattern of the signals on the six feeder group signal after a short delay that of address lines 312 caused by the pattern of signals in a delay circuit 250 on the six read group address lines 412, is generated. The latter is intended to be earthed from the reading control circuits 400 that the signals can be transmitted on the input lines are. The active line of this latter address 312 to the comparison device 244 is fixed 412 shows the memory group that the or form before the comparison result is checked Memory matrix 31, which is currently from the Ver. The output of AND circuit 246 equals device 22 is read, and the adjusts the flip-flop 240 back, which is caused by the

/ 15

22nd

Output from AND circuit 238 has been set at the beginning of the test cycle, and it also resets flip-flop 254 through an OR circuit 253 to deliver the test sequence break up.

As described above, the AND gates 307, 337, 321, 239, 264, 268, 291, 276 and 274 are conditioned or made effective via the reset output of the flip-flop 240. Conditioning this

which occurs after this work sequence is activated
an AND circuit 216 to generate a fade-in pulse to override the particular character
the port 210 for storage in the memory matrix
31 to transfer. The output of AND circuit 216 also causes OR circuit 228 to provide a clock pulse for input
of the character is generated in the memory, the flip-flop 331 resets and the flip-flop 333 sets.

AND gate is required to allow the inputs to operate. This output signal from the OR input circuits 200 and the feed control circuit 228 makes the AND circuit 284 effective, allowing circuits 300 to operate normally If, however, it has been determined that progress triggers the monostable multivibrator 293 when the write mode of operation is required, ie an out-overflow flip-flop 290 is output signal from the comparison device 244 in FIG. 13 in the set state is located. As a result, under beschne time interval below Tl or Ti is present, not surrounded certain circumstances is generated bit, which is Schlos evidence in the control character, and the flip-flop 240 remains at the end of sen line spacing control output signal from the AND circuit 246 ER- be target. At a later point in time, the test circuit fades in the set state. Therefore, the output signal of the monostable multivibrator 347 remains inactive, the above-mentioned AND gates, ao that acts via the delay circuit 349, and normal operation of the system is prevented. Control characters in the memory matrix 41, after which the flip-flop 254 is reset by the timer pulse, the same pulse that is reset via the delay current T 7, which acts via the OR circuit 253 circuit 351, the counter 294 to 0, the effect Output of the OR circuit 228

Once the system has entered the update state, the operating mode is as follows: and the OR circuit 305 to advance the character address counter 301 received from the input circuit 202. Furthermore, as described above, the output signal of the delay current is input to the memory matrix 31. If any circuit 230 returns the flip-flop 226 , thereby preparing which of the format control characters CR, LF or FF 30 to be received by the next format, the resulting control character is set to be set during the output signal from the OR Circuit 232 the
Flip-flop 331 set as described above with the result that the following output signal of the monostable multivibrator 345 has no effect
has due to the inoperative state of the AND circuit 321. The flip-flop 254 is also
set in the usual manner so that upon receipt of the next data input character, AND circuit 252 is made operative to initiate flip-flop 240 into its reset update test circuit. stood returned at the end of the cycle, so that

This is of course necessary in order to make the AND current system generating an update character out of the update state ineffective 236 and to switch the fade in when such a process is justified by AND circuits 307, 337, 321, 239, 264, 268, 291, is done so that the required number of memory 45 276 and 274 are made effective so that the groups are cleared. System their normal response to format control

The output signal from the OR ^ Stnnnkreis232 further makes the AND circuit 236 effectively, has been made operative through an inverter 234 from the output signal of the flip-flop 240, the output signal of the AND circuit 236, which acts via an OR circuit 241 provides, a flip-flop 226, whereupon an output signal appears from this which has an eh »update character

generating circuit 224 is activated and has a storage capacity of 55 for eight data characters. Each AND circuit 216 after one of a delay memory group can individually activate a delay caused during a data circuit 220 from one of the six feed groups. The length of the address lines 312 to be addressed by the circuit. Each group 220 caused delay, the length can be exceeded individually during a reading organization by des ZehmtervaflsTl to be addressed prematurely by one of the six reading group address lines412 generation of an update character under certain circumstances. Every time! 'to prevent aispeicherstelie in the circumstances. addressed group can be addressed individually

The stream generating the update character for the supply of one of the eight supply character circle 224 generates at its output a seven Bh address loans 304 and jum reading of a comprehensive code character, which is g ^ wnnsdües «5 of the eight AWesezetchenaoressenleittiögen 406. An aai *""* - - ^ '' - * * - * ~ ~ the cable 209 from the ZuRhrstromkrcis 200

handenes input data character is in the adres catalyzed character position of the addressed memory group

Update mode is received, whereby
another update character is generated and in the
Memory is entered.

Any of the format control characters. CA, LF and FF,
that is received while the system is in the update state, the flip-flop 254 sets
and triggers another update test cycle. If the update status is canceled,

sign again aeen canoe.

Memories 30 and 40 and feed control circuits 300

The data memory 30 comprises an arbitrarily accessible data memory matrix 31, for example one
Magnetic core storage matrix with six groups of
Data storage locations. each group of which one

indicates particular pulling, for example e ** »en stent, which is stored in a register 212 together with a signal bit . The next Tl signal,

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guided by one generated by the OR circuit 228 as described above Feed signal.

A signal is generated during a reading process from an AND circuit 431 that the data character which is in the from one of the lines 406 is stored in the memory group selected by one of the lines 412, via the cable 33 to the input-output register 32 is transferred. This register 32 carries the character over the cable 34 to the comparison device 22. A signal from the AND circuit 437, which at time 714 is generated, causes the character in register 32 to be returned to the storage locations in matrix 31 from which it was removed.

The control memory 40 has an arbitrarily accessible memory matrix 41, for example a magnetic core memory matrix, an output register 42, an output gate circuit 43 and a zone flip-flop 44. The matrix 41 has six storage locations for seven-bit characters, and each storage location can be individually addressed for feed operations from one of the six address lines 312. Each character position in the matrix 41 can still be used for reading operations from one of the six address lines 412 can be addressed individually.

When the gate 242 is open, a seven-bit control character is introduced into the control store at the memory location which is then addressed by one of the address lines 312. If the AND circuit 445 is activated at the time interval 7 * 8, the characters present in the memory creation, which is then addressed by one of the solutions 412, are transferred to the output register 42. During the subsequent time interval T 9 , AND circuit 521 generates an output signal which opens gate 43 and causes zone flip-flop 44 to be set or reset, depending on the print zone bits stored in the control character . Gate 43 also feeds the head-of-form and line feed control bits into paper feed control circuits 500.

The feed control circuits 300 are shown in FIGS. 3 c and 3 d reproduced, and they include those circuit elements which are provided with a reference symbol of the grater 300. In the course of the The above description of the input circuits 200 include all of the functions of the circuits 300 Except for those relating to the tab entry process have been described. Therefore This section provides a brief summary of the design and operation of the feed control circuits 300 is given, which is followed by a detailed explanation of those parts of the circuits 300 that are related to the tab input function belong.

The essential elements of the circuits 300 are the feed character address counter 301 and the Decoding circuit 303 as well as the feed group address counter 309 and the decoding circuit 311. The three-digit binary rate 301 is generated eight special combinations of outlets, each of which causes a different one of the eight output lines 304 of the decoding circuit 303 is excited. The payer 301 is positive through every Signal incremented by one count derived from OR circuit 305 from either Delay circuit 230 or the AND circuit 339 is presented, the latter choosing end of the tabulation process according to the following: Description comes into effect. The counter 30] is reset to 0 by an output signal from the AND circuit: 307, which occurs when the gate; 204 is generated when a CR signal is faded in. A carry signal from counter 301 indicates that all eight characters of a memory group filled

ίο are. This signal causes the AND circuit: J17 transmits a pulse, provided that the A \ .si2ang of the AND current circuit 343 is negative, and via the OR circuit 315 to the feed group address counter 309 to advance to the next count. The carry signal also represents the flip-flop 333 back via the OR circuit 335 and changes the output state of the Print zone flip-flop 256. This latter process occurs as follows: When flip-flop 256 is in is in its reset state, the AND circuit 262 is partially made effective or conditioned, and AND circuit 260 is disabled. If at this time the carry signal appears, the flip-flop 266 is located

»5 for the carriage return in its reset state, and the AND circuit 262 produces an output which causes the OR circuit 258 to set the flip-flop 256, thereby producing a data bit for the print zone 1 which is in the stamp should be included. If the flip-flop 256 is set at the time of the occurrence of the carry signal while the flip-flop 266 is in its reset state, the AND circuit 260 generates an output signal to reset the flip-flop 256 and a data bit for the Cause pressure zone 2 to be included in the control character. If it is thus assumed that the flip-flop 266 remains in its reset state for the carriage return, the output state of the pressure zone flip-flop 256 is reversed by each transfer signal from the counter 301. Of course, if, as explained above, the flip-flop 256 is set in response to a CR signal, the print zone flip-flop 256 is forced into the set state and any carry output that occurred prior to the resetting of the flip-flop 266 is generated has no effect on the pin zone flip-flop 256. The counter 309 has a six-count circuit for sequentially energizing the six address lines 312. After the 5-output line 312 goes positive, the AND circuit 313 is through the next counter input pulse activated in order to reset counter 309 to 0. The counter 309 is incremented by the output of the AND circuit 317 by one count which, in response to any carry pulse from the counter 301 that occurs, becomes positive, as described above when the output of the AND circuit 343 is negative Counter 309 is also incremented in response to any output signal from AND circuit 321 which is activated each time the flow of input data characters is interrupted by one or more format control characters CA, LF or FF . The counter 309 is also incremented by one count by each output signal from the AND circuit 341, this Auseanes-

26th

10

signal occurs during the write check sequence as described above.

A tab feed process is triggered by fading in a TAB signal from circuit 202 through gate 204, if this is not prevented by AND circuit 239 in the update state. This superimposed output signal sets the flip-flop 329, which in turn makes the AND circuits 339 and 343 effective. Immediately thereafter, the AND circuit 339 provides an output pulse during each of the following auxiliary time intervals 72 to TT. Each of these pulses advances the feed character address counter 301 by one count. The output signals from the counter 301 are transmitted via the lines 302 to the input of a pre-connected or pre-wired tab selection device or plug-in device 357. Furthermore, this device receives an input signal via the line 257 from the set output of the pressure zone flip-flop 256.

The pre-wired tab selector 357 comprises a socket 355 with eight input contact terminals 355 a, which are distributed along its lower wall, and with four output contact terminals 355 b, which are distributed along its upper wall. The plug 357 is inserted into the socket 355 and has a set of contacts that mate with the input contacts and output contacts of the socket 355. The connector is pre-wired to connect four selected input contacts to the four output contacts. The four selected input contacts designate a given one of the sixteen print hammers in the form of a particular character address in a selected print zone. As in Fig. 3 d reproduced, the plug 357 determines the print hammer 10, since it connects the right contact 355 b with the input contact 355 α representing the pressure zone 2 and connects the other three output contacts with the input contacts, which represent a binary count of 2 in the feed character address counter 301 .

An AND circuit 353 is connected to the four output contacts connected and generates an output signal to reset the tab flip-flop 329, when all four selected inputs are positive. Thus, after setting the flip-flop 329 begins to insert a sequence of timer pulses by a TAB signal of the AND circuit 339, on the Counter 301 incrementally incrementally. When the counter 301 is the one specified by the plug 357 When the address is reached, the AND circuit 353 resets the flip-flop 329 to receive the output signals of the AND circuit 339 to end, the counter 301 at the address requested by the connector 357 is left. Therefore, the next received input data character is put into the data memory at the specified character address and then printed by the hammer 10. Therefore the taboo input circuits work to the effect of calling up a sequence of input data characters he «, which is received immediately after a TAB control character and, starting at the specified pre-wired data set should be printed, regardless of where the printing of the previous data character has stopped

If all six timer pulses Tl to Tl have been faded in by the AND circuit 339 and an output signal has not yet been generated by the AND circuit 353, the flip-flop 329 remains set and timer pulses, starting with Tl of the next secondary time cycle, are faded in to drive the counter 301. If a carry signal is generated during the counter drive operation, it acts in the normal manner to reverse the state of the print zone flip-flop 256 and increment the feed group address counter 309 by one count. However, in the situation in which the TAB input is received immediately after one or more of the format control characters TR, LF or FF , the AND circuit 343 acts to disable the AND circuit 317 and any carry output from the counter 301 , which is generated during the TAB input process, does not increment the counter 309, but reverses the state of the print zone flip-flop 256, as usual. This is done in order to save memory space in the memory array 31. Since the flip-flop 331 was in its set state when the TAB signal was received, this means that no data characters have been received after the most recently received format control character. Since the format control character last received as has incremented the counter 309 in order to set a new memory group, the TAB input character apparently appeared at a point in time at which no data of the new group has yet been stored. The possibility that the transfer signal from the counter 301 advances the counter 309 again. would only waste a storage group. Therefore, AND circuit 343 and inverter 319 prevent such premature closing of the group and the only effect of the carry signal is to switch the output of print zone flip-flop 256 and reset flip-flop 333.

At every point at which a data character is in the eighth memory location of one of the print zones 2 assigned memory group is managed, the next received data character must be in a new memory code are managed, which is accompanied by a control character in the memory matrix 41, which calls for the document 14 to be advanced by at least one line spacing. This condition is required to prevent overprinting. The only exception to this rule is if it is desired to add certain special additional characters, for example underlining or accent marks on a line of data that has already been printed. In this situation goes this particular Sign on circuit 202 is immediately preceded by a CR sign, but without any accompaniment LF sign. In all situations except the

LF sign. In all situations except the situation just mentioned, add the ones described Circuits automatically assign a line feed command to the * control characters that are assigned to the data is, the data immediately follow which a »

Printing is assigned by the print hammer 16, provided that the requested LF command is not supplemented by one or more LF format control characters that are sent to the input on the usual Way are received. This automatic line

65 Continuation of the described execution form rr. W. especially necessary to prevent overprinting in the system when it is in the update mode works there, as already described, the

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r · B assignment of a data character to the memory it: I 30 for subsequent printing of the hammer D 116 is determined by the occurrence of an output & Jg signal from the AND circuit 262, which adjusts the fl pressure zones flip-flop 256th This signal fijl is still used to activate the overflow flip-flop f! | 280, whereby the AND circuit 290 is made partially effective. Should the other input to AND circuit 290 go positive before flip-flop 280 is reset, OR circuit 292 acts to trigger one-shot multivibrator 293 to cause a count of 1 in line feed counter 294. This ensures that the required line feed command is present in the control character associated with the next received data character. If the system is in the update state, the insertion of the next received (or internally generated) data character causes the occurrence of a signal from the OR circuit 228, which signal makes the AND circuit 284 effective and activates the AND circuit 290 to activate the To trigger incrementation of the counter 294. Immediately thereafter, there is a signal at the delay circuit 349 in order to fade in the control character including the line feed bit in the memory 41 and to reset the flip-flop 280 via the OR circuit 278.

If the system is not in the update state, it makes a positive signal at the data output from circuit 202 the AND circuit 290 via the OR circuit 286 effective to cause the line feed bit to occur. However, if before receiving the data character a CR character is received (when performing the above underlining process or Accent setting process), the AND circuit 276 generates an output signal which the flip-flop 280 is reset to prevent generation of the line feed bit. In the same way, if that delivers LF format control character is received before the data character, the AND circuit 274 a signal which the flip-flop 280 resets to prevent the control character then set from being set Line feed demands too much.

Reading control circuits 400

The read control circuits 400 are shown in Figures 3a and 3b and comprise all circuit elements which are provided with reference numbers of the series 400. Two of the basic ones Circuit elements are the reading label address counter 401 and the reading label address counter 407. The counter 401 operates a decoding circuit 405 which produces a positive signal on one of eight output lines 406 generate one for each particular combination of binary signals from counter 401 Delay circuit 403 generates an output signal after every 715 time interval, thereby incrementing of the counter 401 is effected by one count. The counter 401 is counted by each character pulse reset to 0, which is generated by the character mark converter 12 a. Every time the counter 401 switches from a completely positive to a completely negative signal, a carry signal is generated and fed to a timing circuit 101, where it is used in the manner previously described in connection with FIG. 4 described has been. The output lines 406 of the decoding circuit 405 are used to decode a character to be addressed for reading from the memory matrix 31 and condition the individual hammer drive circuits 20 for actuation. Continue to be the 0 output line 406 in the drawing generator 150 is used in the manner previously described.

The read group character counter 407 is generated by each signal generated by an AND circuit 417 advanced upwards. The decoding circuit 411 receives the signal of the counter 407 and generates a positive signal on one of the six output lines 412 for each different output combination. The output lines 412 address the various groups for reading from the

ao data storage matrix 31 and address the various Indicators for reading from the control memory matrix 41. Furthermore, according to the above Description of the signals on the output lines 412 from the comparison device 244 when

»5 execution of the update test sequence used. A AND circuit 409 receives signals from AND circuits 417 and from the 5 output line 412 to generate a signal to reset the counter 407 to zero.

At the time interval Γ10 of each secondary time cycle AND circuit 433 tests the update bit location of register 32 to determine whether a data character is present in the character storage position of the memory matrix 31, which then by means of lines 406 and 412 are addressed. When there is a character, the AND circuit generates 433 an output pulse that sets a signal flip-flop 435. The set output dt - flip-flops 435 conditions AND circuit 441 to enable comparator 22 to use subsequent time interval T12 a pressure comparison performs while a three-position binary counter 415 is reset to 0, an AND circuit 421 (via the inverter 423) u, i is made effective in order to switch the To prevent counter 415, and a standby timer circuit 413 is reset. On the following Time interval TIS, the flip-flop 43S is reset. This process guides the work of the

so timer circuit 413 leads to ineffective of AND circuit 441 to disable comparator 22 and for conditioning of the AND circuit 421 to enable the counter 415 to be incremented.

The counter 415 is connected upstream by one count at the time interval Γ11 of each auxiliary time cycle, when the flip-flop 435 is reset and the thin flip-flop 419 is set. Of the Counter 415 thus performs the function of the display when eight successive secondary time cycles (a full main time cycle) have elapsed without a data character being detected in the addressed Group of the memory matrix 31. Since a different character string during each secondary time cycle iii the group has been checked shows a ÜtKrtiagssignal of the counter 415 indicates that the memory group is empty and causes the AND circuit 417 an output pulse is generated in order to

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29 30

group address counter 407 to the next group due to the mechanical elements of the system

to advance. It should be noted that the AND ring.

Circuit 417 cannot generate this signal, paper feed control 500

if not the signal of the comparator 244 .

(Fig. 3 c) is negative. This prevents switching 5 The current circuit elements of the paper control

of the payer 407 when the addressed for reading 500 are in FIG. 3 b reproduced and by

Storage group is the same storage group that displays the circuit blocks that are only referenced

füT letter is addressed. This prevents << ate the characters in the 500 series. When the flip

Read circuits prior to the supply circuit flop 419 is reset to terminate a long pressure circuit, its reset output line 420 becomes

The flip-hop 419 performs the basic reading positively and directs a process of a hammer

monitoring function by, if it is in the delay timer circuit 5i> a. iNacn euier

its reset state, the AND predetermined delay becomes the output of the

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are, so that ireendein incrementing the counter 415 15 to reset flop 519, after which the L ND circuit

prevented and "any reading process as well as 521 effective via an OR circuit 522

generating any actuation pulse from power to the control store output register the comparison device 22 is prevented. Dab Flip- 42 during each tent interval / 9 for the Flop 419 is checked by the output of the AND presence of a signal bit if a

Circuit 417 reset. the. as just found 20 signal bits, becomes a signal of the

indicates that all data is generated by a memory AND circuit 521 to the flip-flop 519

group are printed out and causes the set, whereupon an inverter circuit 447

next memory group and its associated one makes the AND circuit 445 ineffective to

Control characters in the control memory 41 are addressed. any further reading of the control memory

Printing cannot be resumed 25 prevent. The signal of the AND circuit c 521

until a signal from an AND circuit is still used to open the gate, 3 to., kti-

425 is generated to set the flip-flop 419. fours and the print zones, head-of-form

This cannot occur until a positive signal is received and the line feed bits from the control character im

an input line 514 appears. Such a Si register 42 to the flip-flops 44 and 515 respectively

gnal on line 514. to be transmitted from paper feed 30 to counter 513. The OR current

control500 comes, indicates that all format circle 522 fulfills a »reverse control function,

Control operations by the newly addressed control to the AND circuit 521 during the full

signs are required have been carried out. Keep the duration of the time interval Γ9 positive. That

When lead 514 goes positive it triggers feeding of zone flip-flop 44 with the new ones

a one-shot multivibrator 427 which causes the 35 to effect pressure zone control data in most

The output of an inverter circuit 428 becomes negative. Cases activation of a different one of the gates 18a

The AND circuit 425 can thus be signal and 18 b. The requirement for the hammer deceleration

do not generate until the first character pulse CP after rungs timer circuit 523 can thus be seen

the timer output of the monostable multivibrator because this gives time that the last Dalen-

427 occurs. The monostable multivibrator 427 creates 40 characters of the previous memory group printed

thus enough delay so that the switch can be in before the state of the switch in the

the pressure zone gates 13a and IZb are set, gates 18a and 186 begins to change, namely

the can and the paper can be set when responding to the control character which the

furthermore it is ensured that the new storage group is allocated at the beginning.

next pressure circuit the counter 401 turns into 45 The signal of the AND circuit 521 is wciter-

is in its 0 state, so the memory is used to do a "paper feed flip"

set group scan at the first character of the group flop 520, which is the AND circuit

is initiated. 516 makes it partially effective to determine the

To enable the end of the paper feed after each generation of an actuation pulse, if

to the hammer driver circuits from which 50 a paper feed is available at all. At the

Equalizer 22 is the first time interval ΓΙΟ in register 32 after activation of the gate

stored data characters are printed. The actuation 43, and if no "further" partial feed is required

pulse is transmitted to a flip-flop 439, is Hch, is a Si from the AND circuit 516

whereupon the AND circuit 437 received ineffective signal that the flip-flop 518 sets. the

power will. When the next 714 time interval is set to 55, output line 514 goes positive so that

occurs, the AND circuit 437 therefore does not produce the time delay of the monostable multivibrator 427

Output pulse, and the printed character is initiated, resulting in a setting

not fed back into the memory 31, so that the pressure of the flip-flop 419 according to the above

Drawing memory location is left blank. Writing and resetting the flip-flop

If a long period of time, for example 30 Se- 60 520 leads to any further signal from the AND-

customer passes without disabling any signal bits in circuit 516 until after the reading of the

are determined in register 32, the next control character is accepted.

hit that all data in the memory 31 is printed as soon as the print-flop-flop 419 is set and no new data has been received. (to initiate this pressure cycle), the The clearance signal, which at this point in time of 65 output of an inverter 443 is positive and represents the the timer circuit 413 is generated, flip-flop 518 is returned. The set output reverses, to turn off the ribbon motor to line 514 of this flip-flop 518 goes negative and Wear and tear at high speed prevents subsequent setting of the flip-flop

15th

419 until a signal is generated by AND circuit 516 indicating that all paper feed operations required by the next control character have been performed. Two cases must be considered, the first of which is the case in which the control character requires no paper advance, and the second of which the case in which a paper advance is requested.

1. In the case in which the control character contains no line feed data , the gate output lines 43 a and 43 * remain negative when the gate 43 opens at the time interval T 9 sicu, and the flip-flop 515 remains in its

remains at 0. Thus, the output from OR circuit 511 is negative and does not cause any actuation the feeder, and when the L'ND circuit 516 the output of the inverter 5! 2 at time interval 7 checks "10", becomes a Signal generated to set flip-flop 518. This causes the output line 514 becomes positive to enable the subsequent start of a new pressure cycle.

2. requires, in the case in which the control character line feed operations, a positive signal is either tanning b on the line 43a or on one or more of lines 43, to set or to reset the flip-flop 515 to enter a count in the Zähler513. In this case, the output of the OR circuit 511 becomes positive and at the time interval 710 immediately after the opening of the gate 43, the AND circuit 516 becomes non-positive and the flip-flop 518 remains in its reset state, so that printing is suppressed is.

A positive signal from OR circuit 511 causes the paper feed controller 501 begins to advance the document 14. A common type of format controller, which is included in the feed control generates a positive pulse on a line 509 every time when the document 14 uri is advanced one line spacing. and it creates a positive impulse on a line 507 when the document 14 is on the first print line of the next form or Form has been advanced.

As explained above in connection with the input circuits 200 include the head-of-Formblatt- and Zeilenvorschubbits each other mutually exclusive, that is, when the gate 43 outputs a positive signal to the line 43a, all the lines 43 need to b be negative, and if any of the Lines 43 b is positive, line 43 "must be negative. Thus, when the flip-flop 515 is set by the gate 43, the OR circuit 511 energizes the pre-entry controller 501 and the document is advanced until the head of the next form is reached. At this point the Signa! on line 507, flip-flop 515 returns, causing OR circuit 511 to go negative to terminate the feed operation. At the time interval 710 after the advance has ended, the AND circuit 516 generates a signal to set the flip-flop 518 to enable the printing cycle to begin.

When gate 43 introduces a count into counter 513 , the output of the OR circuit is positive to initiate advance, and each time document 14 is advanced one line spacing, the output on line 509 decrements the count to the counter 513 by 1 or by one count. When the counter 513 reaches "0", the feed has been carried out by the required number of lines, and the output of the OR circuit 51 1 becomes negative, whereby the feed is terminated and the AND circuit 516 is conditioned to subsequently be a printing circuit trigger.

Arrival apk. rvUriimi · "! '« · * · · »··» tr ~ _r t λ ~ - ..-- ι. The first form is determined as an unconditional requirement for stopping the paper feed. Accordingly, the appearance of a form header signal on line 507 of Counter 513 is reset to 0 (resetting flip-flop 515 as described above), causing document 14 to stop and AND circuit 516 to operate.

Normal working condition

The following description briefly summarizes the sequence of operations that is carried out when the system is operating in its normal operating condition, with the various sub-operations are already described in detail above. For the following description, reference is made to the F i g. 3 a to 3 d referred to.

It is assumed that the following data block is recorded at the data one anc: CR, LF, LF. D, D, D, D, D, "D, 'D, D, D, D, D, D, D. D, D. This message requires a carriage return and double line feed, after which a line of 15 data characters is to be printed. The symbols D mean either data characters or spaces.

Once the CR character is received and decoded by circuit 202, the CR line goes positive, and at the following time interval Ti , gate 204 transmits a positive signal to OR circuit 232 and AND circuits 307, 264 and 276. The AND circuits 307, 264 and 276 have already been partially activated, since the system is not working in the update mode of operation (the reset output of the flip-flop 240 is positive). Therefore, the superimposed CR signal causes the AND circuit 307 to reset the feed character address counter to 0, the AND circuit 264 to set the carriage return flip-flop 266 and the AND circuit 276 to reset the overflow flip-flop 280 (if so is not already in its reset state). Setting the flip-flop 266 sings the print zone flip-flop 256 to its set state, indicating that the next received data character in print zone 1 is to be printed.

Activation of the OR circuit 232 leads for setting the group flip-flop 331, for Resetting the flip-flop 333 and setting the flip-flop 254. Setting the flip-flop 331 ″ leads to the triggering of the monostable multivibrator 345 in order to set the feed address group counter 309 to increment a count so that the next memory group is ready to receive data characters is made effective. Resetting flip-flop 333 prepares it to cause

209 535/408

33 34

the monostable multivibrator 347 which Steuerzeichenein- OR circuit 228 and the Einblendsignais of bien dung and the reset pulse for the nächstfol- the delay circuit 349 occurs wähgende signal of the OR circuit 228 generates rend the same time interval Ti to the data by setting the flip -Flops 254, the AND and control characters in their respective λ memory locations in circuit 252 are made partially effective so that they lead S to. The subsequent r2 timing pulse causes, prepared, an update test operation so that the AND circuit 238 will trigger the update flip when the data output line of the current flop 240 sets, and the AND circuit 341 circuit 202 will be positive the next time will. is energized to the feeder group address counter 309

The first LF character has the effect that the LF-O us- to increment a count to the output line is positive, whereupon the next to initiate the write test cycle. The following time interval Tl veranlaß goal 204: is a Γ3- to 77 signals cause a similar Fort sound signal to the OR circuit 232 and the AND ten of the counter 309 and during one of the definitive

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gerte output of the OR circuit 232 has no update mode of operation is not required) effect la the flip-flops 331. 333 and 254 already 15 a signal in its set state, reset state is generated by the comparison device 244, whereupon the AND- Circuit 246 are on or set state. The AND current signal generated to the flip-flops 240 and 254 circuit 291 generates an output signal which the reset, whereby the update test sequence triggers monostable multivibrator 293 and the line is terminated. After this sequence has ended, the feed counter 294 is incremented by one count. Of course, the counter 309 is in the state. The AND circuit 274 generates a signal that is left ineffective, which is taken before the test circuit. since the flip-flop 280 is already in.

its reset state. The next seven data characters that appear at the

The second LF character causes generation of the gang received, via the gate 206 the same range of signals as just mentioned is 25 to the remaining seven character storage locations, the result being that the AND in the addressed storage group guided. The EinStromkreis 291 trig the monos.abile flip-flop 293 reversing the seventh character of this data character. by counting the counter 294 by a count of 2 causes the counter 301 to increment from its full. gen 1-state to its fully O-state

When the first data signal in circuit 202 30 transitions, whereupon a carry signal is generated, is received, the data output line is positive This carry signal activates the AND circuit tiv and the AND circuit 214 is energized, so that 317 to to cause the Zuführgmppenadrcs in the subsequent time interval 71 the gate 206 counter 309 the next ipe memory group is opened, the data character parallel to which the flip-flop 333 resets and the printing zone first character memory location of the newly addressed 35 flip-flop 256 in its reset State to lead schnl storage group. Furthermore, the tet generates what is illustrative for pressure zone 2.
OR circuit 228 a signal to conduct when the next data character arrives (dns

of the character in the matrix and in order to reset the ninth data character in the 15th character sequence emr flip-flop 331, catch the flip-flop 333), it is fed through gate 206 into matrix 31 and the AND circuit 284 partially 4 ° to the first digit of the newly opened store. The resetting of the flip-flop chergruppe faded in, and the output.! Es 331 prepares this to trigger the next OR circuit 228 , the flip-flop 333 leads group counter forward pulse when responding, whereupon the gate 242 is opened to the next received format control characters. Control character 1010000 in the memory 41 to over-The setting of the flip-flop 333 triggers the 45 carry. The first 1 in this symbol is a Sicnalmonostable multivibrator 347, in order to bit a pulse, and the other 1 indicates the pressure zone 2. No evidence that after a slight delay the format control processes are required.
Gate 242 opens to display the format control character. The remaining six data characters in the fold

To transfer memory 41 , and which becomes effective after a further delay to character memory locations, the line 50 2 to 7 in the addressed memory group,
counter 294 and flip-flops 272, 266 and 280 to- So far, the description concerned "the operation

reset. only the supply of data characters and control

The control character transmitted by gate 242. All of these operations are performed by is 1100010. The first (left) bit of this character is timing signals 71 to 77 timed and occurs a signal bit, the second two bits thus indicate the 55 during the first halves of the generated print zone, the fourth bit indicates that no secondary time cycles. While the second half-feed is required to the head of a form, ie during the time intervals 78 to 715, and the last three bits indicate one line before each of the off-time cycles of the push-off count of 2 that occur there. This character takes effect in the reading control circuit 400 to cause the printing of the matrix 41 to 60 stored data in a character memory. However, if the memory group corresponds to the newly addressed memory group in the before the read control circuits 400 effective who matrix 31 (set if the counter can do the required format control operations 309 in response to the previously received CR-).

Character has been advanced). It is recalled that during the meeting

The above-described sequence of operations 65 interval 71, in which the first gene received began with the activation of the AND stream data character was entered in the memory, the circle 214 during the time interval 71. The open gate 242 was also effective, to enter the control character of the subsequent "feed" signal from the 1100010 into the memory 41 . During the

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Following time interval Γ 8 (assuming that no other data characters than the character just entered are present in memory 31 ) the 1'ND circuit 445 generates a signal which transfers the control character just entered into register 42 . At the time interval Γ9 the AND circuit 521 is activated, whereby the flip-flops 519 and 520 are set. The output of AND circuit 521 continues to open gate 43, setting zone flip-flop 44 and entering or introducing a count of 2 into counter 513. This causes the output of the or. ™ circuit 511 to go positive, whereupon the paper feed controller 501 begins to feed the document 14.

After the paper 14 has been advanced two line spaces. When the selector 513 reaches position 0 and the output of the OR circuit 511 becomes negative. The first T 10 signals that appear thereafter activate the AND circuit 516, whereupon the flip-flop 518 is set and the output line 514 goes positive. This positive signal resets the flip-flop 520 and after the mono-stable multivibrator 427 becomes active, it represents positive signals for the lower two inputs of the AND circuit 425. When the next character pulse occurs, the AND circuit 425 supplies a signal which the pressure -Flip-flop 419 sets and flip-flop 518 resets via inverter 443.

At time interval 79 after setting the Flip-F !. > p419, AND circuit 431 causes the first received data character to be transferred to register 32. At the time interval T10 , the AND circuit 433 sets the flip-flop 435 , whereupon the AND circuit 441 is made partially effective. At the time interval 712, the AND circuit 441 activates the comparison device 22, and the data character is compared with the character which is then just coming into alignment with the print hammer 1. If the two characters are the same, eh> signal is generated by the comparator 22 and input via the 1'ND circuit 23 to cause the hammer driver circuit associated with the hammer I to print the character. If the two 7 niches are not the same, the AND circuit 437 becomes effective at the time interval 7Ί4 to return the data character to its position in the matrix 31.

At time interval 715, AND circuit 403 increments read character address counter 401 by one count so that the second data character in the memory group is addressed. At the subsequent time interval 79 the AND circuit 431 causes the character to be entered into the register 32, and at the time interval 712 the comparison device 22 compares the character with the character just coming into alignment with <1em print hammer 2 . Again, when the comparator 22 generates a signal, the AND circuit 23 generates an actuation pulse which in this case causes the hammer driver circuit associated with the hammer 2 to print the character. If the comparator 22 does not provide a signal, the AND circuit 437 takes effect at the time interval 714 to return the data character to its position in the memory, and at the time interval 715 the AND circuit 403 advances the address counter 401 so that the third character in of the group is addressed and the hammer driver circuit assigned to the hammer 3 is made effective

in response to a signal from the comparator 22 to operate.

The eight characters in the group are thus addressed in succession and compared with the characters on the printing tape 10 until all characters

ίο of the storage group have been printed out. As described above, this state is determined such that it is present when the counter 415 generates a carry signal which indicates that all eight character positions of the memory group gepiuu smu u..u t. »: ~ Signal bits are found, provided that that the comparison device 244 shows that all positions are filled. The contribution signal of the counter 415 makes the AND circuit 417 effective, so that a signal is generated, which the reading

ao flu address counter 407 advances by one count and the pressure flip-flop 419 resets. This action activates line 420 and initiates hammer delay timer 523. After this delay time has elapsed,

as the flip-flop 519 is reset, whereupon the AND circuit 521 is conditioned to during the next time interval 79 after the presence of the control character which is assigned to the memory group, which is then determined by the counter 407 is addressed.

In the example described, the control character now in register 42 is 101000. At time interval 79, AND circuit 521 generates its output signal, which sets flip-flops 519 and 520 and opens gate 43, whereupon the zone flip-flop 44 is switched to its reset state, which indicates that the next printing operation in print zone 2 is to take place. Since the lines 43 a and 43 b are not positive with the new control character, the output of the OR circuit 511 remains negative and no feed is initiated. At time interval 710, AND circuit 516 generates a signal which sets flip-flop 518, causing line 514 to go positive. This makes the AND circuit 425 effective to set the pressure flip-flop 419 after the delay caused by the monostable multivibrator 427. As described above, enables

this delay period that the switch in zone 2 set the gate 18 b before a start of Pressing is enabled.

After setting the flip-flop 419, the newly addressed memory group is scanned in succession, beginning with character position 1 through the reading control circuit 400 as described above, and the last seven data characters are in zone 2 printed by hammers 9-15 to complete this line of data.

If the printing of previously stored characters is completed in one of the zones before the following data characters are received, the AND circuit 417 receives a negative input signal from the comparator 244 via the inverter 248, since the same (group) address for supplying data in the memory 31 and for reading data from the memory 31 is used. The printing

Flip-flop 419 cannot be reset and the print cycles continue with data awaiting to be received for printing in the respective print zone.

Working in the update state

In the above description it was stated that when the update test cycle of the AND circuit 252 in response to receipt of the first data character for a format control character was initiated, it was determined that the need for "Forlschreiben" did not exist and the update flip-flop 240 has been returned to its reset state, and although at the end of the cycle.

However, if it is determined that updating is required, i. i.e., datf less than two storage groups are available in the matrix 31 for the reception of input characters, the flip-flop remains 240 at the end of the test cycle in its set state. This means that the AND circuit 236 is made partially effective and that the AND circuits 307, 337, 321, 264, 268, 291, 274 and 276 are made ineffective. If the system is in this state and accepted is that the same sequence of 15 data characters is presented at the input, is the Operation of the input circuits 200 and the write control circuits 300 as follows:

The 15 data characters are stored in memory in exactly the same way as described above 30 entered. However, if the next format control characters are assumed to be, for example CR or LF characters are present at the input to build up the next print line, the following occurs: The CR signal inserted by gate 204 at time interval Π represents the Character address counter 301 does not return because the AND circuit 307 is disabled and it is further prevented from setting flip-flop 266 or resetting flip-flop 280. That Signal generated by OR circuit 232 sets flip-flops 331 and 254 sets however, the flip-flop 333 does not return because the AND circuit 337 is ineffective.

The signal of the OR circuit 232 activates the AND circuit 236 and sets the flip-flop 226 , whereupon the character generator 224 introduces the code of the special update character into the register 212. Then the AND circuit 216 generates a signal at the time interval 7 * 1 to open gate 210 to transfer the update character to the eighth character position of the addressed memory group (the first seven character divisions of the group are taken up by the last seven characters of the previously received line of data)

The output of the fND circuit 216 further activates the OR circuit 228 to provide the "insert c" signal for entering the update character into the matrix 31, reset the flip-flop 331, set the flip-flop 333 and the AND circuit 284 to trigger the establishment of a line feed control character in the event that the flip-flop 280 is in its set state advances one count and resets flip-flop 226. In the example described, this incrementing of the counter 301 switches the counter from count 7 to count 0, so that the appearance of a carry signal is caused. This carry signal advances the group address counter 309, resets the flip-flop 333 and reverses the state of the print zone flip-flop 256 and causes it to switch back to its set state, which indicates the print zone 1.

When the flip-flop 256 is switched, the AND circuit 262 generates a signal which sets the overflow flip-flop 280. When the next input character LF is received, the OR circuit 232 again triggers the update character generator and another special character is entered, and this time in the first drawing

ao setting of the newly addressed storage group. In addition, the flip-flop 254 is set in order to make the update test current crisis effective in order to initiate a further update test circuit when the next data character is responded to

as go through.

When the second update character is entered into memory, the output of the OR circuit 228 the flip-flop 333 and thereby triggers the monostable multivibrator 347. The

The same output pulse of the OR circuit 228 continues to activate the AND circuit 284th whereby again the AND circuit 290 is activated, whereby the flip-flop 280 is in its set State. The output from the AND

Circuit 290 triggers the one-shot multivibrator 293 and the line feed counter 294 is incremented by a count of one

Immediately afterwards the pulse of the monostable multivibrator 347 goes from the delay electronics

349 and opens the gate 242. As a result, a control character 1100100 is transferred to the control matrix 41 to the Enter the character position that corresponds to the newly addressed storage group. Immediately afterwards effected the delay circuit 351 that the counter

ler 294 is reset to 0 and that the flip-Γορ 280 is reset.

The next seven consecutive input characters are regardless of whether they Data characters or format control characters are (under

Assuming that the system continues in the update state to work) into the remaining seven character positions of the addressed memory group entered. The counter 301 then generates a carry pulse for setting the next memory

SS chergruppe, and after this group is filled by the next eight input characters, the overflow flip-flop 280 again causes an automatic line feed bit to be included in the control character for the folger.de memory group.

Read control circuits 400 and paper advance control 500 operate in exactly the same manner as described to cause the characters stored in memory 30 to be printed. However, according to the geiaile

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! control process in the print line by the special Cover letter symbol is indicated.

Therefore, when the system is working in the update state, the only line feeds are that are executed, those that are necessary to allow overwriting or overprinting and because the data is on full lines of sixteen characters between line feeds are printed, the mean data extraction speed becomes noticeably higher than the mean data input speed addition increased. This has the effect that the jam of unprinted characters in the memory 30 is reduced, so that the critical buffer situation or storage situation is eliminated in a short time.

When this is done, update flip-flop 240 is again returned to its reset state at the end of the update test cycle and the system is allowed to resume normal operation. If a TAB input character occurs while the system is operating normally as described above, the following occurs: The TAB output line from circuit 202 goes positive, and gate 204 generates an output pulse at the subsequent time interval T1 which the TAB flip-flop 329 is set via the AND circuit 239 . This causes the AND circuit 339 to generate a series of output pulses which increment the feed character address counter 301 one count at a time until it comes to a count representing the tab position that is pre-wired into plug 357. When the tab count is reached, AND circuit 353 produces an output which resets flip-flop 329 and

ίο finished the TAB address process. As a result of this process, a sequence of spaces is entered into the memory 30 which extend from the position after the last entered data character to the position shortly before the corresponding tabulation position. While the system is operating normally, this results in the usual type of tab format. However, if the system is operating in the update state, the TAB operation is ignored and the AND circuit 239 prevents entry into the

"O TAB flip-flop 329. A special symbol is entered into memory 30 for each TAB character thus ignored.

The AND circuit 237, which is activated by the output of the inverter 234, then generates a signal via the OR circuit 241 in order to set the flip-flop 226 and to trigger the entry of the particular symbol from the generator 224 into the memory matrix 31 .

For this purpose 3 sheets of drawings

209535/408

Claims (1)

ι ό 2 to enable the printing device to receive the receiving station to arrange the night in accordance with their transmission format. 1. Printing device for printing after Usual control commands are: carriage return (start direction sign on a document, where the 5 of a new print line), single lines of ehub (leading signs are transmitted one after the other to the printing device push of the document receiving the message, with a plurality of to the next line position), multi-line feed for storing messages (feed of the print document by a specified message character before printing, even number of individual lines), form feed with input devices for loading the transmitted ό (feed of a sheet or tape or transmitted message characters in the Messages - a path of interconnected forms to store in a predetermined sequence and the header of the next form) and tabulation with memory read-out devices in order to (jump to the next preset tabulator printing of the saved messages ctolluno "irf finpr Ύρ'Λρ nmlvd Me Aarmsrhem to effect the document, marked 15 Hegenden line positions are left blank), draws. These command signals are transmitted individually and in multiple memories (41), which correspond to the message memories (31) together with various combinations, through input devices (242, the message signals, so that the messages on -296, 294, 293, 292, 291) for loading a receiving printing device can completely restore the transmitted post-line feed control character in one of the 20 directions. Control memory (41) in response to each of the teletype machines and the like of these various transmitted line feed command characters LF, control functions cannot over-execute that together with the message characters nearly as quickly as they are received message data, through read-out devices (42, can catch and print, is a data memory 43) for the control memory (41) In order to make the as early as necessary. That is, pushing the document (14) in accordance with when the printing device executes a command to effect characters with the stored line feed controls such as carriage return or line feed, and by means of facilities, cannot print them at the same time. Therefore (240, 291) to prevent the loading of any message data which are received during the line feed control characters in the control 30 execution or execution of a function command, if the capacity of the messages are received, temporarily in a buffer memory direct memory (31) to store new messages until they can be printed, rather, reduced to a predetermined level. Such an embodiment works very satisfactorily. as long as there is enough time between function 2. Printing apparatus according to claim 1, there remains 35 execution intervals to enable printing of all received data, marked by means (280, 290. If 293, 284) for automatically entering but the frequency of the control commands on a line feed control character in one of the rises to a certain value, data is not used to execute control memory (41) when a message character function commands require so much time that the time required for printing in the last printing position of a 40-speed message line printing is stored on the document (14) on the speed of the data at which the devices (280, 290, 293) can be kept on request so that messages on the operation of the devices data accumulate in the buffer memory (240, 291) to prevent the loading of the start. Line feed control characters can be operated. 45 This situation arises from the so-called "Short line situation" in which a series of consecutive short print lines where, for example, each line is a number Has characters that are less than e ^; n eighths of the number so is of full line characters. While the time it takes the printing device to The invention relates to a printer device for carriage return and line feed commands If you want to print message characters on one, more data will be required than on one line Document with the characters to be received one after the other. Therefore, a jam of the post-printer is formed are transferred with a 55 direct data in the buffer memory as long as this A plurality of message stores remain in place for the storage situation. transmitted message characters before printing, one way to eliminate this situation, with input devices for loading the transfer is to make the buffer memory large enough Message characters in the message store carry enough data for the worst case scenario to be able to record in a predetermined sequence and with memory 60 a short line situation. Read-out devices to allow the printing of the data. This solution leads to an arbitrary file size Message characters on the document indicating the amount of short line data that is being transmitted to effect. can be. This is undesirable because it does The practical and most common type of digital-to-long-distance transmission is limited, the output of the system, alarm systems transmitting demand 65 I comprises _n Similarly, undesirable is a solution, message data in serial form through a single through which the Gesamtübertragungsgeschwindig-O'bertragungskanal. Control data must necessarily be reduced in order to adapt them to a situation that is briefly distributed between the message data.