DE1817805C3 - Printing device - Google Patents

Description

3 4

Detailed transmission of data is this familiar diagram of that generally reproduced in FIG

Facility not suitable. represent preferred embodiment;

From the German Auslegeschrift 1 201 100 a Fig. 4 is a circuit printer showing details known with a memory which is in an andiagram of the timer and character division generation number Groups is divided. Here, too, the storage circuit that is generally shown in FIG. 3b is repeated with the data characters for a complete line;

filled and then in parallel, i.e. all groups equal - Fig. 5 is a waveform diagram of the timing printed out. A format control through the ratio between the sixteen basic The format control characters carried in this case are known timer pulses, which are set up by the Zeitstrora circuit but not provided, and it is also produced in accordance with FIG. 4;

data not continuously transmitted for reception. Fig. 6 is a schematic diagram in which

suitable chem the relationship between the print hammers

In the case of continuously transmitted data characters, and the printing tape of the preferred embodiment

The individual groups of the memory are shown in this way.

be set so that they are filled one after the other, 15.

and while e ^: - <- group is filled, a general description

other groups already found can be printed out. A preferred embodiment of the invention

The object of the invention is to provide a printing device in general terms below with reference to FIG with a memory divided into groups. Printing is done by means of a row admit that with the least possible effort for the- »0 individually controllable print hammers 16, which the poss Is able to store data characters in a borrowed data positions in a print line on a Variety of different formats to print out. Recording medium 14 arranged opposite to this The invention solves the problem in that a net sird. A chain or belt 10 what types Control memory with a number of character memory carries, rotates continuously around two sprockets that are at least equal to the number of groups »5 11 or the like, whereby the types after the print line in of the data memory is provided and a repeated sequence pass each time. The record character storage location a group of the data storage medium or the document 14 is by means of a pacher it is assigned that an input control device can advance feed control device 500, see above processing one of the respectively received group of form that successive print lines in alignment Control characters corresponding to mat control signals are arranged in 30 with the hammers 16. A color die The next control memory location can be between document 14 and the inscribes and this group of format control hammers 16 be arranged to generate prints immediately following data characters in the gene when the hammers 16 the document 14 against Press the group of the selected type assigned to the character memory location on the tape 10, or Data memory writes that a format control 35 the document 14 with a pressure-sensitive After printing out the contents of a group, the marking area must be coated to indicate the desired Data memory to generate the prints added to the next group.

assigned character storage location of the control memory The individually controllable hammers 16 are above

reads out and the format corresponding to its content a zone selection switch matrix 18 by individual

triggers control processes, and that a pressure control unit 40 actuates a hammer in a circuit 20. the

direction after completion of the format control operations hammers 16 are in a plurality of print zones

Printing elements according to the content of these subdivided, with the number of hammers in each

Most group of the data memory controls to the zone is preferably the same. The number of ham-

to print out the data characters stored therein. On drivers in the circuit 20 is equal to the

In this way, each in a group of 45 are number of hammers 16 in a single pressure zone,

The data contained in the memory contains the various trains and the selection matrix 18 works to the effect that the

subordinate format control information permanently assigned, and hammer drivers with the hammers 16 of the active ones

the individual groups can be optimally used to connect the zone. This arrangement leads to

and the efficiency of the storage (can be increased. considerable savings in components, since a small

Preferably, a group contains only a 5 ° number of hammer driver circuits through the

Part of the data to be printed out in one line, so a full series of hammers 16 "time-divided" ("time

that the received data characters are consecutively shared ") and a single driver for each

gend read in line segments and printed out hammer is not required.

will. This means that the memory is used. Data to be printed are serialized by bit and

improved by short lines of data not having memory characters on a single channel

Use up space for a full line. Input data line by means of input circuits

Further features of the invention are received in UN 200. Received data characters are

claims specified. parallel in bits and in series in characters below the

The invention is described below with reference to the control of feed control circuits 300

Drawing explained for example. 60 transferred to a data memory 30, in which they

Fig. 1 is a generalized schematic, temporarily stored and readout for printing

Expect diagram of a preferred embodiment of the ken. Format control characters are single and

Buffer control system according to the invention; in groups between the input data characters

Fig. 2 is a diagram in which the relationship divides. The format control characters consist of carriage

nis between the F i g. 3 a to 3 d is shown; 65 return CR, line feed LF, tabulator TAB

F i g. 3 a to 3 d are representations that are used in the case of compound and format feed FF. These characters are at

in the in F i g. 2 way shown, reception from the circuits 200 is decoded and

a schematic circuit showing details trigger the input to a control store 40

certain control characters, which control the work of the position position lying 21 character positions automatically zone selection matrix 18 and the paper feed filled (with the exception of a short line situation while working in the control device 500 ), namely with inside

The data memory 30 is divided into a plurality of conjugated white space characters.

Divided memory groups, of which each group 5 3. If the format control character is a C7? Character a number of character memory locations equal to that, the input circuits cause 200 automatic number of print hammers in a print zone table that control bits points to the character position in the control. The control memory 40 is entered into a plurality of memories 40 which subdivide the newly opened character memory locations, a character group being assigned in the data memory 30, memory location for each group in the memory 30 which received the printing of the next There is. The feed and read control circuits starting at the leftmost 300 and 400 always work in such a way that addressing causes the print line to be positioned (position 1 in any memory group in memory 30 of print zone 1).

automatically the assigned character storage location in 4. If the format control character is an LF character

Memory 40 is addressed. If the total number is »5, the input circuits 200 cause groups in memory 30 to be selected, but control bits are entered into the character position in control memory 40 in the illustrated embodiment which is three times the number of the newly opened group number pressure is assigned in the data memory 30, which causes selected areas to provide a total storage capacity that the paper feed controller 500 advances the document is equal to or corresponding to three full line pressure to ao 14 by a line spacing before the create. Printing device receives the printing of the next

The circuits 200 begin to decode each incoming data character. If a plurality of mend characters and provide an indication of whether this is being received by LF signals, the control bits entered in the characters are a message character or a space memory 40 such that a format control character, a carriage reverse is effective the paper feed controller 500 is the leader, a line feed character, a tab document 14 by a number of line spacing characters, or a format feed character. In over-moved, which corresponds to the number of "received LF- matches with normal message practice" includes signals.

each character received an equal number of 5. If the format control character is an FF character

Data pulses, and each pulse represents a 1 30 is binary, cause the Eingangsstiomkreise 200 that one or a represent binary 0th The circuits ones 200 comprehensive control bit in the character position in the memory 40, a shift register or a shift register is added to that of newly opened group is assigned in the regrouping of each input character from serial data memory 30, the paper in parallel arrangement. feed control 500 is triggered to the Do-If a full data character in the input 35 document 14 is assembled to the first print line on the next circuit, it will advance parallel most form (assuming, under the control of the feed control circuit 300 that the document 14 a web is transferred from one another to the data memory 30 in order to be stored in a pre-connected forms) before the printing of certain memory groups. the next received data character begins.
At a later point in time, the stored 40 To "real-time printing" of the input data to er characters is read from the memory 30 and by aiming, ie printing each data character in essentially a comparator 22 with a coded character at the same time at which it received the at the output of the timer and catch, the reading from the data memory 30 must be supplied to the character position generator 100. If the comparison under the control of the reading control circuits 400 results in a match, an input characters 45 received from the comparator 22 substantially simultaneously with the entry of the print signal is sent to the memory 30, thereby causing the characters to take place. In order to achieve this and yet the desired print position on the document separation of reading and feeding operations up 14 printed. right. which is necessary for the correct functioning of the memory reception of format control characters by the 5 <> chers, "the system is timed by an output circuits 200 leading to the following repeated sequence of timer pulses: controls which are controlled by the timer circuits 100 er -

1. When the format control character or the first are witnessed, each sequence defining a basic one of a series of successive format control timing cycles. The circuits are according to characters either a CA, LF or FF character, 55 as described below, with the movement of the group in the memory 30 in which the previous tape 10 have been synchronized and entered with a going data character, speed, which is very high compared to the speed disconnected (with the exception of the special short-line speed with which the input data are received, which are described below). Each circuit is divided into two, regardless of whether it is full or ⁶ ° halves, the first half not working, and the next group in memory 30 being used for feed control circuits 300 and the second for storing the next received data half the working of the reading control circuits 400 chen is used. controls. Entrance access and exit access are thus

2. If the received format control character is input to memory 30 as a time-division multiplex 7V4B signal, all character positions in the ⁶ 5 circuit are carried out in order to allow "interleaved" feeding of data memories that are between the last data of data in to enable the storage and reading of data characters and one that stores characters from the memory.

TA B position in the print line depicting the readout control circuits 400 adrasiVn »nh;»

J *

JStMS5? ÄSSs ΑϊβΑ

^{Ρ ° ™ 3ΐν} ° ^Γ . ^, indicated by the control characters , learn "updated" in memory, and a

are executed and all in the 0 ™ ΡΡ «» JgiSS ⁵ _n ^ _e memory group is not set, ta die

Data is printed. When a new group £ es _v ^ _erg ^P _ehendc storage group is completely filled.

the control character is replaced by d ^ Pap * r J ^ ^ ^ ^ ^^ _f ^ ptw-

feed control 500 checked, and all «forter ^ format control characters are in accordance with the above

feed processes are carried out before ^ ne _{prevented and the} only effect should

printing begins. When printing starts, ₁₀ scwcdu g _the ^^ _one

the character positions in the D ^ nspe.cher- rather ^^^ a ^ _{in the} memory 30 »

group is scanned consecutively and the then eg special characters when it is in

secured characters is entered with the coded AW ™ f _{safe 30} , then

of the generator 100 is compared to print out ac ^ _{data characters} n and serves there-

to call out. This scanning sequence repeats itself, ta _l5 * ng ^^ _{to indicate} that execution of a

all characters in the group are printed »^. Danacft _F ^ _{niMaieaepior & nSBB has been} omitted being

the next data group for reading aares _{the control in the} printed text

siert t. oMrVint is used to control the format

^You As explained above, km the Dr ^ voj «GRASSn«. _fc . _h .

which executes a line feed, obvious ao η ^ _fo ^ ^ _def " _{ΡθΓΐ! 5 (: ηΓεΛ} 6" -ΑΓ-

did not lend to print at the same time. While such ": Pe _{work ise} £ until the test circuits Toggle

periods must therefore contain data characters in the data ^ ^ ^. ^ ration of the short line

memory30 can be managed, however, cores g. . _{gt and an appropriate} number

Data characters taken out of the memory and released. This passing away. Under normal working conditions J ^ * I rubbing execution is necessarily at the expense

Send the data in full lines or almost completely, _{however, this is not} a guarantee

Lines are printed, enough data from α _{your loss of the} actual message

the memory between the line feeds against 6 _{although eme} understandable

withdrawn, so that the average Datenabziehgeschw n g "J ^ _{ta pressure} is Haffen _gesc ™ t as much speed at least equal to the average data input 30 ^ ^^^ η as the: is original Nachgabegeschwindigkeit and these usually exceed Jl ⁰ JJ ¹ ^ _{whereby the} format only ^applies to other sici & Way is indicated.

rena weicnem at mt "« '«": -? "." «* In stromnrciiuiaB ¹ ··""" - -, ° ■ -. "J <i * -ii

will lead. This creates a situation <η * &> ™ for example, show Embodiment, "are the other asked the average Dateneintnttsgeschwind g ^ JT ^ gftstrornkreise or logical Standardstromkeit the average Datenabzugsgeschwindig- daroLJgJ _is of which exceeds a short ke. Usually, short lines, w, U- 4o are created in the _following . The special arbitrarily and * rare, and the capacity of the "* * _{mkreisa sfüh} tion of each block cherishes within data memory 30 is sufficient to create the erforder * _{the person skilled} in the s Gebietelekliche data storage. However, if oer _Dig italstromkreise. In order to receive excessive amounts of a long sequence of short lines, sam- tromscn 8 ^^ "* plug to presumably silh data in the memory 30, and since the 45 ** ntt ^ ^^ _d hnken or the storage capacity of the memory 30 is limited, be mew, _{a Stromkreisb, oc} kes connected there is the possibility that the storage capacity or ^ n input lines, and a le either with buffer capacity is exceeded and J ^ JJ ^, * ^ _the right side of a circuit data is lost. . _ - _t "Wockes connected lines represent output line- In the embodiment described here, 50 btocKes ^ ^ ^ _{that the} ^^ _{by emen} this disadvantageous condition by using | _{{ilk f indicated on the} line isL prevents circuits from occurring in the input «gj * ^ _{dem &} . _Bulb icon designated block provides circuits 200 are enclosed and welcnepe- _logically en AND circuit is where a riodisch consider to determine how many groups have been «n ^ ^^ voltage value (more positive), emptied in the memory 30 by reading 55 Jgna ^ _j ^ _{system uses} ^ _{α> 8} ^ _dc i and thus smo available for recording data. Is generated _Ausean g _S i _e itung when positive signals are present when the number of available data groups ^ ₁ I ^ n input lines. AHe is less than a certain predetermined number, wwu. Combinations of input signals are · the system automatically switched to »update ^ -working ^ _dn ^^ _low voltage value (aehi wise (tail mode). This mode of operation» _nej ^ tiv) on the output line, determines the storage capacity of the memory ^ w β _o ' _THE . Is isen _Stromkre em positive Signa maintain characterized in that the memory miv any one or more input lines s lOOVoigem Wirkungsgi-ad is utilized generate nnaa ^ u _ήύ ^ signal at the output, determines the irdttlere Datenabragsgeschwmagkeit P ⁰ ^ _61n ⁵ i _{ausscn ießüc} hen OR -Circuit we <from memory 30 by temporarily blocking the positive output signal generated when a positive lead of format control operations zj »increase. ^^ sjgnal on one of the two Eingangslertungei If the plant in the Fortscbmbe-operation _{d aui} is _{a front} hands. works, cause the format received at the input

9 10

A block labeled / represents an inverter wheel or pulley 11 which is driven. Circuit in which a positive signal is on A plurality of types are different on the belt 10 Input line sends a negative signal to the disqualified and is left in a straight line transmission line generated and vice versa. behind the recording medium 14 on which it is

A block labeled D represents a delay 5 to be printed out. On the opposite side of the output due to the types of voltage pattern document 14 that is present at the input is a series of pressure-accurate reproductions, with all voltage hammers 16 for printing sixteen characters that are output at the input appear to be one past on a line on the document 14. When the displayed time interval are delayed. io presented embodiment are for purposes of clarification

In each monostable flip-flop stage, either means only sixteen print hammers 16 are shown,

positive voltage transition at the input It should be understood that in practice a much larger

a positive pulse of predetermined fixed duration ßere number of hammers, for example eighty

at the exit. Hammer that can be used to make a longer one

Flip-flop circuits that print from some type 15 line of print. The hammers 16 are in two of a bistable circuit design, are divided into equal groups of eight hammers for circuits in which a positive signal to the purpose, in a first zone (the first eight 5-input causes the! -Output to be positive becomes data places in the print line) and in a second and remains positive, while the O output is the same to print the print zone (the second eight data places become negative at the time and remain negative, and with wel- ao in the print line). Striking a print hammer causes a positive signal at the input, at the point in time at which a type on which the 0 output becomes positive and remains positive, tape 10 is in precise alignment with the ham while the 1 output simultaneously becomes negative Wherever it is, it leads to "flying" generation and it remains negative. A flip-flop with a positive print mark on the document 14. In practice, the level at the 1 output is referred to as a flip-flop 25, a ribbon of ink between the hammers 16 and the document 14 which is in the set state to provide color for this predet, and if a positive level at the O output. The document 14 may be out of the aisle, it is referred to as a flip-flop in the plane of the drawing upwards by means of the reset state. A flip-flop paper feed control device 500 out, once set, then only 30 denies, which makes it possible to generate a plurality of presses on a positive signal at the λ input to (changes lines successively,
its initial state), and if it is in the state that the printing tape 10 carries a plurality of sliding-backed states, it only speaks to types which are spaced apart and which respond to a positive signal at the 5 input. different characters of a full alphanumeric

A block marked with a gate represents a gate series. Two converters 12 a

Circuit that a plurality of logical AND and 12 b sense time stamps on the tape 10 and

Circuits, each of which receives a signal, generate a pulse in response to each

the brand displayed at one of its two inputs. The transducers 12 can, for example, ma

should be, and each of which should be a fade-in signal to magnetic transducers, the slots or genes

receives the other of its entrances. Feel the input teeth on the belt 10, or they can

Fade signal input line is through an arrow head nen photo lines, the openings in the tape 10

and actively sense a positive signal on it. The transducer 12 a senses a single time

fourth all AND circuits in the gate. mark on tape 10 for each type, and each

A pulse generated in this way, divided into sections 1, 2, 4, etc., is called a character pulse CP beBlock represents a binary counter in which a 45 draws. The transducer 126 senses a single time-positive signal at the ADV-UP input, mark on the tape 10, and the pulse generated on the output lines as an incremental pulse is incremented by a count of 1, and at draws. As can be seen below, these serve to which a positive signal at the RESET-0 input pulses for the timing of the work, which praises the output state of the counter to 0 50 electrical circuits, which returns with speed (negative signals on all output lines of movement of the printing tape 10 exactly synchronizations). A. Impulse must be siert on the carry output.

of the counter generated every time the output The distance between adjacent types

state from all positive to all negative print band 10 is exactly IV _{7 of} the

tive output signals changes. 55 stand between neighboring print hammers 16.

A block labeled a decoder represents a decoder. This relationship is shown in detail in FIG represent that given the outcome of a. In Fig. 6 are sixteen print hammers 16 Counter is connected and each particular combina- tion is represented as blocks numbered from 1 to 16 tion of counter outputs to a single, and a segment of tape 10 is shown Signal on a separate decoder output line 60 which converts past the hammers 16 to the left, away.

nnirtworv ^{Since the} distance of the types reproduced from each other exactly urucKwenc ^ _{° spacing} of adjacent print hammers be-in Figure 3b, comprises a carrying loading, it is seen that only two print hammers ferred embodiment of a printing unit, a 65 are provided extending to the one in Figure 6 re-continuous printing chain or a continuous given point in time in precise alignment with printing belt 10, which is located by a motor with constant one type. These are hammer 1 (the clockwise speed around two chain- first hammer in pressure zone 1) and 9 (the first

Hammer in pressure zone 2), which are in alignment with types A and H, respectively. After the printing tape 10 has moved a distance Δ S to the left (the distance between the center line of type B and the center line of hammer 2), hammers 2 and 10 are in alignment with type B and I, respectively Later on, types C and J move into alignment with hammer 3 and 11, respectively. The complete scan sequence of eight hammers is shown in the diagrammatic representation of FIG. 6 showing the order in which the types come into alignment with the hammers during the scan cycle. A complete sampling cycle comprises eight time intervals TS to TZ, which are shown on the left-hand side of this illustration. The state on the belt 10, as shown in FIG. 6 is the one belonging to the time interval TS. The total amount of tape movement is shown in column S on the right side of the illustration. It should be noted that at the beginning, at the time interval TS of the next scan cycle, types and I are in alignment with hammers 1 and 9 respectively and that if the cycle continues. The type presented to each hammer is the type to the right of the type presented to the same hammer on the previous scan cycle. Thus, if there are sixty-four different types in the type series, the time cycle TS to TZ is required 64 times in order to present the complete type series to every urineer. It is therefore the maximum time it will take to print a full 8-character zone of data.

As will be explained in detail below, each of the eight main time intervals TS divided up TZ by the timer circuits 100 into sixteen smaller time intervals Γ0 to T 15th A "main time cycle" thus represents the time that is required for a single run of the main time intervals TS to TZ (the time required for scanning eight hammers), and a "secondary cycle" is the time required for It is necessary to run through the time intervals TO to Γ15 (the time that elapses between the point in time at which one type is in alignment with a given hammer and the point in time when the next type comes into alignment with the next printing hammer on the right ). Each main time cycle is therefore divided into 128 auxiliary time intervals. It can then be seen that no two print hammers in the active print zone can be actuated at exactly the same time for correct printing, since no two hammers are in exact alignment with the types at the same time within a print zone. As is known, this arrangement serves to save components since a single comparator can be used to generate hammer actuation pulses and these pulses do not need to be temporarily stored in secondary memory, but can instead be used to trigger the hammer at the time their generation can be used. Of course, when this arrangement is used, the data characters stored in the memory 30 for each printing position in the printing zone must be read and presented to the comparison device 22 in synchronism with the sequence in which the corresponding printing hammer in the zone align with the types.

Referring to Fig. 3b, the hammer drive circuit 20 includes eight separate hammer drivers. The SI eight drivers correspond to the eight print hammers! the pressure zone. Accordingly, every driver output is line via the gates 18 a and 18 δ with one pressure hammer connected in each pressure zone, for example

ίο example is the first hammer driver via the gate 18 c with a hammer 1 and over the crossbar 18 b with the hammer 9 is connected, etc. The gates 18a and 18f are activated by the mutually exclusive outputs of a flip-flop zones 44th Therewith

is can print in only one at a time Take place in the pressure zone.

Each hammer driver in circuit 20 is conditioned to be actuated by one of eight input lines 406 which are provided by the read control

ao circuits 400 come. As explained below, conditioning signals appear successively on these input lines in synchronism with the occurrence of the main cycle intervals TS through TZ.

The comparison device 22 receives an input signal with six parallel bits from the character position generator 150 and compares this with an input signal of six parallel bits from an input-output register 32, which the data storage

Matrix 31 of the memory 30 is assigned. At the time interval Γ12 of each auxiliary time cycle at which data present in the register 32 is to be printed, an AND circuit 441 generates a signal which activates the comparator 22 and causes it to generate a pulse at its output when the two signals comprising six bits, which have been fed to the comparison device 22, correspond to one another or match one another. The output signal of the comparison device 22 is fed to an AND circuit 23 which responds during the printing time (all preparatory line feed operations have ended) by transmitting a pulse to the driver circuits 20. The selected ham-

♦ 5 driver circuit activated to print a character in the active print zone. The actuating signal is further transmitted back to the Ablesesteuerstromkreis 400 to a return of the data character to prevent the register 32 to his place in the memory array 31st

Timer and character position generator 100

As in Fig. 3b reproduced, the timer and character position generator 100 comprises a timing circuit 101 for generating the sixteen secondary circuit timer signals Γ0 to Γ15 and the character position generator 150 for generating a six-bit output signal to show the comparison device 22 which type in alignment

So in the active pressure zone during each secondary time cycle Aligns during printing

The details of circuits 101 and 150 are shown in FIG. 4 reproduced. The circuit 101 comprises a flip-flop 103, the 1 output of which is connected to a gate oscillator 107 which generates a train of square waves as long as the output of the flip-flop 103 is positive. The oscillator voltage

13 14

is transmitted to make the signals from a decoder appear to be borrowed. It goes without saying that the circuit 113 fades in and a counter 111 ziHatorpause when the tape speed is incremented via the delay circuit 109. decreased, simply lengthened by a bit. The flip-flop 103 is activated by the character pulse CP, the character position generator ISO is also in

which is generated by the transducer 12 ″ (FIG. 3 b), a 5 FIG. 4 reproduced, and it has a six digit position and through the carry output from a main binary counter 151 comprising lungs, the Counter 401 in the reading control circuits 400 is connected so that the gate 153 a reset. Binary secondary counter with six positions

The decoding circuit 113 responds to each grain feeder. The secondary meter is in two three positions each of binary signals on the four output halves 169 and 171 for trailing lines of the counter 111 in that a posi- tive subdivides purposes to be described, tive output signal on one of the sixteen output. The main counter 151 is counted by each CP pulse

output lines TO to Γ15 is generated. Signals advanced by one count. Thus, the one of these lines, which are generated by the oscillator 107 on a main counter 151, a special coded signal for dazzled, the sixteen auxiliary time represent 15 each of the 64 different types on the printing band, intervals Γ 0 to TlS . 70 becomes 10 in response. The successive appearance of these signals on a completely negative output signal from represents the order in which the type counter 111 is presented, and T 15 corresponds to a full character on print hammer 0 (an imaginary continuously positive output signal from counter 111. digit, which by one Hammer distance on the left The output signals from oscillator 107 together »o side of hammer 1 is).

with the sixteen timer pulses Γ0 to Γ15. The gate 153 is controlled by an AND circuit 159

shown in the waveform diagram of FIG. activated to parallel the counting from counter 151

To be transmitted to the secondary counter 169,171 generated by the delay circuit 109. This delay is approximately equal to half the length of the transmission appears at the time interval Γ 2 during negative dwell time or idle time between 5 of the first main time interval TS (determined by two positive output pulses from oscillator 107, a 0 output from decoding circuit 405) each Delay is required to prevent main timing while the dta signal is being pressed from the counter 111 via the decoder. The immediately following T3 signal activates one

during that time, while AND circuit 165, which in turn causes a ren the counter 111 switches. Furthermore, since 30 AND circuit 161 generates a signal when the the signal which resets the flip-flop 103 to print zone 1 is the active print zone, or the condition Switch off oscillator 107, at Γ15 of the last one acts that an AND circuit 163 a signal er-auxiliary time interval A main time cycle is generated when the pressure zone 1 is the active pressure zone a delay circuit 105 is required. A signal from the AND circuit 161 becomes direct to prevent that the last Γΐδ output of 35 is in the eighth position of the secondary counter 169,171 via the decoder 113 is short-circuited. carry, thereby causing a count of

Since the frequency of oscillator 107 is fixed and eight is added to the count that is just from since the operation of the system depends on the fact that the main counter 151 has been introduced. A signal Output of the oscillator 107 at the speed of the AND circuit 163 goes through an OR of the Print ribbon 10 is synchronized, 40 circuit 167 must pass through and is directly in the first Knowing precautions are taken to reduce the low position of the secondary counter 169,171, which leads to To take account of fluctuations in tape speed, a count of 1 is added sight. This is done by setting the period.

of oscillator 107 is equal to Vim the time the pressure took The reason for adding the count of

belt motor that works at nominal speed, 45 1 or 8 on the secondary counter 169,171 at the beginning of each around the printing belt 10 by a distance exactly the same main time cycle during printing is in the distance between two adjacent types on the fact that the main counter 151 a code drive (the time between CP pulses). The reference for the imaginary 0-print hammer creates counter 401 (FIG. 3a), which supplies the oscillator switch-off and that, in order to provide a correct reference for the first pulse to the F'ip-flop 103, is a three-digit 50 hammer To look at pressure zone i, a binary counter showing counts, which has to be added by every reading of 1 while resetting to the CP pulse and which after the time-creating a correct reference for the first time interval T 15 of each secondary time cycle by one counter a count of 8 is incremented in print zone 2. The carry signal of the must be added. The number 1 is used because counter 401 is thus used at the end of the eighth 55 when the print hammer 1 is one type away from the ham secondary time cycle after the appearance of each CPmer 0, and the number 8 is used, pulse generated. Therefore, because the hammer 9 is eight types from the hammer 0, the oscillator 107 can operate for exactly 128 cycles before it is removed.

is switched off. The oscillator 107 thus works. Therefore, it represents the time interval TS 3 (secondary interval

during 128/130 of the time between CP pulses, 60 Γ 3 of the main interval TS) the output signal of the when the printing tape 10 moves at nominal speed secondary counter 169,171 the character code of the straight speed. Therefore, the short oscillator pause coming into alignment with hammer 1, which occurs at the end of each main timing cycle, ensures that when print zone 1 is active, oscillator 107 is actually exactly at that time zone, or the character code of what is currently in From the point of occurrence of the next CP pulse device with the pressure hammer 9 coming pressure is blinded, even if the print band speed is when the pressure zone 2 increases the active zone speed and the next CP pulse is something. At the time interval JS15, the OR stream appears before the point in time at which it adds another one to the secondary counter 169,171.

15 16

A second count is added, so that during the subsequent elements that carry a number from the series 200. At a low interval TT the counting in the secondary character reception and decoding circuit 202 receives the character code of the character, the character code of the character receives the transmitted input data in the form of a, which is with the print hammer 2 when the print serial bit series character by character from the Emzone 1 is the active zone or with the printing 5 gangsdatenleituug and collects each character in hammer 10 comes into alignment when the printing a register with a single serial input zone 2 is the active zone: in a similar way and a parallel output. At each point in time at the time interval Γ15 of each of the following main which the register is supplied with a full character, circuits TU to TY, another single count, the circuit 202 generates a positive off on the secondary counter 169,171 added to an input signal on one of the six output lines, show the character generated with the hammers to indicate what kind of character received mern 3 to 8 when the print zone 1 has become the active zone. Data and space characters are parallel, or with the hammers 11-16 in alignment by bits coming out of the register and through a gate 206 if print zone 2 is the active zone. and an ÖDER circuit 208 in the characters-When the next main time circuit is transmitted through the memory location of the memory matrix 31, the appearance of the next CP pulse is then initiated through one of the eight character address lines, the main counter 151 is incremented by 1, 304 and one the six storage group address and the secondary counter 169, 171 is addressed by a line 312. The gate 206 is activated by repeating the cycle described above by an AND circuit 214, which is set by properly. It can therefore be seen that when the first 7Ί signal is energized which occurs after printing occurs, the output of the data line goes positive. The same off-sub-counter 169, 171 a six bit output from AND circuit 214 causes coded characters to be representative of the types that OR circuit 228 generates a supply signal, sequentially in alignment with the hammers containing the data character in the memory matrix 31 of the active pressure zone arrive. Enter this six-bit number 35. The output signal from the OR circuit output signal is, as previously described, from the 228 is used for various other purposes which are used after-comparator 22 for the purpose to be described standing, for example to generate hammer actuation pulses. switch the character address counter 301, to the back. The character position generator 150 receives a flip-flop 226 for resetting as an input signal the stepping pulse, the 30 flip-flops 331, for setting a flip-flop 333 detected by the converter Hb is. This signal and for conditioning an input of an AND becomes an input of an AND circuit 157 circuit 284.

If the received data character is not fed to an empty OR circuit 155 signals which is character, an AND circuit 218 produces an eight with all six output lines of the counter 151 35 character bit, which is a »Signak bit is that is connected. AND circuit 157 generates an error signal through gate 206 along with the character on-error indicating the fact that the counter is being given. As will be described below in connection with 151, the memory read must be out of sync with the print tape 10. If the two are in synchronism, this character bit is used to determine, the increment pulse always appears 40 that characters to be printed are present in the memory 30 when the counter 151 is at its 0 output. If the received data character is an empty state and all inputs are the OR current character, then by an inverter circuit 222, circuit 155 are negative. If any input of the OR circuit is tied to the empty output of the decoder 202 at the stepping time, the AND circuit 218 is ineffective positive (if the main counter 151 does not turn 45, so that the addition of the signal bit verauf 0), causes the error signal to be prevented by AND. The space character is thus in its circuit 157 a resetting of the counter 151 to 0, effect a space position in the memory 30.
156 via the delay circuit Such If the received character of any of the error signal usually appears once initial synchro 50 gate 204 (while format control characters CR, LF or FF, a turn-on of the system works) to the first time interval Tl after the mechanism when the belt 10 initially goes positive on the output of circuit 202, bringing up speed. There is no means of causing an output signal to be displayed by an OR circuit 232 for setting the group in addition to the error signal, since such means do not form part of the flip-flops 331 invention. This exit make up. It can be seen, however, that a sequence of 55 signal still acts to the effect that the reset error signals the incorrect operation of the system on flip-flop 333 via an AND circuit 337 and shows, and the detection of such a sequence can be an OR circuit 335 can be reset and used, for example, to set a missed flip-flop 254. Furthermore conditioned to light up the display device and further- the output signal from the OR circuit 232 to prevent expensive printing, while a not necessarily 60 an AND circuit 236, the running tape recorder or the like special "continued to trigger the input message for later write" character in the memory 30 under condition printouts after appropriate correction of the statements to store the situation described below. will.

...,. " _Λη 65 The setting of the flip-flop 331 triecert a

Input current circuits 200 monostable multivibrator 345, whereupon a pulse

The input circuits 200 are shown in FIGS. 3 c via AND gate 321 and an OR circuit 315

and 3d, and they all include circuit- is transferred to the storage group address-

17 18

counter 309 to advance a count. Circuit 274 and an OR circuit 278 to counter 309 is a three position binary to reset the overflow flip-flop 28Ö.
counter, the outputs of which lead to a decoding stream. The fade-in of an FF output signal is passed through circuit 311 to generate a signal on a port 2S4, in addition to performing the functions of the six memory group address lines 312 to 5 described above. Each of these lines, when connected to an AND circuit 268 to cause a different memory group to be activated, causes an OR circuit 270 to receive a flip-flop 272 input data. Thus causes under normal. The setting output of the flip-flop 272 generates the reception of a CA, a bit which is to be automatically addressed as the LF or FF character enclosed in the control character and which indicates that the next memory group is to be advanced in a sequence , regardless of document 14 to the first printing position of the next depending on whether the previous storage group most form is required. It also makes it completely filled with data characters or not. The output signal of the flip-flop 272 via a gate circuit 296 is ineffective because there are six groups in the matrix 31 inverter 295, the S output line 312 is fed back to the input 15, whereby an O-line feed count is fed back into the control of an AND circuit 313 , to which the character is brought, regardless of the number, the counter 309 is caused at every sixth counter increment pulse at the output of the counter 294. Reset to 0. catch eight or more consecutive LF-

The setting of the flip-flop 331 causes characters to continue a carry on the counter 294 an AND circuit 343 partially condi- * o output is caused, whereby the flip-flop operated to cause a counter lockout function, 272 is set. So produce more than seven namely during a tabulation process, as successive LF commands automatically create a will be described below. Head vcm form command.

By resetting the flip-flop 333, the operation of the input circuits 200, this flip-flop ready, is summarized on a subsequent input as far as it has been described so far Blank received at the data entry point for a control character in the control memory array 41 to be inserted through gate 206, as will be described below. the memory matrix 31 at the special character-By setting the flip-flop 254, the at and group position is stored, which is set by the feed layer in readiness, an "update check 3" address lines 304 and 312 is determined.
sequence "to run through at a later time, receipt of any of the format control characters Ci? as will be described later, by the number of LF or FF causes the 2Lufleitsteuerungsstrom for receiving data memory circuits 300 to address the next memory group, groups in the Matrix 31 to be determined. and the various control flip-flops 256, 266

Fading in a CÄ signal through the Torstrom- 35 and 272 and the line feed control counter 294 circuit 204 causes in addition to the exercise of the currently being set to display the various format-described functions, the setting control processes that are received by a flip-flop 266 via a AND gate 264 and a format control character are required,
Furthermore, a reset of a flip-flop 280 via Then triggers as soon as the next data character an AND gate 276 and an OR circuit 278. 40 from the output of the AND circuit 214 into the This latter flip-flop 280 causes an »over - Memory is entered, the OR circuit 228 is running «situation as described below, (by setting the flip-flop 333) to automatically cause a line feed stable toggle 347 to control a gate 242 effectively which do in the control character. Thereby, the character (including that which is included in the memory array 41-45 of a signal bit) is input to the control memory array 41. given. A delay circuit 349 is on the

Setting the flip-flop 266 has the effect that an output of the monostable multivibrator 347 is provided.

OR circuit 258 see the print zone flip-flop so that the output pulse of the OR current

256 sets, whereby the set output of circuit 228 has time, a count in the counter 294

this becomes positive in order to discontinue the inclusion of a die 50 if such a process is carried out by the

Print zone 1 as the bits determining the active zone, the state of the overflow flip-flop 280 is set

in the control character. This causes the demand.

Measure as described below that the next when gate 242 opens will be a seven bit Data characters received at the input subsequently comprising control characters in the memory matrix 41 entered by the first print hammer in zone 1, with the seven bits of the character being printed will. consist of one signal bit, two (alternately

By fading in an LF signal through the gate (final) bit from the output of the print 204, in addition to the exercise of the above-described zone flip-flops 246, one bit from the output functions, an AND circuit 291 of the head from form flip-flops 272 and three activated to cause an OR circuit 60 bits supplied by line feed counter 294 to trigger 292 a one-shot multivibrator 293, which leads. The character position in the memory matrix generates a pulse which advances the line feed 241, at which the control character is stored, counter 294 by one count. The output of the counter 204 is determined by a gate 312 through the memory group address lines. The active address line of this circuit 296 is faded in in order to be included in the control character 65 group, of course, corresponds to the memory that is entered in the control memory group in the memory matrix 31, which is then entered into the address matrix 41. That is siert through the gate 204.
The supplied LF signal continues to activate a UInD- After the input process of gate 242 has been

ends, a delay circuit 351 sends data to the feed control circuit 300

Input pulse through which leads to Πΐρ-flops 272, 266. If the reading process is thus fully

and 280 reset and the counter 294 goes to 0 in synchronism with the feed process, address

to return. The control circuits are thus the same as the reading control circuits 400 Manufactured in preparation for the creation of the 5 memory bank such as the feed control circuits 300.

next control character when responding to the Thus, no data can be stored in any of the other

next received format control characters or the ren five storage groups are present, and all

The next received format control characters on the five memory groups are thus for buffer memory

Input. · accessible. This means that if the feeder group

In the input circuits 200 io pen address counters 309 are still available through the six-stage test

the test circuits provided, which is cyclically driven periodically, an output signal from

the status of the availability of storage groups of the comparison device 244 before the time 77

determine in the memory matrix 31 in order to be determined is not obtained. The output signals of the

len whether the system for the update mode of operation is the same device 244 at times T 6, Γ 5

has to advertise. The main circuits 15 or Γ4 mean that four, three or two available

In this group, flip-flops 254 and 240, a bare (empty) memory group are present.

Comparator 244 and an AND current- If the reading control circuits 400 by four

circuit 246. At each point in time at which an out storage group behind the feed control circuit

output signal from the OR circuit 232 are at addressing 300, is only a memory group for

check for the passage of a CR, LE or FF ao receipt of new input data free. In this situation

Signal goes through gate 204, the flip-flop tion generates the comparator 244 an output

254 is set, whereby the right input to the output signal during the second time interval 7 3

AND circuit 252 conditioned or effective in the test circuit. In the awkward situation, though

power will. Thereafter, as soon as the data line generates the reading control circuits 400 by five memory

processing when responding to the receipt of a data as groups behind the feed control circuits 300

sign is positive, the AND circuit 252 is a, the buffer capacity of the memory is reached,

Output signal, which AND circuit? 2 341, 238 and there are no memory groups to record

and condition 246. When new input data becomes available, in this case it will

the AND circuit 341 is conditioned in such a way that the output signal of the comparison device 244 becomes

received by the next Γ 2-, Γ 3-, 74-, 75-, 76-30 at the time interval T 2, the first «time interval

and 77 timer signals obtained from the OR current val- ues of the test circuit.

circuits 323 and 325 to the OR circuits In the embodiment described, 327 will be applied by the I IND circuit each of these last two buffer states as critical 341 to the OR circuit 315, denoted by, and they require that the System in which the input of the feed group address counter 309 35 update state is switched to a connected. These six incremental impulses drive lust from data to prevent
the state of the six output lines 312 of the die is carried out as follows: The AND stream decoding circuit 311 over a full circle 246 receives an input signal from the run and, when the T7 time-OR circuit 323 is terminated, leaves the during each of the timing signals energizes the same output line that the 40 encoder signals 74, 75, 76 and 77 is active. An off at the beginning of the test cycle was excited. output signal of the comparison device 244 during

The same 72-pulse that causes the test circuit to run at any one of these time intervals

conduct, activates AND circuit 238 to post an output signal to one of AND circuits 246

Set flip-flop 240. a short delay, which comes from a delay

The comparison device 244 compares the muting circuit 250 which is generated. The first of the signals on the six feeder group addresses is provided to enable the sensor lines 312 to match the pattern of signals to signals on the input lines 312 to the six read group address lines 412 which fixate or form equalizer 244 Read control circuits 4OC transmitted before the comparison result is checked. The starting point. The active line of this latter address signal of the AND circuit 246 resets the flip line 412 shows that memory group of the flop 240 which is indicated by the output signal memory matrix 31, which is currently of the comparison from the AND circuit 238 at the beginning of the Test device 22 is read, and the comparison circuit has been set, and it provides further device 244 generates a positive signal at its out to the flip-flop 254 via an OR circuit output, if a match is obtained. If 55 253 returned to end the test sequence,
the output of the comparison device 244 at the time. As previously described, the return point 72 or 73 of the test circuit becomes positive, the control output of the flip-flop 240 is the AND gates 307, known that less than two empty memory groups 337 _; 321, 239, 264, 268, 291, 276 and 274 are conditioned or activated in the matrix 31 for the reception of input data. Conditioning these are available. However, should the output of the 6 "AND gates be required to enable the equalizer 244 to operate normally during any of the timing circuits 200 and the feed control current intervals 74, 75, 76 or 77 of the test circuit 300 then known that more than two chunks. However, if it has been determined that there are still available storage groups. Write operation is required, ie a write-out

The reason for these determinations is as follows: 65 output signal from the comparator 244 im

The read control circuits 400 can be present when the address time interval 72 or 73 is not present

sizing of memory groups for reading never before the output signal from the AND circuit 246

the group that is currently witnessing under the control will go and the flip-flop 240 will remain at the end of the

1817

21 22

Test circuit in the set state. The output signal of the monostable multivibrator 347 is therefore mixed

the above-mentioned AND gates remain ineffective, which acts via the delay circuit 349, because!

and normal operation of the system is prevented. The control character in the memory matrix 41, wonacr

Flip-flop 254 is triggered by the timer pulse Tl, the same pulse that is generated via the delay current

reset, which acts via the OR circuit 253 5 circuit 351, the counter 294 resets to 0

works. The output of the OR circuit 228 is negative

Once the system has been switched to the update feed via the delay circuit 230 and stand, the mode of operation is as follows: the OR circuit 305 to advance the data address counter 301 received from the input circuit 202. Furthermore, the output signal of the delay circuit 230 is input into the memory matrix 31 as described above. If any flip-flop 226 returns, thereby preparing which of the format control characters CR, LF, or FF to be received by the next format control character, the resultant will be set by the OR circuit during the update output 232 the flip mode is received, whereby another flop 331 as described above generates update characters and stores them in the memory with the result that the following output is input.

signal from the monostable flip-flop 345, none Each of the format control characters CA, LF and FF, effect has the effect of the ineffective state of the received while the system is in the continuation AND circuit 321. The flip-flop 254 is write state flip-flop 254 is also set in the usual manner so that ao sets and triggers another update test circuit upon receipt of the next data input character in the run. When the update condition is cleared, AND circuit 252 is made operative to initiate an update test circuit into flip-flop 240 in its reset state. stood returned at the end of the cycle, so that

This is of course necessary in order to avoid the AND-

able to switch out of the update state, »5 circuit 236 is made ineffective and the

if such a process is justified by fading in AND circuits 307, 337, 321, 239, 264,

that the required number of storage groups 268, 291, 276 and 274 are made effective, so

is vacated. that the system has its normal response to format

The output signal from the OR circuit can resume 232 control characters,
continues to make AND circuit 236 effective, 30.
via an inverter 234 from the output signal, “memory 30 and 40
of flip-flop 240 has been made effective. That ^and feed control circuits 300
The output signal of the AND circuit 236, which acts via the data memory 30 comprises an arbitrary OR circuit 241, sets a flip-common data memory matrix 31, for example a flop 226, whereupon an output 35 of a magnetic memory matrix with six group signals appears, one is a update character of data storage locations, each group of which activates generating circuit 224, and one has a storage capacity for eight data characters. AND circuit 216 after one of a delay Each memory group can individually make data feed operation from one of the six feeds effective during a delay circuit 220. The length of the node address lines 312 to be addressed by circuit 40. Each 220 induced delay must the length group can individually during a Ablesevorganges the time interval Tl exceed to a premature Fort write character is addressed under conscience 412 of one of the six Ablesegmppenadressenleitungen production. To prevent any character storage location in such circumstances. the addressed group can be addressed individually

The stream generating the update character for supplying one of the eight supply character circles 224 produces at its output a seven bit address line 304 and for reading one of the code character comprising a desired eight read mark address lines 406. A on indicates a special symbol, for example a star in front of the cable 209 from the feed circuit 200, which is in a register 212 together with an input data character present in the adres signal bit is saved. The next Π signal, 5th character position of the addressed memory group which occurs after this work sequence, activated guided, namely by a leg as above AND circuit 216 to generate an overlay write from OR circuit 228 pulse to generate the particular character via feed signal.

the gate 210 for storage in the memory matrix causes a signal 31 to be transmitted during a reading process. The output of the AND 55 from an AND circuit 431 that the data digit circuit 216 also causes the OR which is in one of the lines 406 in circuit 228 a supply pulse for inputting the from one of the lines 412 selected Speides character is generated in the memory, resets the flip-flop group is stored, via the cable 33 to flop 331 and sets the flip-flop 333. the input-output register 32 is transferred. Furthermore, this output signal from the OR makes this register 32 leads the character over the cable circuit 228 to the AND circuit 284 effective, 34 to the comparator 22 which triggers the monostable multivibrator 293 at the time Γ14, if this is generated, causes the character in the register 32 overflow flip-flop 290 to be in the memory location in the matrix 31 in the set state. As a result, it is returned under 65 from which it was removed,
Under certain circumstances, a line spacing control The control memory 40 has an arbitrarily accessible bit generated, which is included in the control character on the memory matrix 41, for example a mass. At a later point in time, the gnetkernspeichermatrix, an output register 42, hides.

23 24

an output gate circuit 43 and a zone flip-zone flip-flops 256. This latter process occurs flop 44. The matrix 41 has six storage locations for as follows: If the flip-flop 256 is in its seven-bit character, and each The memory reset state is, the AND current point can be made partially effective for feed operations from one of the six circuit 262 or conditional address lines 312 can be addressed individually. 5 ned, and the AND circuit 260 is ineffective. Each character position in the matrix 41 can continue to be made. If at this point in time the carry appears for reading operations from one of the six address signals, the flip-flop 266 is for lines 412 to be addressed individually. the return of the car in its reset state,

When gate 242 is open a seven bit and AND circuit 262 generates an output control character in control store at io signal which causes OR circuit 258 to insert the location which is then used by one of the flip-flops 256 sets: whereby a data bit for address lines 312 is addressed. When the pressure zone 1 is generated, which is to be included in the control character AND circuit 445 activated at the time interval Γ 8. If the flip-flop is 256, the character 15 present in the memory location, which is then addressed by a line 412 at the time of the occurrence of the carry signal, is transferred to the output register 42 while the flip-flop 266 is reset. While the th state is set, the subsequent time interval T 9 generates the AND-AND circuit 260 an output signal to the circuit 521 an output signal which the gate flip-flop 256 resets and a data bit for the 43 opens and causes that the zone flip-flop 44 cause print zone 2, which is set or reset in the control character, and that is to be included in Ab- »o. If it is thus assumed that it depends on the print zone bits, that is, that the flip-flop 266 is stored for the carriage return control characters. Furthermore, if that remains in its reset state, gate 43 reverses the control bits regarding head-of-form- through each carry signal from counter 301 of the sheet and line feed in the paper feed control output state of the print zone flip-flop 256 circuits 500.95. Of course, if, as above

The feed control circuits 300 are explained in FIG. 3, the flip-flop 256 in response to a FIGS. 3c and 3d reproduced, and they comprise Ci? State forced to provide train symbols of the 300 series. In the course and any carry output that is generated before resetting the above description of the input current of the flip-flop 266 has no active circuit 200, all functions of the circuits 300 are applied to the pressure zone flip-flop 256.
except for those referring to the tab. The counter 309 has a six-count

refer to the initial process, has been described. The circuit for successive excitation is provided in this section with a short combination of the six address lines 312. After the version of the execution and operation of the input line 312 becomes positive, the AND control circuit 300 is given, the one Explanation of those parts of the pulse activated, in order to return the counter 309 to 0, going into a circuit 313 through the next counter input individual -circuits 300 that go to the tabulation input positions. The counter 309 is owned by the output of the function. AND circuit 317 incremented by one count

The essential elements of the circuits 300 40 tet, which in response to each carry pulse are the feed character address counter 301 and that of the counter 301, which occurs, becomes positive, as described above decoding circuit 303 and the feed group when the output of AND -Stromadressenzähler 309 and the decoding circuit 311. circle 343 is negative. The counter 309 is also generated by the three digit binary counter 301 incremented by one count in response to eight particular combinations of output signals 45 of each output signal from AND circuit 321, each of which causes a different one to be activated each time the flow of input eight output lines 304 of the decoding circuit data character is excited by one or more format controllers 303. The counter 301 is broken by every character CR, LF or FF. The positive signal incremented by one count up- counter 309 is also incremented by one count, which is incremented by the OR circuit 305 either 50 by each output signal from the AND circuit from the delay circuit 230 or the 341, which output signal is -AND -Stromkreis 339 is presented, the rend of the update test sequence according to the latter occurring during the tabulation process according to the description.

standing description comes into effect. The tab feed process is shown by fading in

Counter 301 is the one 7V4B signal from the circuit 202 through the AND circuit reset by an output signal from 55307 to 0, the triggered when the door 204 when it is allowed by the work of the door 204 while fading of a CA AND circuit 239 is generated in the update state verSignals is prevented. This superimposed output signal

A carry signal from counter 301 indicates that flip-flop 329 is set , which in turn makes the AND all eight character positions of a memory group filled 60 circuits 339 and 343 effective. This signal causes the AND circuit bar afterwards the AND circuit 339 transmits a 317 pulse, provided that the output pulse is negative during each of the following secondary outputs of the AND circuit 343 , and time intervals Γ2 to Γ7. Each of these pulses switches over the OR circuit 315 to advance the feed character address counter 301 by a routing group address counter 309 to the next count. To increment the output signals from the counter 301. The carry signal is also reset via the lines 302 to the input of a tab that was connected or pre-wired to the flip-flop 333 via the OR circuit 335 and changes the output state of the pressure selection device or plug-in device 357.

1 817

25 26

carry. Furthermore, this device does not receive a continue, but, as usual, reverses the state Input signal via line 257 from the input of the pressure zone flip-flop 256 um. This will be exhibited Output of the print zone fiip-flop 256th led to memory space in the memory matrix 31

Eliminate the need for the pre-wired tab selector. Since the flip-flop 331 is located in its 357 includes a socket 355 with eight input con- 5 set status, when the TAB signal clock connections 355 a, which was received along its lower, this means that no data wall is distributed are, and with four output contact characters after the most recently received format control connections 355 b, which characters have been received along their upper wall. Because that is what is distributed last. The plug 357 is inserted into the socket 355 captured format control characters the counter 309 and has a set of contacts that switched with io in order to register a new memory group. The plug is before a point in time at which no data has yet been wired to four selected input contacts of the new group. The possibility to connect with the four output contacts. The possibility that the carry signal from the counter 301 determines the four selected input contacts and advances a counter 309, would only result in the waste of a memory group given the sixteen print hammer. Hence, a special character address in a selected prevent the AND circuit 343 and the inverted print zone. As shown in FIG. 3d, before 319 such a premature closing of the group, the plug 357 agrees with the print hammer 10, since it and the only effect of the transfer signal is the right contact 355 b with which the print zone 2 * o is, the Output of the pressure zone fiip-flop 256 representing input contact 355 a connects and to switch and to reset the flip-flop 333,
the other three output contacts with the input at any point in time at which one connects data contacts representing a binary count of 2 in characters in the eighth memory location of one of the printing of the feed character address counter 301. storage group assigned to zone 2 is managed,

An AND circuit 353 is connected to the four output «5, the next received data character must be connected to a contact and generates an output new memory group which is guided by a signal for resetting the tabulator flip-flop 329, control characters in the memory matrix 41 is accompanied when all four selected inputs are positive. which starts the advance of the document 14 by a little-Thus, after setting the flip-flop 329, calls for a line spacing at least. This condition through a T / 1 B signal of the AND circuit 339 a 3 ″ is necessary to prevent overprinting. The only exception to this rule applies when counter 301 increments upwards. it is desired to add certain special additional characters. When the counter 301 adds the characters specified by the plug 357, for example I reaches the address specified, the AND circuit or accent characters add to a line that has already been printed! 353 the flip-flop 329 returns to the output 35 data. 301 Zeibei the counter at the overall of the plug 357 chen ahead, but without support of any LF - In this situation, this special signals is *> to end the AND circuit 3 ", WO characters on circuit 202 immediately a C /? - The requested address is left. Therefore, the character. In all situations with the exception of the next received input data character in the situation just mentioned, the data memories described automatically add a line feed command to the specified character address 40 circuits and then add a line feed command to the control character using hammer 10, Therefore the tabulation input stream is operating, the data immediately follows, which circles to produce a sequence of input data printing by the print hammer 16 which is immediately after a, provided that the required LF- Command TA B control character has been received and, starting at 45, not durc h one or more LF format control characters of the specified, pre-wired data position have been added that are to be printed in the usual manner at the input, regardless of where they are received. This automatic line printing of the previous data characters has stopped the progression of the described embodiment. is particularly necessary to prevent overprinting at de]

If all six timer pulses T 2 to T 7 from 5 ° to prevent system, if they have been faded in in the update of the AND circuit 339 works, since, as already described, dii and an output signal from the AND circuit system to such Times externally supplied LF 353 has not yet been generated, the flip control character remains ignored.

Flop 329 set and timer pulses beginning assigning a data character to the memory

at T 2 of the next secondary time cycle, 55 30 are faded in for subsequent printing by the hammer in order to drive the counter 301. 16 is determined by the occurrence of an output If an over-signal from the AND circuit 262, which generates the print carry signal, is generated during the counter drive process, this acts in the normal zone flip-flop 256. This output signal sets the status of the print zone -Fiip-Flops is also used to reverse the overflow flip-flop] 256 and set the feeder group address- 60 280, causing the AND circuit 291 to increment counter 309 by one count. However, it is partially made effective. Should the other act in the situation in which the ΓΛΒ input to the AND circuit 290 becomes positive immediately after one or more of the format before the flip-flop 280 is reset, the control character TR, LF or FF is received, the OR circuit 292 to the effect, the monostable AND circuits 343 to the effect of triggering the AND «5 flip-flop 293 in order to disable a count of 1 i circuit 317, and to cause any carry to the line feed counter 294 or output from the counter 3Oi, to be introduced during the TAB- . This ensures that the input process is generated, and the counter 309 switches the necessary timing feed command in the control unit

27 28

character is present, which is the next received address the different groups for reading Is assigned to data characters. If the system is different from the data storage matrix 31 and address the is in the update state, the on causes different characters for reading from the control panel of the next received (or inside memory matrix 41. Furthermore, according to the previously generated) Data character the occurrence of a signal 5 for the description of the signals on the output from OR circuit 228, this output lines 412 from the comparison device 244 at signal makes the AND circuit 284 effective and uses the update test sequence to be carried out, activates AND circuit 290 to increment the AND circuit 409 receives signals from ten of the counter 294 to trigger. Immediately afterwards ■ AND circuits 417 and from the 5 output results a signal on the delay circuit 349, io conductive 412, to a signal to reset the Zähum to generate the control character including the line prefix 107 to 0.

push bits to be shown in the memory 41 and the Am time interval T10 of each secondary time cycle

Flip-flop 280 via the OR circuit 278 back-checks the AND circuit 433 the update bit

to deliver. location of register 32 to determine if

If the system is not in the update mode of a data character in the character lock position, a positive signal is present on the memory matrix 31, which is then addressed by the data output from the circuit 202 to the AND lines 406 and 412 . When a circuit 290 is present across the OR circuit 286 characters, the AND circuit effectively produces an output pulse to cause the line feed 433 to cause a signal flip-flop. If, however, 435 is set before the data is received. The set output of the flip-flop character a CR character is received (at through 435 conditions the AND circuit 441 to enable the above-mentioned underlining process to enable the comparison device 22 for the total or accent setting process), generates the AND following Time interval TU outputs an output signal which performs the flip-equal while a three positions on flop 280 is reset in order to prevent the generation of the line-leading binary counter 415 from being reset to 0, push bits. Similarly, an AND circuit 421 (via the inverter 423) provides if the LF format control character is activated prior to the data to prevent an increment of the counter character, the AND circuit 274 a lers 415 and a Stand-by output signal, which resets the flip-flop 280, encoder circuit 413 is reset. On the following to prevent that the then compiled 30 lowing time interval Γ15, the flip-flop 435 control character demands one line feed too much. reset. This process guides the work of the

Timer circuit 413, leads to the ineffective

Reading control circuits 400 collect the AND circuit 441 in order to

The read control circuits 400 are to be blocked in the equalizing device 22, and for the condition Fig. 3a and 3b shown, and they comprise 35 kidneys of the AND circuit 421 in order to enable a progression of all circuit elements which are numbered the th of the counter 415.
Row 400 are provided. Two of the basic The counter 415 is switched at the time interval Γ11 of each circuit element are the reading mark address- secondary time circuit upward by one count 401 and the reading group address counter 407. when the flip-flop 435 is reset. The counter 401 actuates a decoding circuit 4 ° and the printing Flip-flop 419 is set. The 405, which has a positive signal on one of eight off counters 415, thus performs the function of the display, output lines 406 for each particular combination when eight successive auxiliary time cycles of binary signals from the counter 401 are generated. A (a full main time cycle) has elapsed without a delay circuit 403 generates an output detection of a data character in the addressed signal after every T 15 time interval, thereby continuing the 45 group of the memory matrix 31. Since each time the counter 401 is switched by one count, the secondary time cycle is effected becomes a different character position. The counter 401 is checked by each character in the group, an overpulse is reset to 0, which is indicated by the character margin signal of the counter 415 that the memory card converter 12a is generated. Every time the counter group is empty and causes the AND current generator 401 to generate an output pulse from a completely positive to a 5 »circle 417 to switch the completely negative signal, a read group address counter 407 is assigned to the next one -Signai generated and to advance to a timing circuit 101 group. It should be noted that where it is used in the manner, AND circuit 417 does not have this output as it was previously in connection with FIG. 4, if the output signal has not been dei. The output lines 406 of the decoder 55 comparator 244 (Fig. 3c) is negative. The! Circuits 405 are used to prevent incrementation of the counter 407, whom to address for reading from the memory matrix 31, the memory group addressed for reading and the individual hammer driver circuits 20 are the same memory group, which is to be conditioned for writing adres for actuation . Furthermore, the is sated. This prevents the readout circuit «O output line 406 in the character position generator 60 from reaching the feeder circuits.
150 is used in the manner previously described. The flip-flop 419 performs the basic from

The reading group character counter 407 is read out by the read monitoring function by, when ei

each Si generated by an AND circuit 417 is in its reset state, i.e. (

gnal advanced upwards. The decoding circuit AND circuits 431, 421 and 23 makes ineffective

411 receives the output of counter 407 65 so that any increment of counter 415 ver

and generates a positive signal on one of the hinders and any reading process as well as there

six output lines 412 for each different generating some actuation pulse from de

Output combination. The output lines 412 Vergjeiehseinrichtung 22 prevents the flip

29 30

Flop 419 is reset by the output of the AND to the control store output register circuit 417 which, as just described during each time interval T 9 with regard to the, indicates that all data of a memory presence of a signal bit is to be checked . When a group is printed out, and causes the signal bits to be found, a signal is generated from the next memory group and its associated 5 AND circuit 521 in order to set the flip-flop 519 control characters in the control memory 41 to be addressed, whereupon an inverter circuit is set 447 den. Printing cannot be resumed to AND circuit 445 to be taken until a signal from an AND to any further reading of the control store to circuit 425 is generated to prevent flip-flop 419 from occurring. Deliver the signal from AND circuit 521. This cannot occur until a positive io is still used to activate the gate 43 signal on input line 514. A fourth and the print zone, header-of-flyer signal on line 514, coming from and line feed bits from the control character in paper feed controller 500, indicates that register 42 is to flip-flops 44 and 515, and to all format control operations, respectively to be transferred from the newly addressing counter 513. The OR-currented control characters are required to be executed. Circle 522 fulfills a "back-locking function". around the AND circuit 521 during the full

When the line 514 goes positive, it triggers a duration of the time interval Γ 9 to hold positive. The monostable multivibrator 427, which causes the outfeed of the zone flip-flop 44 with the new output of an inverter circuit 429 is negative. The print zone control data causes in most Fäl-AND circuits 425 can thus not generate its signal ao len activation of a different one of the gates 18a until the first character pulse CP after the and ISb. The requirement for the hammer delay timer output of the monostable flip-flop 427 approximation timer circuit 523 can thus be seen to occur. The monostable flip-flop 427 thus creates time that the last data is delayed enough so that the switches printed in the characters of the previous memory group can be set to print zone gates 18 a and 186 before the state of the switch can be set and the paper can be set, where gates 18 a and 186 begins to change, and it is further ensured that at the beginning of the response to the control character, which counter 401 is assigned to the next printing circuit in its new memory group. nen 0 state, so that the memory group The output of the AND circuit 521

scanning at the first character of the group is also used to enter a »paper pre-feed. thrust «-flip-flop 520, which the

After each generation of an actuation pulse AND circuit 516 makes partially effective to to the hammer driver circuits from the determination of the end of the paper advance to compensation device 22, what is possible in register 32 is saved, if a paper advance was made at all Data characters printed. The actuation pulse 35 is on hand. At the first time interval 710 after activating to a flip-flop 439, whereupon the gate 43 is switched and if no "further" part AND circuit 437 is disabled. feed is required by the AND current if When the next ri4 time interval occurs, circuit 516 generates a signal that the flip-flop 518 hence AND circuit 437 does not set an output. The adjusted output line 514 becomes pulse, and the printed character will not be positive in the 40, so the time delay of the monostable Memory 31 returned, so that the character storage flip-flop 427 is initiated, which is subsequently to is left empty. setting the pressure flip-flop 419 in accordance with

If a long period of time, for example 30 Se- above description and a reset announce, elapses without .that any signal from flip-flop 520 leads to any further Sibits are found in register 32, the 45 signal from AND circuit 516 is to be blocked until after would assume that all data in memory 31 was read from the next control character, have been printed and no new data has been received. As soon as the print flip-flop 419 is set (at

who are. The ready signal to initiate this pressure cycle) becomes the output Timing from the timer circuit 413 generates an inverter 443 positive and sets the flip-flop is used to turn the print tape motor from 50 518 back. To switch the set output line 514, The wear and tear of the flip-flops 518, which is very high, becomes negative and prevents slowing down moving mechanical elements following setting the flip-flop 419 until a signal to reduce the plant. - is generated by the AND circuit 516, the on

shows that all of the paper-feed operations performed by the

Paper feed control 500 55 next control characters are requested

have been. Two cases must be considered

The circuit elements of the paper feed control- the first of which is the case in which the tion 500 are shown in FIG. 3 b reproduced and does not require paper feed due to control characters, and the circuit blocks shown with reference numbers, the second of which is the case in which a surfaces of the series 500 are provided. When the flip-60 paper feed is requested. Flop 419 is reset to a pressure circuit 1. In the case in which the control character is no

to terminate, its reset output line 420 will contain line feed data, the gate will remain positive and initiate an operation of a hammer transition lines 43 a and 43 b negative when the gate 43 delay timer circuit 523 initiates. After a time interval Γ 9 opens and the flip-flop is delayed, the output of the 65 515 remains in its reset state, and the timer circuit 523 activates a flip-counter 513 remains at 0. Thus, the output is flop 519 reset, after which the AND circuit from the OR circuit 511 negative and causes 521 via an OR circuit 522 effectively no actuation of the feed device, and if

the AND circuit 516 the output of the inverter state normal operation

512 at the time interval 7Ί <Ι , a signal is generated to set the flip-hop 518. In the description below, this briefly has the effect that the output line 514 becomes positive, in order to summarize the sequence of operations which allow the subsequent start of a new pressure circuit to be carried out when the system is operating normally. operating state works, with the various sub-2. In the case in which the control character line processes are already described in detail above, requires line feed processes, a positive Si For the following description, the signal is either on the line 43 a or on an or F i g. 3 a to 3 d referred to,
several of the lines 43 b are given to the flip-io. It is assumed that the following data block flop 515 is set or a count is included in the counter at the data input: CR, LF, LF, D, ler 513 to be entered. In this case the output D, D, D, D, D, D, D, D, D, D, D, D, D, D. Those of OR circuit 511 will be positive and the time message will require a carriage return and doping interval T 10 immediately after opening the gate pelline feed, after which a line with 15 data-43, the AND circuit 516 is not positive, and * 5 characters are to be printed. The symbols D signify the pap-flop 518 remains in its reset, either data characters or space characters. State so that printing is suppressed. As soon as the C7? Character from the circuit 202 A positive signal from the OR circuit 511 is received and decoded, the CK line is caused that the paper feed controller 501 starts positive and at the following time interval T1 with the advancement of the document 14. * o gate 204 carries a positive signal to OR- A common type of format control device included in circuit 232 and to AND circuits 307, the feed control, generates 264 and 276. AND circuits 307, 264 and positive Pulse on a line 509 each time, 276 are already partially activated, since the system is not in the update mode of operation when the document 14 is moved forward by one line spacing, and it generates a positive pulse (the reset output of the flip Flops 240 is po on line 507 if document 14 is too positive). Therefore, causes the superimposed CR signal, the first print line of the next form or that the AND circuit 307 has been fed to the feed mark form. resets the address counter to 0, the AND current circuit 200 as explained above in connection with the input circuit 264 sets the carriage return flip-flop 266, the head-of-form circuit 30 and the AND circuit 276 complete this Overflow flip sheet and line feed bits are mutually reset by flop 28 © (if this is not the case, that is, if the gate 43 has a positive signal for it is already in its reset state). Line 43a emits, illegal lines 436 must be negative. Setting the flip-flop 266 forces the pressure to be, and if any of the lines 43b is positive, the line 43α must be negative . When it stood, which indicates that the next input, the flip-flop 515 has been set through the gate 43, data characters captured in print sequence 1 are printed, the OR circuit 511 energizes the feed control.

einrichtung 501, and the document is pre- activation of the OR circuit 232 leads

moves away until the head of the next form is reached for setting the group flip-flop 331 to be. At this point in time, the signal on the 40 resets flip-flop 333 and for setting line 507 resets flip-flop 515, whereby the setting of flip-flop 254 causes the OR- Circuit 511 negative leads to the triggering of the monostable multivibrator 345, in order to terminate the feed process. On to increment the feed address group counter 309 by a time interval Γ10 after the end of the feed count, so that the next memory generates the AND circuit 516 a signal to the 45 group to receive data characters to activate the flip-flop 518 to start the will. Enable pressure circuit by resetting flip-flop 333. If the gate 43 introduces a count in the counter 513 stable flip-flop 347, the output of the OR circuit and the reset pulse for the next Si

; positive to initiate the advance and every time 50 signals of the OR circuit 228 are generated. Through

j if the document 14 is ahead by one line spacing- setting the flip-flop 254 the AND current-

! is moved, the d <output signal at the circuit 252 is partially made effective, so that it is before line 509 the count to the counter 513 by 1 or is prepared for an update test process to trigum a count. When the counter 513 reaches "0", like when the data output line of the power; the feed is by the required number of lines through a circle 202 the next time it becomes positive.

led, and the output of the OR circuit The first LF character causes the LF output

511 becomes negative, whereby the feed is terminated gangsleitung is positive, whereupon the next and the AND circuit 516 is conditioned, time interval Π the gate 204 is caused to trigger a Sium subsequently a pressure circuit. gnal to the OR circuit 232 and the AND

Arrival of document 14 at the head of the next 60 circuits 291 and 274 to deliver. The so trig-; Form is an unconditional requirement for the suspended output of the OR circuit 232 has none

: th of the paper feed determined. Accordingly, there will be effect since the flip-flops 331, 333 and 254 are already

; by occurrence of a form header signal on the in its set state, reset delivery

Line 507 of counter 513 is reset to 0 (status or set status are. The AND-

! by the flip-flop 515 according to the above 65 circuit 291 generates an output signal which

Writing is reset), which causes the monostable flip-flop 293 to trigger and the time

j it becomes that the document 14 stops and the AND line feed counter 294 advances by one count.

Circuit 516 is made effective. The AND circuit 274 generates a signal that un-

33 34

is effective because the flip-flop 280 is already being received via the gate 206 to the

In a reset state, there are seven remaining character storage locations in the

The second LF character causes the simultaneously addressed memory group to be created. The fading in

A series of signals, as just mentioned, of the seventh character of these data characters causes

the result being that the AND- 5 that- the counter 301 from its complete 1-to-

Circuit 291 the monostable multivibrator 293 trig- stand goes over to its complete 0 state,

gert to increment the counter 294 by a count of 2, whereupon a carry signal is generated. This

switch on. The carry signal activates the AND circuit 317,

When the first data signal in circuit 202 to cause the feed group address to be received, the data output line po- io counter 309 is addressed to the next memory group, that is positive, and the AND circuit 214 is energized, so flip-flop 333 resets and the print zone Fhp that at the subsequent time interval T Id the gate 206 flop 256 switches to its reseti state, is opened in order to display the data character parallel to that which is for the print zone 2.
first * character storage location of the newly addressed in the matrix 31 of the character in the matrix and in order to reset it to the first character position of the newly opened memory flip-flop 331, the flip-flop 333 is inserted, and the output of the OR and the AND circuit 284 partially active circuit 228 sets the flip-flop 333, what to do. The resetting of the flip-flop 331 so that the gate 242 is opened in order to transfer the control character to the memory 41 for triggering the next feed 1010000. The first 1 group counter forward pulse when responding to this character is a signal bit, and the other 1 is the next received format control character. indicates pressure zone 2. No format control pre-The setting of the flip-flop 333 triggers the mono-gears are required.

stable flip-flop 347 to generate a pulse as the remaining six data characters in the sequence

which after a slight delay the gate 242 successively become character storage locations

opens the format control character to memory 41 2 to 7 in the addressed memory group,

to be transferred, and which one after a further

delay takes effect, the line counter 294 and only the supply of data characters and control characters,

reset flip-flops 272, 266 and 280. 30 All these operations are indicated by time signals

The control characters Γ1 to Γ 7 transmitted by gate 242 are time-controlled and thus occur during

is 1100010. The first (left) bit of this character is the end of the first halves of the secondary time cycle

one signal bit, the second two bits show the course. During the second halves, i. H. select-

Print zone, the fourth bit indicates that no end of the time intervals T 8 to Γ15, is each of the

Line feed to the head of a form requires 35 secondary time cycles of the reading control current

is, and the last three bits indicate a circle 400 effective, printing the stored

Line feed count from 2 on. This sign will evoke data. However, before the

read control circuits 400 can take effect in the matrix 41 at a character storage position,

stores the newly addressed memory group in the requested format control operations

corresponds to the matrix 31 (set when the counters are 40.

309 when responding to the previously received CR- It is reminded that during the time in-character was advanced). interval T ¹ I, in which the first received data

The sequence of Arbeitsvorgän- described above character in memory is entered, the gate began gen with the activation of the AND Stromkrei- 242 was also effective in the control character ses 214 during the time interval T 1. The occurrence 45 UOOOlO in the memory 14 to enter. During the subsequent "feed" signal from the OR of the following time interval T 8 (assuming circuit 228 and the fade-in signal of that no data characters other than the just-in delay circuit 349 take place during the given character in memory 31 are) at the same time interval T1 in order to control the data and control, the AND circuit 445 generates a signal which character is to be fed into the relevant memory locations. The subsequent T2 timing pulse causes ster42 to transmit. At time interval Γ9, the AND circuit 238 will activate the update flip-flop AND circuit 521, thereby setting the FHp-240, and the AND circuit 341 will have flops 519 and 520 set. The output stimulates to the feed group address counter 309 to signal the AND circuit 521 further opens the one count up to initiate the gate 43, whereby the zone flip-flop 44 set write test circuit. The following T 3 and a count of 2 in parallel in the counter 513 to T7 signals cause a similar increment when inputted or introduced. This causes the counter 309 and during one of the final that the output of the OR circuit 511 posith four intervals T 4 to Tl (assuming that becomes, whereupon the paper feed controller 501 update mode is not required) will 60 the feed of the Document 14 begins,
A signal is generated by the comparison device 244. After the paper 14 has been separated by two lines, whereupon the AND circuit 246 has a signal advanced, the counter 513 reaches you, to reset the flip-flops 240 and 254, position 0, and the output of the OR-Stromkrei len, whereby the update test sequence is terminated. This 511 becomes negative. The first T10 signals, di <After completion of this sequence will of course occur afterwards, activate the AND circuit borrowed the counter 309 left in the state it 516, whereupon the flip-flop 518 set win before the test circuit . and output lead 514 goes positive. This

The next seven data characters, the positive signal at the input, are reset by flip-flop 520 un <

2ο ^{ι 817 805}

35 36

offers reset after the monostable breakdown has taken effect, whereupon the AND circuit 521 konätufe 427 positive signals for the lower two inputted to represent during the next time interval of the AND circuit 425. If the vails T 9 after the presence of the control character As soon as the character pulse occurs, the AND- to search for the circuit 425 assigned to the memory group supplies a signal, which is the print flip-5, which is then addressed by the counter 407.
Flop 419 sets and the flip-flop 518 via the inverter 443 is now reset in the example described. Control characters 101000 in register 42.

At the time interval T 9 after the setting of the flip to the time interval T 9 of the AND circuit flops generated causes 419 of the AND circuit 431, that the - 521 its output signal, the flip-flops 519 and first received data character sets to the register 32 io 520 and the gate 43 opens, whereupon that is transmitted. At the time interval Γ10, the zone flip-flop 44 sets the flip-flop 435 in its reset state AND circuit 433 , whereupon a switch is made, which indicates that the next printing operation in part effective towards the AND circuit 441 the pressure zone 2 will take place. The AND target is activated at the time interval Γ 12. Since the lines 43 a and 43 ft with the new circuit 441, the comparison device 22, and the control character are not positive, the file character v.inl is compared with the character, if the OR circuit 511 is negative, and it ches then rauc iu alignment out of the print no feed is initiated. Arrived at time interval hammer 1. If the two characters Γ10, the AND circuit 516 generates a signal, the comparison device 22, which sets the flip-flop 518 , generates a signal and via the AND circuit 23 ao is that the line 514 becomes positive. Hereby entered, in order to cause that the hammer 1, the AND circuit 425 is made effective, to the associated hammer driver circuit the character impresses the print flip-flop 419 after the delay. If the two characters do not deliver the same, which are from the monostable multivibrator 427 , the AND circuit 437 is generated at the time interval. As described above, the vail T 14 effectively enables the data character to be returned to its »5 position during this delay period that the switches in the matrix 31 have . Zone 2 set the gate 18 b before the start of the

At the time interval T 15 , the AND current pressing is enabled.

circle 403 to the readout Zeichenadressenzählei '401 around After setting the flip-flop 419 is updated, the newly a count, so that the second data character is addressed in addressed memory group sequentially abder storage group. Keyed to the next 30, with the time interval T 9 beginning with the character position 1, causes the AND circuit 431, through the reading control circuits, that the character is entered into the register 32 , 480 as described above, and the last and the time interval Γ 12 compares the compared seven data characters, the character is printed in zone 2 by device 22 with the character with the hammer 15 that is just coming out, in order to complete this data line with the printing hammer 2.

chen. Again generated when the Vergleichseinrich- When printing getung generated in one of the zones above 22 a signal of the AND circuit 23-stored character is completed before the following an actuation pulse which causes in this case, data symbols are received, obtains the AND -that the hammer driver circuit 417 associated with the hammer 2 has a negative input signal, the circuitry prints the character. If the comparison 40 equalizer 244 via the inverter 248, because the device 22 does not supply a signal, the LIND-same (group) address for supplying data circuit 437 at the time interval Γ 14 is effective in order to be in the memory 31 and for reading Data from the data character in its position in the memory to the memory 31 is used. The print flip-flop resets, and at the time interval Γ 15 the 419 cannot be reset, and the print AND circuit 403 continues the address counter 401 , 45 cycles continue, with data expected wherso that the d. The third character in the group addresses the one that is used for printing in the respective print zone and that the hammer assigned to hammer 3 is to be received,
driver circuit is made effective to work in the update state when responding to a signal from the comparison device
22 to work. 50

The eight characters in the group are thus addressed in sequence and with the characters listed that when the update test circuit of the print tape 10 compared, until all characters of the AND circuit 252 responding to Emp Memory group are printed out. As described above for the first data character after a format, this state is determined in such a way that it was initiated before 55 control characters were determined to be present when the counter 415 does not pre-generate a carry signal that the need for "update" is not pre-generated indicates that all eight character positions are available, and the update flip-flop 240 memory group have been checked and no signal bits have been returned to its reset state, provided that the comparison items, namely when the cycle is terminated,
Direction 244 shows that all digits are filled, or 60 if it has been determined that updates are busy. The carry signal of the counter 415 is required, that is, that less than two memories make the AND circuit 417 effective, so that a group is generated in the matrix 31 for the reception of a signal that is available to the read group address output characters. Flop counter 407 advances by one count and resets the 240 in its one 'pressure flip-flop 419 when the test circuit is terminated. This process assumes the state. This means that the AND activates line 420 and initiates the hammer delay circuit 236, which is partially activated win timing device 523 . After extinguishing and that the AND circuits 307, 337, 321, 264 chen this delay time, the flip-flop 519, 268, 291, 274 and 276 will be made ineffective

1 817 305 l

37 38

If the system is in this state If the second update character is in the memory

and assuming that the same sequence of earlier is input, the output of the

15 data characters is presented at the input, OR circuit 228 is the flip-flop 333 and

the operation of the input circuits 200 and thereby triggers the monostable multivibrator 347. The

write control circuit 300 as follows: 5 equal output pulses from OR circuit 228

The 15 data characters are activated in exactly the same way, and the AND circuit 284 is input into the memory 30 by activating the AND circuit 290 again, as described above. If, however, the next format control is, the flip-flop 280 is in its marked state, assuming that it is, for example, set state. The output from the AND-CjR- or LF-characters are present at the input to circuit 290 triggers the monostable multivibrator to build up the next print line, occurs following 293, and the line feed counter 294 is reversed: That from the gate 204 advanced to the time interval count of 1.
The C /? This prevents you from setting the flip-flop 266 or resetting the control character 1100100 in the control matrix 41 to the flip-flop 280. The signal that is entered from the character location, which is evoked by the newly addressed OR circuit 232, represents the memory group corresponding. Immediately thereafter, flip-flops 331 and 254 set, but the flip-effect is set by the delay circuit 351, that the counter-flop 333 does not reset, since the AND-circuit 337> or 294 is reset to 0 and that the flip is ineffective. Flop 280 is reset.

The signal from the OR circuit 232 activates the next seven consecutive connections AND circuit 236 and sets the flip-flop to be signaled regardless of whether they are Da-266 whereupon the character generator are ten characters or format control characters (under the 224 the code of the special update character in »5 Assumption that the system continues in the update Register 212 introduces. After that, the AND state generates to work) into the remaining seven Circuit 216 sends a signal at the time interval Γ1 to input the character positions of the addressed memory group Open gate 210 to enter the update character. Thereafter, the counter 301 generates an over Eighth character position of the addressed storage pulse for setting the next storage group to be transferred (the first seven character group, and after this group of the next Lungs of the group are filled by the last seven characters; eight input characters cause the Uberchen the previously received line of data input flip-flop 280 again includes one taken). automatic line feed bits in the control

The output signal of AND circuit 216 is for the following memory group,
further activates the OR circuit 288 to 35 The read control circuits 400 and the paper "feed" signal for inputting the update feed control 500 operate on exactly the same characters in the matrix 31, the flip-flop 331 way as it does is described above to reset printing, set flip-flop 333, and call up the characters stored in memory 30. However, as a result of the just summarized construction of a line feed control character for the operation shown, the input current case is to trigger that the flip-flop 280 is in its circuits and the feed control circuits are during the set state . Furthermore, the operation of the system in the update state switches the output of the OR circuit 228 after the sixteen characters produced by printing out the data always in full lines with the delay circuit 230 (spaces are the available delay in the character address counter 301 by 45 characters in this context ), counting continues and resets flip-flop 266. With each omitted format control process in the example described, the counter 301 is switched on by this continuation with the special write symbol, the counter from which the counter is indicated.

ment 7 switched to a count of 0, so that the Er- Therefore, if the system is in update-to

appear to be caused by a carry signal. 50 stood working, the only linefeeds

This carry signal switches the group addresses that are executed, those that are necessary

If the counter 309 continues, the flip-flop 333 is reset to allow overwriting or overprinting

and returns the state of the Prevent Print Zone Fup-Flops and because the data is in full lines too

256 um and causes this to be set in its sixteen characters between the line feed

switches back to the state in which the print zone 1 55 has been printed, the middle data extraction

3Jj ₂₆ Jg *, speed noticeably above the mean data

When flip-flop 256 switches, the AND input speed increases out. This causes circuit 262 to generate a signal that overflows the jam of unprinted characters in memory 30. Flip-flop 280 sets when the next input is decreased so that the critical buffer situation character LF is received, triggers the OR current 60 or memory situation is eliminated in a short time.
When this has been carried out, the update gate and another special character is turned in. Flip-flop 240 is again returned to its reset position, this time in the first character position, at the end of the continuation of the newly addressed storage group. In addition, the write test circuit is set, and the system is set to the flip-flop 254 in order to make the update circuits possible to restart their normal operation in order to reactivate.

When the next data character is received, a ΓΛΒ input character occurs, true

to go through another update test cycle. the system according to the above description norma

operates, the following occurs: The TA B output line from circuit 202 goes positive, and gate 204 generates an output pulse at subsequent time interval 71 which sets ΓΛΒ flip-flop 329 via AND circuit 239. This causes the AND circuit 339 to generate a sequence of output pulses which increment the feed character address counter 301 by one count at a time until it comes to a count which represents the tabulator position which is pre-wired in the plug 357. When the tab count is reached, AND circuit 353 produces an output which resets flip-flop 329 and terminates the TAB address operation. Through this process, a series of spaces is entered into memory 30, starting from the point after the last

Entered data characters extend to the position shortly before the corresponding tabulation position. While the system is operating normally, this results in the usual type of tab format. However, if the system is operating in the update state, the TA B operation is ignored and the AND circuit 239 prevents entry into the ΓΛΑ flip pile. 329. A special symbol is entered in the memory 31 for each 7V1 character thus ignored.

After this, the AND circuit 237 generates the output of the inverter 234 made effective is, a signal through the OR circuit 241 to set the flip-flop 226 and the entry of the to trigger special symbols from the generator 224 into the memory matrix 31.

In addition 8 sheets of drawings

909 687/10:

Claims (4)

tion (18, 44) causes the Drucksteuerereinrich- Patent claims: device (20, 22, 100) to be connected to a different than the previously connected thickening zone. 1. Printing device for printing data characters which the printing device has in between 5 distributed format control signals for controlling the predetermined arrangement of the data characters
when printing, with the
Printing device one in several groups divided data memory for storing over- io _The invention relates to a printing device for carrying data characters before printing, _{printing of} data characters, which the printing device is characterized in that a format control signals distributed between them to the control memory (40) with a number of characters control the predetermined arrangement of the small data storage locations, which _{are transmitted at least equal to the characters bdm Ducking} , the number of groups in the data memory (30) being 15 printing device one being provided in several groups and one character _{storage device θ3ΐβη5ρ £} ΐ _ΛεΓ for each Storage of transferred position of a group of the data memory (30) to _{data characters before} printing
is arranged that an input control device _{A practical} method for remote transmission of (200 300), a top of each received group consisting italdaten _Dig is to transmit the data characters in series of format control signals corresponding control "o _practice r eü.en single transmission channel, sign in the next character location of the _Da b _e must i necessarily control characters be- control memory (40) writes and _data characters are distributed this _rule so that the group of format control signals directly printing apparatus at the receiving station, the above following data symbols in which the Zeichenspei- tragcnen data in the vorgecherstelle at the transmitter site associated group of Datenspei- "5 _sc hriebenen format can print out. Usual control cher (30) _{writes that a format control commands are like {olgt:} carriage return (beginning of a (42, 43, 500) after printing the contents of a _new print line), single line feed (feed of one group of the data memory that of the next receiving _{the message} document to the group associated character memory location of the next line position), multi-line (feed pre-control memory reads and whose content corresponds 30 _{thrust of the} pressure document by a specified responders format control operations triggers, and _zah \ _e i _nzemer lines) form sheet feed (feed that a pressure control device (20, 22, 100) of a sheet or a tape or a web with forms connected to one another after completion of the format control processes to the head of the printing element (16) according to the content of the next form and tabulation (jump to this next group of the data memory to 35 _the next preset tab position on controls to the Data characters stored therein _emer z _e ji _{e> where a} n _{e are to be} printed out between lines. Positions are left empty). These command signals 2. Printing device according to claim 1, there are individually and in several different Kom characterized in that the format control binaries together with the data characters (42, 43, 500) carry a paper feed device 40 so that the receiving printing device holds the can fen corresponding to the transferred from the Steuerspei- _d i _e message control character read completely wiederherstelcher (40) the paper. transported on to a new print line. Since teleprinters and similar printing devices 3. Printing device according to claim 1 or 2, _gene these different control functions also not characterized in that the Formatsteue- 45 can run almost as fast as they Darung (42, 43, 500) a print zone control (18, ten characters can receive and print, the 44) contains the print control device (20, requirement for data storage unavoidable. 22, 100) with a corresponding to that from the that means that if the printing device executes a loading control memory (40) incorrectly read control characters, for example carriage return or a specific zone of the printing elements (16) which are divided into several zones and which cannot print at the same time. Therefore, any data characters that select 4. Printing device according to claim 1 or the exercise or execution of a radio element of the following, characterized, tion command are received, temporarily in one that the storage capacity of each group of the data buffer are held until they are printed (30) is smaller than the number in 55 den can. message characters to be printed out on a line, such buffers for printing devices that a counter (301) which is in a group of Da- are known. In the German explanatory document message character 1 199 034 written in memory, a printer is described which has a counts and when the group is full, an overflow signal memory for receiving the data characters is generated for a print line that contains ^{6 ° complete during the overflow signal.} This store is Received message character first selection - but not divided into groups, and its content devices (309, 315, 317) that this data is only complete after the end of the storage characters in the next group of the data memory are printed out in parallel in one print line. With the stores, and second selection devices are also transmitted control characters (256, 260) that apply to the next 65 for the entire content of the memory. Through this Group corresponding character memory location of the, a large memory is required, and the possibility Control memory (40) store a control character for format control only from the Make sure that when reading out “the pressure zone control station is limited. Especially for a continuous