DE2115141C3 - Device for printing data received one after the other - Google Patents

Description

The invention relates to a printing device for partial printing of / calibrations with additional Control characters for the line feed ah coierte signals received continuously and in a us storage facility ordering at least two parts saved where «Jen. where / to do printing ^ Remove the calibration record from the storage device and supplied to the pressure elements under the control of pressure control signals from a pressure control will.

Numerous printing devices have been developed for line printing of information in Form of coded electrical signals sent to the printing device by a data processing system are fed in series. Such printing devices, commonly referred to as teleprinters are used to a large extent to

ίο information to print out via message lines have been transferred. Their printing mechanism is usually on a carriage or Carriage attached which, when the data is received, crosses the document from left to right is moved which is to be printed on. However, the car has to start a new one Line to the left ·; return the document. Since during this process no printing must take place during this time

xo received input data will be saved in some way or they will be lost. Storage registers or buffer registers are usually provided for this purpose.

Other teleprinters do not use a provable car, they just see it for themselves each column in the printed line has a stationary one Printing mechanism. With these printing devices, therefore, the one required for the carriage return is used Zci <is not needed and it further avoids the problem caused by carriage return. However, when a new line is started, the document on which it is being printed must be moved in such a way that an L.eerriHim is presented to the printing mechanisms. This as a line feed The designated process, like the carriage return, requires a certain amount of time. Accordingly, the Characters fed to the printing device during this period will also be stored because otherwise they too get lost.

From the German patent specification 1 199 03? is a Known device which corresponds to the printing device specified at the beginning and is also referred to in Information supplied in a series is temporarily stored in a buffer memory and printed out one after the other will. The buffer storage is used here to to temporarily store at least the information arriving at the next time during the adjustment · "!). However, the speed of the incoming information must be slower than that

5 "maximum print speed between two line stamps, since during this no information was printed out.

The object of the invention is to provide a printing device indicate the maximum printing speed continuously emirefferdc characters when using of a buffer memory «with minimal memory capacity, without during of the paper presetting / calibration will be lost. The invention solves this task c'fby that during the by a received control character for a Linefeed aiisg ^ Uisieii Rinslell the Drucksorrichtmii! to the next line to be printed the pressure control prevents the generation of a signal, that the actuation de: 'releases pressure elements

^{R. r} i gives, '! ate the first part tie: storage device one after the line feed u! beginning group of / calibration signals stores that after the end of the setting process it ^,:. to the first part of the

Storage device connected printing elements the characters stored in this part under control through the print control signals in the first • print positions of the new line print in parallel that the second part of the storage device following the beginning group of drawing elements stores incoming character signals and that further, at this second part of the memory device connected further printing elements the characters stored therein one after the other in the order their arrival in the following print locations, with the number of in the second part of the memory device contained number of storage elements less than the number of after the first print points following print points is that each of the further print elements the content of the allocated memory element after each printing and that the deleted memory elements store the character signals that then arrive. This braucat the first part of the Storage device only to be so large that it receives the maximum that arrives during the paper advance Can store characters. These characters are then printed out in parallel at the beginning of a new line, while the remaining columns are printed out serially, at least in groups, so that the to (printing characters can enter continuously at maximum printing speed.

One or more memory circuits are provided for "the remaining columns, each of which sequentially stores the characters printed in several of the remaining columns should.

Preferably, only a number of characters is stored in the memory circuit for the remaining columns which is essentially equal to the ratio ^; s is the time that the type carrier needs to present a complete set of \ on characters to the time interval between successive input characters. This minimizes the memory circuit required to print in the remaining columns.

From the German Auslegcschrift 1 178 622 a printing device is known in which also the Memory storing the print information has a smaller number of storage locations than that Corresponds to the number of pressure points. The data must be transferred in batches so that no continuous transmission is possible and the message channel used for the transmission must be designed for a high transmission speed and only imperfectly used will. This applies even more to the well-known high-speed printers that operate in parallel work and therefore need a memory that holds the information door an entire line holds, and thus require a much greater effort.

An embodiment of the invention is explained in more detail with reference to the drawing.

Fig. 1 is a schematic diagram of a Printing device;

Figure 2a and 2b together form a schematic metallic logic diagram of a portion of the pressure control circuit, the \ u 1 is shown as a block..;

Figure 3 is a schematic logic diagram of that Part of the pressure control circuit, the characters in the in F i g. 2 enters the register shown; l · i g. 4 is a schematic logic diagram of a typical Hammcia electoral circuit shown in FIG. 2 shown as a block;

F i g. 5 is a schematic logic diagram of that Part of the pressure control circuit, dei the Paper feed controls;

F i g. 6 is a waveform diagram showing the operation of those shown in FIGS. 2, 3 and 5 Parts of the pressure control circuit explained

ίο is:

F i g. 7 is a diagram showing the operation of the FIG. 4 Hammerauswahistromkreiscs shown is explained.

Fig. 1 shows schematically a printing device with a conventional printing drum 1, which bears type symbols on its periphery. The type characters are arranged in rows parallel to the drum axis and in eighty columns corresponding to the columns that are to be printed on a document 2 in one line. Each column of the drum 1 contains a complete set of type characters and a space in which no character appears. The drum 1 is rotated at a constant speed by means of a drive device (not shown). The document 2 is advanced step-by-step from the drawing plane by a paper feed device 3 shown schematically. The paper feed device 3 moves the document 2 after each line is printed so that the following line can be printed. Any conventional paper feeding device can be used, for example one comprising two pulling members with movable endless chains which support sprocket pins which engage with edge perforations in the document 2. A row of eight hammers 4 is arranged near the drum 1, and the paper 2 passes between them and the drum 1. A hammer is provided for each;. · Column of type symbols on the drum 1. The hammers can be of any type used in on-the-fly impact printing. When a hammer is operated, it presses an unillustrated ribbon and the document 2 against there ;; Type symbols on the drum 1. which are printed ^t ol !. In order to determine which row on the drum 1 is approaching the hammers at any given time, a circular code disk 5 of conventional design is attached to a shaft which extends from the drum 1 and rotates with it. The code disk 5 is arranged between a light source 6 and a light-sensitive device 7. As is customary, the code disk contains 5 rad'.ale rows of coded openings. The rows correspond to different rows of characters on the drum 1 and each contains a sufficient number of openings to present a character in accordance with a binary code. An additional radial row is provided in the code disk S. The openings in this row do not represent a symbol on the drum 1, but instead the space in which no symbol appears. Lieh comes from the light source 6 through the coded openings and onto a part la of the light-sensitive device 7. When responding, this creates part of the light-sensitive device 7 clearly! Binary coded signals, which indicate the particular rcihci of the type characters or the series of leenäumci

represent on the drum 1. This signal is over a cable 8 out, which contains enough conductors to transmit binary coded signals.

As is also customary, a code disk 5 contains a series of radially spaced openings, each of which is located on one of the coded rows of openings in the disk. Light which passes through these openings and reaches a second part 7 ft of the photosensitive execution device 7 causes the latter to create a series of Taklim pulses S. Each clock pulse S indicates when a row of the drum 1 passes the row of hammers 4.

The signals indicating the rows and the Taklimpulse S from the light-sensitive device 7 are fed to a pressure control circuit 9. The circuit 9 receives the input data to be printed and provides output signals for controlling the hammer 4 and the paper feed device 3. Before proceeding with the description of logic diagrams according to the figures, the meaning of the logic circuit symbols widely used will be explained. Of course, the logic circuit elements according to FIGS. 2a, 2b, 3, 4 and 5 work in the usual manner on the basis of binary voltage levels, the inputs of the elements and their outputs always being at one of two discrete voltages, namely the positive voltage value or the negative voltage value of the system.

An AND circuit is represented by a D-shaped block containing the syinool "&". the Input lines are always with the straight side of the block and the output line is always with connected to the curved side of the block. The function of this circuit is to provide a Positive output & voltage can only be created if the positive voltage value is applied to all input lines is available.

An OR circuit is created by an arrow-shaped Block shown. Input lines are always with the concave side of the block and the output line is always connected to the top. The function of this circuit is to provide a to create positive output voltage only if any or more of the input lines are at the positive voltage value.

A delay circuit is represented by an elongated oval block near its input end shows two stripes or horizontal stripes. The function of this circuit is to provide a To create an exit mirror that follows the entrance pan, but that changes its state after a certain amount of time specified time period after the input changes state.

A flip-flop circuit is represented by a block labeled FF. This circuit is some kind of bistable circuit in which a positive voltage signal at the 5 input or auxiliary input causes the 1 output to go positive and stay positive, while the 0 output goes negative and remains negative at the same time. A positive voltage signal at the R input or reset input causes the O output to go positive and stay positive, while the 1 output goes negative and remains negative at the same time. Once set, a flip-flop changes its output state only when it responds to a positive signal at the input. If the flip-flop is in the reset state, it only responds to a positive signal at the ^ -input or setting input.

A comparison device is a known current circuit element which has a creates positive voltage signal when the coded signals applied to its inputs are identical Represent data.

ίο A block divided into sections 1, 2, 4, and so on is, it represents a binary counter. Each stage of the counter has two outputs, only one of which is closed is excited at a point in time, and the outputs of each stage represent a bit of a binary number.

tive voltage signal at one input causes that shown on the output lines Binary number advances by a count of one. In contrast, a positive signal causes on the other input that the output

ao lines represented binary number by a count of One is reduced. A positive signal at an R input causes the output state of the Counter returns to 0, which means that positive signals are present on all 0 output lines are.

According to FIG. 2a, the input data to be printed are fed to the print control circuit in character and bit rows or series. Such an input can be provided by a remote transmission line. This input data is initially supplied to a register 10 which converts the serially arranged bits of each character into parallel bits. Each character, which is in parallel bit form, is then fed via a cable 11 to eight single-character memory registers 12a to Hd and 14o to 14d and a function * decoder 16.

Generally, a function decoder is some type of circuit design that, when effective is made, creates positive signals at one or more outputs if the coded supplied to it Signals represent functions to be performed by the printing device in place of characters to be printed, e.g. signals instructing the device to print a new line begins. According to the illustration, the function decoder 16 has two such function-indicating output lines on for a positive carriage return signal to initiate a new print line and füi a positive line feed signal for stepwise feeding of the paper according to a line spacing. If the signals fed to the function decoder 16 do not indicate a function, special instead of a character to be printed, the function decoder 16 creates a signal F on another its outputs.

It should be noted that the illustrated remote printing device is not of the type that a print mechanism carriage has, which is by the printer moved one line across the document. A separate stationary hammer is arranged for each column. Accordingly, the carriage return signal is only an instruction to start a new print line, and e; does not require the return of an actual printing mechanism cart to the first column forward.

The function decoder 16 is through the 1-off transition of a flip-flop 18 made effective. The flip

Flop 18 receives its single input from the output of a bit counter 20. The bit counter 20 receives at its input those to be printed Data represented as bits arranged in series. This is chosen to give a positive signal create when enough bits are sensed or detected in the data input to indicate that a character has been fed to the printing device, d. that is, a positive-level signal (hereinafter called positive signal for simplicity) for every 6 bits is created when the dpr printing device supplied data is encoded according to a code using 6-bit characters. on in this way the bit counter 20 provides an output for each character to cause the 1 output of the flip-Elop 18 goes positive and the function decoder 16 makes effective. The output signal of the bit / counter 20 is still via a delay device 22 to the reset input of the bit counter, so that the bit counter 20 itself resets after detecting a sign. The output of the delay device 22 is still fed to the return input of the flip-flop 18 to thereby generate the positive signal at the ! Output of flip-flop 18 and reset flip-flop 18.

As mentioned above, each character represented by parallel bits is fed to registers 12a to 12rf and 14 «here 14rf. Each of these registers can store encoded data representing a character. The characters are successively represented by I'NO gates Mu Iv Πι! u.id 19α to 19rf are entered into the registers.

Each of these AND gates 17, 19 has three activation inputs which are connected to the in FIG. 3 are connected to the circuit shown. Each of the AND gates 17 "to 17rf receives two of its inputs of a binary counter 21 and its third input signal from the 0-output of a flip-flop 25. Each of the l'ND gates 19 a to 19 d receives two of its inputs from the binary counter 23 according to FIG. 3 and its third input signal from the 1 output of the flip-flop 25.

When a printing operation is initiated, both counters 21 and 23 are reset to their 0 state with positive signals ~ Ä, F, C and ~ B on their 0 output lines. The flip-flop 25 is in its reset state, with its output line being positive and creating the T. signal. The output lines of the counter 21 are connected to the AND gate 17α in such a way that the gate is conditioned by the signals Ä and B. Since the AND gate 17α receives its other input signal from the O output of the flip-flop 25, which initially creates the signal E, the AND gate 17α is originally activated and enters the first character to be printed into the register 12a.

In response to this first character, the function decoder 16 (FIG. 2) creates a signal F. After a period of time created by a delay device 27 which is sufficient for the first character to be entered into the register 12a, this signal F is applied, to forward the counter 21. The counter 21 then provides output signals c A and Ή. The AND gate 17 fr is connected to the counter 21 in such a way that it is activated by these signals together with a signal E from the O output of the flip-flop 25. Since the flip-flop 25 continues to create the signal E, the AND gate 17 & is activated to enter the second character in the register 12 b .

Similarly, the following signal F, which is created when responding to the second character, switches the counter 21 by one step so that it now creates outputs ~ Ä and B to make the AND gate 17c effective and that enter third characters in register 12c. The ίο register 12 d is loaded in a similar way when the counter ^ signals A and D creates.

However, as shown in FIG. 3, the outputs of the counter 21, which create the signals A and B, continue to be supplied in order to make an AND gate 27 effective. After a period of time determined by the delay device 29, which is sufficient for the fourth character to be entered into the register \ 2d , the output signal of the AND gate 27 is applied to the setting input of the flip-flop 25, the signal E at its 0 output to quit and ei ⁿ signal e from the! output of flip-flop initiate 25th Since the AND gates 17 "to Md are not conditioned by the signal £ in such a way that the registers 17" to 17 d are entered, subsequent characters in the line cannot be entered into these registers.

However, the AND gates 19a to 19rf have the signal E from the flip-flop 25 as one of their conditioning signals. The output lines of the counter 23 are sounded to the AND gate 19α in such a way that the gate is conditioned by the signals ~ B and C which occur when the counter 23 is in its 0 state. Since the counter 23 initially shows 0, the AND gate 19 α is made effective when the flip-flop 25 changes its state in order to create its E signal. In this way, the fifth character is entered in the register 14 a. Like the counter 21, the counter 23 is incremented by successive signals F. These signals are supplied via an AND gate 31, which is conditioned by the signal E from the 1 output of the flip-flop 25. The delay device 29 is still selected so that

that the pulse F, which appears when responding to the fourth character, has ended before the AND gate 31 is conditioned by the signal E. An undesired advance of the counter 23 would otherwise result.

The signal F, which appears in response to the fifth character, goes through a delay device 33 to advance the counter 23 so that it now creates outputs C and Z5. The output lines of the counter are connected to the AND gate 19 ft, so that the gate is activated, to enter the sixth character in register 14 b.

Similarly, the seventh and eighth characters are entered in registers 14 c and 14 rf, respectively.

give.

When the eighth character is entered, the counter 23 provides signals D and C which are supplied back to its reset input via an AND gate 35, a delay device 37 and an OR gate 39. The delay device 37 is provided to enable the AND gate 19 "to be energized and to load the register 14 rf before the signals D and C are terminated. The delay

37 is further selected so that the pulse F. which occurs when responding to the eighth character, is completed before the counter 23 is reset to zero.

Since the flip-flop 25 continues to create a signal E and not a signal Έ , the AND gates 19 and not the AND gates 17 remain conditioned. When returning to its 0 position, the counter 23 enters the next, the ninth character in the register 19 ", as it did with the fifth character. The tenth, eleventh and twelfth characters are entered in registers 19 /), 19c and \ 9d , respectively. Similarly, the thirteenth, fourteenth, fifteenth, and sixteenth and subsequent characters are sequentially entered into the registers 14a to \ 4d .

In this way, the fifth, ninth ... through the 77th characters on the line are sequentially entered into register 19a. The sixth, tenth ... and 78ste characters are entered consecutively b in the register 19th The seventh, eleventh. . . and 79th characters are entered in the register 14c. The eighth, twelfth. . . and 80th characters are entered consecutively d in the register 14th Every fourth characters (starting at the fifth character) is input d in the same register 14a to the fourteenth

As in Fig. 3, the signal CR is applied from the function decoder 16 (FIG. 2a) to the R inputs of the flip-flop 25 and to the counters 21 and 23 at the beginning of a new line. This sets these elements to cause the characters for the new line to be entered in Rpri.Uer 12a to 12d and 14a to 14i / as previously described.

Referring to Figs. 2a and 2b, each register 12 and 14 is assigned and will be coded data supplied, which indicate the character stored in it, via a cable to a comparison device 28a to 28Λ (Fig. 2b). Any of these comparison facilities 28 receives the encoded signals from the light sensing device 7 via a cable 8 (Fig. 1). The comparison device thus receives signals which the particular series of Indicate type characters (or the series of spaces) on the rotating drum, which are the hammers approaching. If the encoded signals from a register 12 or 14 or from the light sensing device 7 represent an identical type symbol, if the drum is in such a position, that the special type symbol on the drum, which corresponds to the symbol in the register, is struck by a hammer when the hammer is excited at that time. Each comparison device then creates a positive at its output Signal. The delay period that occurs between the time the light sensing device 7 (Fig. 1) senses light indicating a character to be printed and the time occurs which hammer actually strikes the sign is compensated for by the fact that the Disc 5 precedes or precedes the characters on the drum by an appropriate distance.

If the input signals to a comparison device are identical and a match occurs, the comparison device supplies its output signal to one of eight AND gates 30a to 30h. Each of these AND gates 30 is associated with one of the registers 12 or 14, as is the comparison means 28. When one of these AND gates 30 is activated, it provides an ignition pulse to a hammer driver circuit 32 or 34 to activate a hammer.

Since the voltage levels used in conventional logic systems are relatively low and typically + 4VoIt and -2VoIt, the output signals of the AND gates 30 (the ignition pulses) cannot be used directly to drive the hammers. Accordingly, driver circuitry is required to provide an output signal of sufficient magnitude to drive the hammers in response to the output signals from the AND gates 30. The driver circuits shown in FIG. 2, shown as blocks 32 and 34, create a rectangular pulse of fixed duration going from negative to positive to negative when excited by an ignition pulse. The driver circuits marked with 32 a to 32 d bcüo are assigned to registers 12 a to 12 rf and therefore columns 1 to 4. The signal circuits labeled 34a to 34a ″ are assigned to registers 14a to 14a ¹ and therefore columns 5 to 80 in the sequence in which registers 14 store the characters to be printed in these columns Hammers are divided among the four driver circuits 34 via four hammer selection circuits 40a to 4Qd, which are described below. Each of the AND gates 30 receives the clock pulses from the light-sensitive device 7 (FIG. 1) as well as the output signal from a comparison device 28 as conditioning inputs .

A clock pulse 5 is fed to each AND gate 30 so that it has its ignition pulse or its ignition signal creates only when the rotary drum 1 is in such a position that a row of type marks is located adjacent to the hammers when the hammers strike the drum I.

Each of the AND gates 30a to 30a ", which provides ignition pulses for the first four columns, has a signal FC as an additional activation signal. The signal FC indicates that the paper advance which occurs just before the printing device is printing a new line Obviously, it is not desirable to fire the hammers in the columns at the beginning of a line (columns 1 through 4 in the illustrated embodiment) until the paper has advanced to present a new line to be printed Signal FC is not applied to AND gates 30c to 30/1 because it is assumed that the paper has already been advanced before printing in column 5 begins.

The function decoder 16 provides a signal LF when it is desired to advance the paper. Each signal LF is one input of a binary counter 42 according to FIG. 5 to advance it by a count of 1. The number of signals LF is counted by the counter 42, and this information is fed to the paper feed, which there; Paper advances the specified number of times. With each progressive step, the paper feed creates a signal LC which indicates that the paper has been advanced corresponding to a line spacing. The signal LC is applied to the changed input of the counter 42 in order to count it

2 I 15 141

to decrease by 1. In this way, the paper will advance 3 instructed via the counter 42 to advance by a required number of line spacings to be carried out, and when the counter 42 is reset to 0 again (positive signals on all O output lines), has the paper feed device 3 The document has been updated by the requested amount. This state is sensed by an AND gate 44, whose input lines are connected to the three 0 output lines of the counter are connected. If positive signals appear on all O output lines, the AND gate sounds 44 an activation signal FC for the AND gates 30a to 3Or /, which are assigned to columns 1 to 4.

Referring to Fig. 2b, it will be noted that each of the driver circuits 32 and 34 have one Has input that is connected to an empty decoder 41. The empty decoder 41 receives at his Input the coded signals over the cable 8 from the light sensing device 7, which the positions Show you different rows of characters and the number of spaces on the drum. When these coded signals indicate that the void row on drum 1 is approaching hammers 4, the dummy decoder 41 creates a positive output signal. This signal is fed to all Driver circuits 32 and 34 are blocked, and this blocking function is shown in Fig. 2b by a small Circle shown where the output line of the dummy decoder 41 connects to each input of the Driver circuits connects. Thus, if the coded signals in a register 12 or 14 have a blank space within the line to be printed and the signals on the cable 8 as well To represent white space, the driver circuits are disabled and printing does not occur even if a match occurs in one of the comparison devices 28 and an ignition pulse occurs one of the AND gates 30 is supplied.

2a and 2b further indicate that the ignition pulse from each AND gate 30 to the associated Register 12 or 14 is returned. The ignition pulse clears the ones stored in the register Data when the AND gate has delivered an ignition pulse to print the character. With a space even though printing does not occur, the AND gate still delivers an ignition pulse to the register from this space indicating characters. By deleting the register in this way prevents characters from being printed twice.

In Fi g. 4 is the circuit 40a shown in FIG. 2b is shown as a block and which serves to successively switch the driver circuit 34a to the hammer mechanisms in columns 5, 9 ... 77, shown schematically. Similar circuits, which are shown in Fig. 2 as blocks 40b, 30c and 40rf, are for successive switching of the driver circuits 34 δ. 34 c and 34 rf to those hammer mechanisms provided in columns 6, 10 ... 78; 7, 11 ... 79; or 8, 12 ... 80 print. Each driver circuit 34 is sequentially connected to every fourth hammer in columns 5-80.

The hammer selection circuits do not form part of the invention.

The hammer selection stream circuit 40 'has a network 46 which has two sets of conductors 48 and SO arranged to intersect and form a matrix. The activation coils 52 in the hammers that press in columns 5, 9 ... 77, are each connected between a different pair of conductors, the conductors of each such Pair of different sets are. Of course, the hammer coils 52 are physical parts of the Hammer 4, and they are actually placed along the length of the drum I as shown in FIG. 1 is indicated. However, for the ease of the

ία representation, the coils 52 shown as if they physically within the matrix 46 according to FIG. 3 would be arranged. Each coil 52 is with a conductor connected to a decoupling diode 54 in the matrix. The diodes 54 perform a common function, namely to prevent current flow in an undesired direction within the matrix network 46.

As shown, there are four conductors in the set labeled 50 and five conductors in that labeled 48 Sentence available. There are 19 coils 52 in front of

zo that are connected to the matrix 46. There Similar to Hammcra selector circuits 40c through 40rf, they also have 19 coils each. Accordingly each of the driver circuits 34 sequentially energizes 19 coils.

Two groups of relays 56 and 58 are provided. The contacts 56 a of the relays in group 56 can be connected to a conductor in set 50. The contacts 58 a of the relays in group 58 can be connected to a conductor in set 48. The relays can of course be of any suitable conventional design. They preferably have known tongue contacts. The relay contacts in the group 56 are brought together or combined to form a conductor 60 via which the driver circuit 34a supplies its output pulse when it is actuated. When one of the relay contacts in group 56 is closed, the output pulse from driver circuit 34λ on conductor 60 is applied to one of the conductors in the set labeled 50. The relay contacts in group 58 are brought together or grouped together to form a negative voltage potential V such that this potential is applied to one of the conductors in set 48 when one of the relay contacts in that group is closed. When a relay contact from each of groups 56 and 58 is closed, a conductive path for any pulse from driver circuit 34a is on conductor 60, along one of the conductors in set 50, via a special decoupling diode 54, via a special coil 52, created along one of the conductors in set 48 and to the negative reference potential - V. Therefore, by energizing a selected pair of relays (one relay in each group), a conductive path is created from the driver circuit 34a via a special hammer coil 52 to the negative reference potential. In this way, a selected hammer is operated by selectively closing a pair of Rclaiskontacters.

The relays and therefore the hammer coils 52 who sequentially energized by a five-stage binary counter 62 and two groups of AND gates 64 and 66. There are four AND gates in the group labeled mi 64. The exit; each AND torc in this group is connected to one of the relays in group 56 such that a relay coil 56 b energizes by ^{actuating the gate 1}

vird to sleep their associated contact 56 α. The AND gates in group 64 each have two inputs. Each of the inputs is connected to one of the outputs from the lower order stages, 1 and 2, 3 of the binary counter. The connections between these AND gates and counter 62 are such that each gate is actuated by a particular combination of the two lower order bits in the binary coded number presented by the outputs of the counters. In this manner, AND gates 64 are operated by the two low order stages of counter 62 in a manner similar to the manner in which AND gates 17a to 17d and 19a to 19d (Fig. 2a) are operated the counters 21 and 23 are activated (FIG. 3). Different AND gates in group 64 are actuated for different combinations of the two lower order bits. Progress through the levels or states 1 and 2 of the counter leads to successive actuation of the AND gates in group 64. Since each of the AND gates in this group energizes a relay in group 56, successive switching of the counter leads to successive energization of the Relay in group 56.

The other group of AND gates 66 consists of five gates. The output of each AND gate in this group is connected to a relay, whereupon b excited by asserting an AND gate 66, a relay coil 58 and its associated contact is closed 58a to the voltage source uiii a conductor 48 - to switch V. The AND gates in this group 66 have three inputs which are connected to the outputs from the higher order stages (4, 8 and 16) of the counter 62. Similar to the connections between the AND gates in group 64 and the counter, the connections between the AND gates in group 66 and the counter are such that each gate is represented by a particular combination of the three higher order bits in the binary coded number is operated, which is represented by the output of the counter. Different combinations of the three higher order bits operate different AND gates. Switching the counter forward leads to successive actuation of the AND gates in group 66. Successive actuation of these AND gates leads to successive actuation of the relays in group 58.

Each setting of the counter leads to an actuation of an AND gate in each of the groups 64 and 66. Upward switching of the counter by successive pulses at its one input leads to successive actuation of selected pairs of gates, the gates of each pair in different Groups are. Each of these pairs of AND gates energizes a relay in each of groups 56 and 58 to establish a current path from the driver circuit 34a via a selected Hammei coil 52 to the To create reference potential.

Each of the AND gates in group 64 and 66 is 6 = a small driver circuit 68 is assigned which is connected to the output of the gate. These work in the usual way to bring the low output level of the AND gates to a sufficiently high voltage to switch to operate the relays. "

As shown in FIGS. 2h and 4, the pulses for switching the counter 62 upwards are applied via a delay device 70 'from the AND gate 30e, which creates the ignition pulse for the driver circuit 34a and the hammer selection circuit 40a. Thus, after each ignition pulse energizes the driver circuit 34 a to excite one of the 19 hammer coils 52 in the hammer selection circuit 40 a, this ignition pulse advances the counter 62 by one step, so that a new hammer coil 52 is selected in the circuit 40 a. This new hammer coil is excited by the next output pulse of the hammer driver circuit 34 a. Similarly, the ignition pulses are applied from the AND gates 30/30 b via delay devices 70 h to 7Od to the counter in the hammer selection circuits 40 b to 4OD to turn forward.

The counter 62 according to FIG. 4 is reset by the output of an OR gate 72 which is excited by the output of one of two AND gates 74,75. The AND gate 74 has five inputs. These are connected to those output lines of the counter 62 which are excited when the counter represents the binary number 10010. When the counter represents this number, the 19th hammer, ie the hammer located in column 77, is actuated. These output lines of the counter 62 energize the AND gate 74 which creates a signal LP and after a period of time determined by a delay device 76 energizes the OR gate 72 in order to reset the counter 62. In this manner, AND gate 74 and delays 76 ensure that the counter is reset after all of the hammers in its hammer select circuit have been energized.

The AND gate 75 has three inputs and is activated by receiving signals A, B and E simultaneously from the counter 21 and the flip-flop 25 shown in FIG. These signals appear when the fourth character of a line is entered in register 17d (Fig. 2). Since hammer selection circuit 40a of FIG. 4 is used to print column 5, signals A, B and E reset counter 62 so that the hammer coil for column 5 is connected to driver circuit 34a for a sufficiently long time to print in the fifth column. In a similar manner, the signals A, B and E are applied to the counters (not shown) in the hammer & etcahhtromkunden 40b to 40d in order to reset them in sufficient time to print in the sixth, seventh and eighth columns.

Way of working

An example of the operation of the printing apparatus is described below. It is assumed that the type drum 1 rotates at 2000 revolutions per minute. Since each column of the drum 1 contains a type set, 30 milliseconds are required. to move a complete set of types past the hammers 4. It is further assumed that a full input character is received from the printing device every 7.5 milliseconds. It is further assumed that, in the case of the remote transmission system used, the commands issued with respect to a new line, ie fed to the printing device, come from signals CR. CR. CR. LF exist, ie three carriage return commands and one line feed command

The in F i g. The light sensing device 7 shown in Figure 1 continuously provides both periodic clock pulses S and signals identifying the series of type characters or the series of spaces as they approach the hammers. The series of clock pulses is applied to AND gates 30 as shown in FIG.

According to FIGS. 2a, 2b and 6, the first character of the line to be printed enters register 10 (Fig. 2a), in serial bit form. The register 10 converts the bits representing the character from series form to parallel form and supplies this data to registers 12 and 14 and the Function decoder 16. The input data are sent to the bit counter 20 and the conversion register 10 fed. When enough bits are sensed to indicate that a character is on the printer has been supplied (for example, six bits in the case of a six-bit code V, the bit counter sets the flip-flop 18, which makes the function decoder 16 effective. The output of the bit counter becomes still used to reset it and reset the flip-flop 18 after a delay, which is caused by the delay element 22. The function decoder 16 supplies a signal F assuming a character is to be printed in column 1 of the line.

According to FIGS. 2a, 3 and 6, at the beginning of a new line, the counters 21 and 23 are initially in their 0 position and the flip-flop 25 is in its reset state. Accordingly, the signals H, B, C, Z5 and Έ appear initially. The AND gate 17 α is activated by the signals, Ή and E to enter the first character of the line in the register 12a.

Of course, the AND gate 30 receives α according to FIG. 2 b its conditioning signal FC. since the counter 42 (Fig. 5), which indicates that line feed instructions LF are not yet to be executed, is zero.

In this way, when the character to be printed in column 1 is stored in register 12a and the AND gate 30 receives its conditioning signal, the character is printed when a match is found in the comparison device 28a and the clock pulse S is applied to the AND Gate 30 is created. The correspondence in the comparison device occurs when the light sensing device 7 provides an encoded output signal identical to the encoded signals which represent the character stored in the register 12a. When this appears, the character for column 1 is printed in that the AND gate 30a supplies an ignition pulse in order to excite the driver circuit 32a corresponding to column 1. This ignition pulse is then applied to the reset input of register 12a.

According to FIGS. 2a and 3, the signal F, which is supplied by the function decoder 16, is applied via the delay device 27 to one input of the counter 21 after the AND gate 17α has been rendered ineffective to place the first character in the register 12a to enter. As a result, the counter is switched forward, so that it now creates signals A and 77 to make the AND gate 17 b effective and to enter the second character in the register 12 b. The comparison device 28b, the AND gate 30b and the driver circuit 326 of FIG. 2b then print the second character in the same way as has been described above in connection with the first character.

The following are the characters to be pressed in the rest of the starting columns (columns 3 and 4) fed to the printing device and at the same time

xo chen manner as the printed characters in columns 1 and 2. FIG.

Since the drum 1 passes a complete set of types past each column only every 30 milliseconds and characters of the printing device every 7.5 milliseconds

announce are supplied, the characters cannot be printed at the time they are be received. A delay period may occur until the character on the drum, which should be printed, reached the hammers. The time-

Chen are stored in the registers 12a to 12d, into the corresponding comparator 28 a to 28 d a match is indicated.

With reference to columns 5 to 8 it should be noted that

that the hammer selection circuits 40 a to 40d are initially set so that when the driver circuits 34 a to 34 d are energized, they activate the hammers 5, 6, 7 and 8, respectively. When the fourth character is entered in register 12 ti creates

the counter 21 (FIG. 3) signals A and B, which activate the AND gate 27 and set the flip-flop 25 so that it supplies a signal E. The output signal of the AND gate 27 is passed through the delay device 29, so that the flip-flop 25 can continue to deliver its signal Έ until the fourth character is entered in the register 12 d. When the signal E appears, it activates the AND gate 19α, since this gate already receives its conditioning inputs C and D from the counter 23, which is in its 0 position. In this way, the AND gate 19 α loads the register 14 a with the next or fifth character.

The response to the fifth character appearing signal F is applied to the counter 23 to switch up;., Sn that it supplies signals C and 25, the AND gate 19 /) activated and the sixth character enters the register 14 b . This signal F is applied via the AND gate 31 (which is conditioned by the signal E from the flip-flop 25) and the delay device 33, which delays the forward switching of the counter 23 until it has delivered the signals ü and ZJ.

The registers 14c and 14rf are loaded with the seventh and eighth characters in the same way as the registers 14a and 14ft. Which are in columns 5 to 8 characters to be printed after they have entered d in the register 14a to 14, printed in the manner as has been described in conjunction with the columns 1 to. 4

After each driver circuit 34a to 34 a "is excited by the firing pulses from the AND gates 3œ to 30 hours, wefden the ignition pulses via delay devices 70 to 70 λ a" applied to 4OD to the hammer selection circuits 40a. Each ignition pulse advances the hammer selection circuit, so that when the pressing in column 5 has ended, the hammer selection circuit 40a is now the hammer to be printed in column 9

selected. Similarly, upon completion of the push in columns 6, 7 and 8, the Hammer selection circuits 40b, 40c and 4Od now selected those hammer that are in the Print columns 10, 11 and 12 respectively.

When the eighth character has been entered in the register 14 d , the counter 23 supplies signals C and D which activate the AND gate 35 (FIG. 3). After a period of time determined by the delay device 37, which is sufficient to enter the eighth character, the output of the AND gate 35 is fed to the reset input of the counter 23 via the OR gate 59. In this way the counter 23 is again in the 0 position and it supplies signals C and 73. If the flip-flop 25 continues to supply a signal E , the AND gate 19a is activated to the next or ninth Enter character m of the line in register 14a. The character for column 9 is then printed via the corresponding comparison device 28 e, the AND gate 3Oe, the driver circuit 34 a and the hammer selection circuit 40 a. These elements work as indicated in the description of pressing in the previous columns.

Subsequent columns, i. H. columns 10, 11 and 12 are printed in the same way as that previous columns 6, 7 and 8.

The character to be printed in column 13 will be like this printed as the characters in columns 5 and 9. Hammer select circuit 40a has column 13 selected after being advanced or advanced by the firing pulse that causes printing in the Column 9 caused.

All other subsequent columns are printed in a similar way.

Whenever data indicating a space or a space is supplied to the printing device these are treated as any common character to be printed. This data will be entered into a register (12 or 14) and fed to a comparison device 28. When the cable 8 the comparison facility supplies identical data, The comparison device conditions an AND gate 30, which in turn supplies an ignition pulse in order to activate a driver circuit 32 or 34.

However, the data supplied via the cable 8 at this point in time continues to be sent to the dummy decoder 41 out, which provides a signal to disable the driver circuit. This is how in there is no printing on this column and a space is left.

There are four character registers 14, which are assigned to columns 5 to 80. These enable that the printing device receives a character every 7.5 milliseconds, although the Printing drum 1 only presents a complete set of types to the hammers every 30 milliseconds. There·- that is, four characters can be stored and recorded at a time, so none Data will be lost. The characters are stored in the four registers 14 until the drum 1 is rotates enough to present the character to be printed to the hammers. The extent of the required Memory circuitry (i.e. sufficient to hold four characters) thereby ensures that the time it takes for the I rommcl 1 to complete the Hammering a full Sat7. of characters is divided by the time interval in which consecutive input characters are received.

When a new line is to be printed, the document is fed to present a new area to the hammers. In addition, the control circuitry of the printing device must cause the next received character in column 1 to be printed. In the usual way, a new line is generated by three successive signals CR (car

return) is initiated on the incoming data line, followed by an LF (line feed) signal. These four signals each take 7.5 milliseconds and therefore a total time of 30 milliseconds. They therefore create enough time for the printing of a character in the last column of the previous line, since this printing does not take more than 30 milliseconds, ie not more than the time required for the drum 1 to be able to present a complete set of types.

Thus, when such signals CR and LF initiate a new line, the counters 21 and 23 (Fig. 3) are reset and held back by each of the signals CR, and the flip-flop 25 is also reset to zero. The LF signal switches the binary

counter 42 (FIG. 5) forwards so that its output lines represent 1. This signal is fed to the paper feed device 3, which upon completion of the paper feed process supplies a signal LC in order to count the counter 42 back to zero. The AND gate 44 determines that the counter 42 is at 0, and it supplies the signal FC to the AND gates 30 a to 30 rf, which are assigned to the beginning four columns.

It goes without saying that the paper feed device 3 requires a period of time to operate. During this period, characters continue to be received by the printing device, and accordingly the memory device must be able to accommodate these characters, since printing cannot take place during the paper feeding operation. These characters at the start of a new line are sequentially entered into registers 12a to 12d in the same way as the characters for columns 1 to 4 in the previous line. When the paper feed ends, the AND gates 30o to 30 d receive their signal FC, which indicates the end of the paper feed. When activated in this way, they provide the ignition pulses necessary to energize the driver circuits 32 for columns 1 to 4 of this new row. In this way, the characters in the beginning columns (ie in columns 1 to 4) are not lost during the paper feed process. They are stored in registers 12a to 12 <i.

However, in either case, enough memory circuitry is provided to store each character, which should be printed in one of the beginning columns.

^fi "The characters to be printed in the remaining columns 5 to 80 of the new line are printed in the same way as in the previous line.

. Below the 4 to 7 is the work of the hammer selection circuit 40 <7 be on _hand: writing. As mentioned above, the circuit 40a successively connects the Tolcranzstromkrcis 34a to the hammers 4 in the columns 5, 9 ... 77.

Though only hammer selection circuit 40i working? is described, the other Wahlstromkrei.se 40 b to 4Od work in an identical manner. For printing in column 5, the counter 62 had to be reset to 0 by the output of the OR gate T1, which was activated by three signals A, B and E, which appear when the fourth character in register 12 d (Fig. 2a) is entered. Alternatively, the AND gate 74 is under the condition that in the last column (column 77), which is assigned to the hammer selection circuit 40 a, a character has been printed, activated to reset the counter 62 with a signal LP , via the delay device 76 and the OR gate 72. In any case, positive signals now appear on all five 0 output lines of the counter. AND gates 66a and 64a in groups 66 and 64 are activated by these output signals and become active to energize their associated relays. This creates a conductive path over the hammer coil, which is assigned to column 5 and denoted by 52a. In this way, the first output pulse from the driver circuit 34a after the beginning of a new line excites the hammer to print in column 5. The ignition pulse from the AND gate 30e (FIG an input of the counter 62 is applied via the delay device 70a.

Of course, the delay 70 a is chosen so that enough time is created for the Counter 62 is not incremented until the hammer in column 5 has been activated.

This ignition pulse switches the counter 62 forward so that it now energizes the AND gates 64b and 66a. These AND gates energize their associated relays, to a conductive path through which the column 9 associated with 52 b designated coil is energized thereby when the driver circuit 34a provides its next output pulse.

The remaining hammer coils that go with the hammer select circuit 40a are energized in a similar sequential manner. Fig. 7 shows the time relationships between the bits that are on the output lines of counter 62 and AND gates 64 and 66 are shown. Only some of the AND gates are indicated as they are explained.

As mentioned above, the 0 outputs of counter 62 are all positive so that for printing in the Column 5 shows the binary number 00000 (decimal 0). Thus, FIG. 7 shows for column 5 that the outputs of all stages in the counter represent 0 bits. These output signals activate AND gates 64a and 66 a.

For printing in the ninth column, the binary number 00001 (IVcimal 1) is represented by the outputs of the counter. The outputs of all stages except the stage number 1 represent 0 bits represent. Thereby, the AND gates 64 and 66 b 'is activated, thereby via the sound to a conductive path the ninth column associated Hammcrspulc.

For the 77th column, the counter has moved forward until it reaches the binary number 10010 (decimal 18) represents. This activates the AND gates 64c and 66c, which have a conductive path via the Create 52 c designated hammer coil, which is assigned to the 77th column.

In summary, it can therefore be seen that the printing device by means of the method described all characters continuously fed and serially arranged with a minimal amount of memory circuitry prints. In the beginning columns too

ίο characters to be printed, ie characters to be printed in columns 1 to 4, are not lost during the line feed process. For this purpose, the registers 12a to Md, one of which is assigned to one of these starting columns,

intended. Only four single-character registers 14a to IAd are required for the remaining columns, columns 5 to 80, since memory circuitry is only required for storing four characters. The number of characters that need to be stored

d. H. four characters, is obtained by the time it takes the drum to hit the hammers to present a complete set of types by the time interval between successive ones Input character is divided.

as Although the remote printing device described above having a separate fixed hammer for each column, the invention can be practiced are in a remote printing device that has a hammer mechanism attached to a Carriage moved across the document to print a line. Have in such a printing device the columns at the beginning of each row (for example the first four columns) each have a single stationary arranged hammer, and the moving one

Hammer mechanism only prints in the remaining columns. This enables printing of characters in the starting columns without expecting the carriage return. Memory circuit is provided for in the beginning columns too

characters to be printed in order to avoid their loss during the newline process that occurs at the beginning of each Line occurs to avoid. Preferably this memory circuit comprises single character registers, i. H. one Registers that store single characters as in the

described preferred embodiment of the invention.

The moving carriage contains several hammers and performs the printing in the remaining columns in Cycles out being printed in multiple columns by the multiple hammer during each cycle will. The number of characters that must be stored at a time is essentially the same as that Ratio of the period of time that the drum needs to present a character set to the time

interval between successive input characters. Furthermore, a number is preferred used by registers storing one character each, each register having a character to be printed characters to be printed in each cycle and successively in successive cycles saves. In this way, this remote printing device also requires only a minimum ar Memory circuit such as the remote printing device described in detail above.

For this purpose 3 sheets of drawings

Claims (2)

Patent claims: 1. Printing device for line-by-line printing of characters that are continuously received as coded signals with additional control characters for the line feed and stored in a memory device consisting of at least two parts, the character signals being taken from the memory device for printing and controlled by print control signals from a print controller are fed to the printing elements, characterized in that during the setting process of the printing device triggered by a received control character (CR, LF) for a line feed, the printing device is to be printed on the next; Line, the pressure control (9, 42, 44) prevents the generation of a signal (FC) which enables the actuation of the pressure elements (32a ... 32d) so that the first part (12a ... 12d) of the memory device (12a. .. 12a ", 14a ... 14rf) stores a group of character signals beginning after the line feed signal that, after the end of the setting process, first printing elements (32a ... 12d) connected to the first part (12a ... 12d) of the memory device. 32 c /) print the characters stored in this part under the control of the print control signals (8.5) in the first print positions of the new line in parallel, so that the second part (14 «... 14a ¹ ) of the memory device refers to the beginning group of Stores incoming character signals following character elements and that further printing elements (34 «... 34J. 40a ... 40d) connected to this second part of the memory device store the characters stored therein one after the other in the order in which they arrive in the following end printing points, the number of storage elements (14a .. 14if! less than the number of printing positions following the first printing positions is that each of the further printing elements (34a... 34fl \ 40a... 40a ") deletes the content of the assigned memory element (14a ... 14 rf) after each printing and that the deleted memory elements each store the subsequent incoming character signals. 2. Printing device according to claim 1, characterized in that the second part of the storage device contains a plurality of storage elements (14a ... 14i /), each having its own printing element (34a ... 34 <7, 40 "... 40a ¹ ) are assigned and that each printing element prints in several subsequent driiLkslcllen.