DE1292183B - Schaltungsanordnung zur Phasenkorrektur von von einem Taktgeber abgegebenen Signalen durch impulsfoermige Steuersignale - Google Patents

Schaltungsanordnung zur Phasenkorrektur von von einem Taktgeber abgegebenen Signalen durch impulsfoermige Steuersignale

Info

Publication number
DE1292183B
DE1292183B DEC37404A DEC0037404A DE1292183B DE 1292183 B DE1292183 B DE 1292183B DE C37404 A DEC37404 A DE C37404A DE C0037404 A DEC0037404 A DE C0037404A DE 1292183 B DE1292183 B DE 1292183B
Authority
DE
Germany
Prior art keywords
signal
signals
pulse
phase
circuit arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEC37404A
Other languages
German (de)
English (en)
Inventor
Galopin Claude Courbevoie
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Compagnie Francaise Thomson Houston SA
Original Assignee
Compagnie Francaise Thomson Houston SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Compagnie Francaise Thomson Houston SA filed Critical Compagnie Francaise Thomson Houston SA
Publication of DE1292183B publication Critical patent/DE1292183B/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00286Phase shifter, i.e. the delay between the output and input pulse is dependent on the frequency, and such that a phase difference is obtained independent of the frequency

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
  • Invalid Beds And Related Equipment (AREA)
  • Bridges Or Land Bridges (AREA)
DEC37404A 1964-11-13 1965-11-12 Schaltungsanordnung zur Phasenkorrektur von von einem Taktgeber abgegebenen Signalen durch impulsfoermige Steuersignale Pending DE1292183B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR994962A FR1422959A (fr) 1964-11-13 1964-11-13 Perfectionnements aux dispositifs d'asservissement en phase

Publications (1)

Publication Number Publication Date
DE1292183B true DE1292183B (de) 1969-04-10

Family

ID=8842504

Family Applications (1)

Application Number Title Priority Date Filing Date
DEC37404A Pending DE1292183B (de) 1964-11-13 1965-11-12 Schaltungsanordnung zur Phasenkorrektur von von einem Taktgeber abgegebenen Signalen durch impulsfoermige Steuersignale

Country Status (10)

Country Link
AT (1) AT283449B (enrdf_load_stackoverflow)
BE (1) BE671417A (enrdf_load_stackoverflow)
DE (1) DE1292183B (enrdf_load_stackoverflow)
ES (1) ES319506A1 (enrdf_load_stackoverflow)
FR (1) FR1422959A (enrdf_load_stackoverflow)
GB (1) GB1122790A (enrdf_load_stackoverflow)
NL (1) NL6514697A (enrdf_load_stackoverflow)
NO (1) NO115586B (enrdf_load_stackoverflow)
OA (1) OA01855A (enrdf_load_stackoverflow)
SE (1) SE317707B (enrdf_load_stackoverflow)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2213680C3 (de) * 1972-03-21 1974-08-15 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Nachstellen der Phasenlagen eines Referenzträgers und eines Schritt aktes
FR2458181A1 (fr) * 1979-06-01 1980-12-26 Thomson Csf Dispositif de synchronisation d'un signal d'horloge et systemes de transmission de donnees synchrones comportant un tel dispositif
FR2459585A1 (fr) * 1979-06-20 1981-01-09 Thomson Csf Procede et dispositif pour l'affinage de la remise en phase d'une horloge locale
NL183214C (nl) * 1980-01-31 1988-08-16 Philips Nv Inrichting voor het synchroniseren van de fase van een lokaal opgewekt kloksignaal met de fase van een ingangssignaal.
NL8000607A (nl) * 1980-01-31 1981-09-01 Philips Nv Fm-ontvanger met zenderkarakterisering.
FR2601534B1 (fr) * 1986-07-10 1993-07-30 Cit Alcatel Procede et dispositif de calage en phase de trains numeriques synchrones

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

Also Published As

Publication number Publication date
FR1422959A (fr) 1966-01-03
BE671417A (enrdf_load_stackoverflow) 1966-04-26
SE317707B (enrdf_load_stackoverflow) 1969-11-24
AT283449B (de) 1970-08-10
GB1122790A (en) 1968-08-07
NL6514697A (enrdf_load_stackoverflow) 1966-05-16
OA01855A (fr) 1970-01-14
NO115586B (enrdf_load_stackoverflow) 1968-10-28
ES319506A1 (es) 1966-01-16

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