DE112020002128T5 - Power conversion device and method for controlling the power conversion device - Google Patents

Abstract

Conventionally, it is difficult to identify which point of power semiconductors constituting an upper arm and a lower arm has failed. In the present invention, a simulated DC current calculation unit 451 in a power semiconductor diagnosis unit 45 calculates first simulated downtime DC current values of respective phases based on duty values Du, Dv and Dw and AC current sensor values lus, Ivs and Iws of the respective phases and outputs the first simulated downtime DC current values to a failure determination unit 452 . The failure determination unit 452 determines which point of the power semiconductor in a power conversion circuit 60 has failed using the first simulated failure time DC current values of the respective phases, a DC current sensor value Idcs, the duty values Du, Dv and Dw of the respective phases and a target torque and outputs a failure notification signal corresponding to the failure point to a failure notification device 30 and a PWM signal generation unit 44 . It is noted that the failure determination unit 452 determines the target torque to identify whether it is the power-on time or the regeneration time.

Description

technical field

The present invention relates to a power conversion device and a method for controlling a power conversion device.

State of the art

A hybrid automobile or an electric automobile is equipped with a power conversion device configured to drive a motor. The power conversion device converts a DC current supplied from a battery into an AC current by switching power semiconductors forming an upper arm circuit and a lower arm circuit corresponding to each phase of the motor, thereby driving the motor.

In recent years, there is an increasing demand for detecting an abnormality and a failure in a power conversion device based on a safety standard for automobiles. Therefore, it is necessary to carry out a diagnosis capable of detecting an abnormality and a failure even for a power semiconductor.

PTL 1 discloses a device that includes a drive circuit for turning ON/OFF a power semiconductor for each power semiconductor and outputs an abnormality notification signal to an external abnormality notification device when it is determined that a failure has occurred in a power conversion device.

citation list

patent literature

PTL 1: JP 2017-208893 A

Summary of the Invention

Technical task

In the device described in PTL 1, it is difficult to identify which point of power semiconductors constituting an upper arm and a lower arm has failed.

solution of the task

A power conversion device according to the present invention includes: a power conversion circuit that includes an upper arm circuit and a lower arm circuit corresponding to each phase of a motor having multiple phases, and converts a DC current into AC currents of the multiple phases; a control circuit that outputs a PWM signal to the upper circuit arm and the lower circuit arm; a simulated DC current calculation unit that calculates first simulated downtime DC currents based on AC current values of remaining phases when one phase out of the plurality of phases fails, based on the AC currents output from the power conversion circuit, and one relative duty cycle of the PWM signal; and a failure determination unit that determines a failure of the upper arm circuit or the lower arm circuit of any phase based on a DC current input to the power conversion circuit or a DC current based on an AC current value output from the power conversion circuit duty cycle of the PWM signal and the first simulated downtime DC current detected.

A method for controlling a power conversion device according to the present invention includes: forming a power conversion circuit having an upper arm circuit and a lower arm circuit corresponding to each phase of a motor having multiple phases, and converting a DC current into AC currents of the multiple phases ; outputting a PWM signal to the upper circuit branch and the lower circuit branch; Calculate First Simulated Downtime DC currents based on AC current values of remaining phases when one phase out of the plurality of phases fails, based on the AC currents output from the power conversion circuit and a duty ratio of the PWM signal; and detecting a failure of the upper circuit arm or the lower circuit arm of any phase based on a DC current input to the power conversion circuit or a DC current based on an AC current value output from the power conversion circuit, the duty ratio of the PWM signal and the first simulated downtime DC current.

Advantageous Effects of the Invention

According to the present invention, it is possible to identify which point of power semiconductors constituting an upper arm and a lower arm has failed.

character list

• [ 1 ] 1 14 is a circuit configuration diagram of a power conversion device according to a first embodiment.
• [ 2 ] 2 12 is a circuit configuration diagram of the power conversion circuit.
• [ 3 ] 3 14 is a flowchart showing failure determination processing according to the first embodiment.
• [ 4 ] 4 Fig. 12 is a flowchart showing failure handling processing.
• [ 5 ] 5(A) , 5(B) and 5(c) 12 are graphs of an AC current, a duty cycle, and a DC current when an off-stuck failure has occurred in a U-phase upper circuit arm during power operation.
• [ 6 ] 6 14 is a circuit configuration diagram of a power conversion device according to a second embodiment.
• [ 7 ] 7 14 is a flowchart showing failure determination processing according to the second embodiment.
• [ 8th ] 8th 14 is a circuit configuration diagram of a power conversion device according to a third embodiment.
• [ 9 ] 9 14 is a flowchart showing failure determination processing according to the third embodiment.
• [ 10 ] 10 14 is a flowchart showing failure determination processing according to a fourth embodiment.
• [ 11 ] 11 14 is a flowchart showing failure determination processing according to a fifth embodiment.

Description of Embodiments

[First embodiment]

1 12 is a circuit configuration diagram of a power conversion device 100 according to a first embodiment.

The power conversion device 100 converts DC power supplied from a DC power supply 10 into AC power to drive a motor 20 during power operation. The DC power supply 10 is a power supply configured to drive the motor 20 . In addition, the power conversion device 100 converts the power of the motor 20 into DC power to charge the DC power supply 10 during regeneration.

The motor 20 is a three-phase motor having three windings therein. In addition, an angle sensor (not shown) configured to measure a rotation angle of the motor 20 is mounted on the motor 20, and the angle sensor outputs the measured rotation angle to the power conversion device 100 as an angle sensor value. The power conversion device 100 detects a failure, to be described later, and notifies the failure to a failure notification device 30.

The power conversion device 100 includes a control circuit 40, a drive circuit 50 and a power conversion circuit 60. The control circuit 40 includes a motor speed calculation unit 41, a target current calculation unit 42, a duty calculation unit 43, a PWM signal generation unit 44 and a power semiconductor diagnosis unit 45. The power semiconductor diagnosis unit 45 includes a calculation unit 451 for simulated DC current and a failure determination unit 452.

The voltage sensor 70 is a sensor that measures an output voltage of the DC power supply 10 and outputs the measured voltage value to the target current calculation unit 42 in the control circuit 40 as a voltage sensor value.

The DC current sensor 80 measures a DC current flowing between the DC power supply 10 and the power conversion circuit (inverter circuit) 60 and outputs the measured current value to the failure determination unit 452 as a DC current sensor value Idcs. It is noted that the DC current sensor 80 is installed to measure the current flowing into the power conversion circuit 60 from the DC power supply 10 as a positive current value in the present embodiment, but the DC current sensor is installed so may be that it measures a current value in the opposite direction than a positive current value.

The AC current sensor 90 is a sensor configured to measure an AC current flowing through each of phases (U phase, V phase, and W phase) of the motor 20 . Specifically, an AC current lu flowing through the U-phase is measured, and an AC current sensor value lus is output to the duty calculation unit 43 and the simulated DC current calculation unit 451 . Similarly, an AC current Iv flowing through the V phase is measured, and an AC current sensor value Ivs is output to the duty calculation unit 43 and the simulated DC current calculation unit 451 . Similarly, an AC current Iw flowing through the W-phase is measured, and an AC current sensor value Iws is output to the duty calculation unit 43 and the simulated DC current calculation unit 451 .

The motor speed calculation unit 41 calculates a motor speed value from a change in the angle sensor value in the motor 20 and outputs the calculated motor speed value to the target current calculation unit 42 .

The control circuit 40 communicates with an electronic control unit (not shown) provided outside of the power conversion device 100 , receives a target torque from the external electronic control unit, and inputs the target torque to the target current calculation unit 42 .

The target current calculation unit 42 calculates a current value to be supplied to the motor 20 using the target torque, the voltage sensor value and the motor speed value output from the motor speed calculation unit 41 and outputs the current value to the duty calculation unit 43 as a target current value. The target current value is expressed in the form of a d-axis target current value and a q-axis target current value, for example.

The duty calculation unit 43 calculates a U-phase duty value Du, a V-phase duty value Dv and a W-phase duty value Dw based on the target current value output from the target current calculation unit 42 and the AC current sensor values lus, Ivs and Iws and outputs the calculated ones Outputs values to the PWM signal generation unit 44 and the simulated DC current calculation unit 451 .

In the present embodiment, the U-phase duty value Du indicates an ON-time ratio of a U-phase upper arm power semiconductor, and an ON-time ratio of a U-phase lower arm power semiconductor is indicated by 1-Du. Similarly, the V-phase duty value Dv indicates an ON-time ratio of an upper V-phase arm power semiconductor, and an ON-time ratio of a V-phase lower arm power semiconductor is indicated by 1-Dv. The W-phase duty value Dw indicates an ON-time ratio of a W-phase upper arm power semiconductor, and an ON-time ratio of a W-phase lower arm power semiconductor is indicated by 1-Dw.

The PWM signal generation unit 44 includes therein a timer (not shown), generates a pulse width modulation (PWM) signal based on a value of the timer, the U-phase duty value Du, the V-phase duty value Dv, and the W- Phase duty value Dw and outputs the PWM signal to the drive circuit 50.

When an abnormality notification signal is output from the power semiconductor diagnosis unit 45, the PWM signal generation unit 44 controls the PWM signal so that the motor 20 is not driven. Examples of the state where the motor 20 is not driven include a state where all six power semiconductors in the power conversion circuit 60 are turned off (referred to as a coasting state in the present embodiment). Other examples include a state in which three upper-arm circuit power semiconductors among the six power semiconductors are turned on and three lower-arm circuit power semiconductors are turned off (referred to as the upper-arm active short circuit state in the present embodiment), and an opposite state in which the three power semiconductors of the upper circuit arm are turned off and the three power semiconductors of the lower circuit arm are turned on (in the present embodiment referred to as an active short circuit state of the lower arm).

The drive circuit 50 receives the PWM signal output from the PWM signal generation unit 44 and outputs a drive signal for turning ON/OFF the power semiconductor to the power conversion circuit 60 .

The power conversion circuit 60 includes therein a smoothing capacitor and the six power semiconductors, and converts DC power obtained from the DC power supply 10 into AC power to drive the motor 20 during the power operation. Additionally, the power 20 of the motor 20 is converted to DC power to charge the DC power supply 10 during regeneration.

The power semiconductor diagnosis unit 45 performs failure diagnosis of the power semiconductor in the power conversion circuit 60 . The simulated DC current calculation unit 451 in the power semiconductor diagnosis unit 45 calculates first simulated downtime DC current values of the respective phases based on the duty values Du, Dv and Dw and the AC current sensor values lus, Ivs and Iws of the respective phases and outputs the first simulated ones outage time DC current values to outage determination unit 452 .

The failure determination unit 452 determines which point of the power semiconductor in the power conversion circuit 60 has failed using the first simulated failure time DC current values of the respective phases, the DC current sensor value Idcs, the duty values Du, Dv and Dw of the respective phases and the target torque and outputs a failure notification signal corresponding to the failure point to the failure notification device 40 and the PWM signal generation unit 44 . It is noted that the failure determination unit 452 determines the target torque to identify whether it is the power operation time or the regeneration time. Specifically, a positive target torque indicates power run time, and a negative target torque indicates regeneration time. As another identification method, the power operation time can be identified when the DC current sensor value Idcs is positive, and the regeneration time can be identified when the DC current sensor value Idcs is negative.

2 12 is a circuit configuration diagram of the power conversion circuit 60.

The power conversion circuit 60 includes upper and lower U-phase, V-phase and W-phase arm series circuits. The U-phase upper and lower arm series circuit 61 includes a U-phase upper-arm power semiconductor Tuu and a U-phase upper-arm diode Duu and a U-phase lower-arm power semiconductor Tul and a lower-arm diode Dul the U phase. The V-phase upper and lower arm series circuit 62 includes a V-phase upper-arm power semiconductor Tvu and a V-phase upper-arm diode Dvu, and a V-phase lower-arm power semiconductor Tvl and a lower-arm diode Dvl the V phase. The W-phase upper and lower arm series circuit 63 includes a W-phase upper-arm power semiconductor Twu and a W-phase upper-arm diode Dwu and a W-phase lower-arm power semiconductor Twl and a lower-arm diode Dwl the W phase.

An upper circuit arm 64 includes the U-phase upper-arm power semiconductor Tuu, the U-phase upper-arm diode Duu, the upper-arm power semiconductor Tvu der V-phase, the V-phase upper-arm diode Dvu, the W-phase upper-arm power semiconductor Twu, and the W-phase upper-arm diode Dwu. The lower circuit arm 65 includes the U-phase lower-arm power semiconductor Tul, the U-phase lower-arm diode Dul, the V-phase lower-arm power semiconductor Tvl, the V-phase lower-arm diode Dvl, den W-phase lower arm power semiconductor Twl and W-phase lower arm diode Dwl. The power semiconductor is, for example, a power metal oxide semiconductor field effect transistor (power MOSFET) or an insulated gate bipolar transistor (IGBT).

A smoothing capacitor 66 smooths a current generated by ON/OFF of the power semiconductor and suppresses a ripple of the DC current supplied to the power conversion circuit 60 from the DC power supply 10 . As the smoothing capacitor 66, an electrolytic capacitor or a film capacitor is used, for example.

3 FIG. 12 is a flowchart showing the power semiconductor failure determination processing in the power semiconductor diagnosis unit 45. FIG.

As in step S10 of 3 1, the power semiconductor diagnosis unit 45 acquires the AC current sensor values lus, Ivs, and Iws and the DC current sensor value Idcs.

$$\begin{array}{l}\text{Erster simulierter Ausfallzeit}-\text{DC}-\text{Stromwert der V}-\text{Phase Idcv}=\text{Du}\times \text{Ius}+\text{Dw}\times \\ \text{Iws}\end{array}$$

$$\begin{array}{l}\text{Erster simulierter Ausfallzeit}-\text{DC}-\text{Stromwert der W}-\text{Phase Idcw}=\text{Du}\times \text{Ius}+\text{Dv}\times \\ \text{Ivs}\end{array}$$

In step S11, the simulated DC current calculation unit 451 calculates a U-phase downtime first simulated DC current value Idcu, a V-phase downtime first simulated DC current value Idcv, and a downtime first simulated DC current value Idcwder W phase based on the following formulas (1) to (3) from the duty values Du, Dv and Dw and the AC current sensor values lus, Ivs and Iws of the respective phases and outputs the calculated values to the failure determination unit 452 . $$\begin{array}{l}\text{First simulated downtime}-\text{DC}-\text{current value of the U}-\text{Phase Idcu}=\text{Dv}\times \text{ivs}+\text{Dw}\times \\ \text{Iws}\end{array}$$

$$\begin{array}{l}\text{First simulated downtime}-\text{DC}-\text{current value of the V}-\text{Phase Idcv}=\text{You}\times \text{ius}+\text{Dw}\times \\ \text{Iws}\end{array}$$

$$\begin{array}{l}\text{First simulated downtime}-\text{DC}-\text{Current value of the W}-\text{Phase Idcw}=\text{You}\times \text{ius}+\text{Dv}\times \\ \text{ivs}\end{array}$$

In step S12, when a difference between the DC current sensor value Idcs and the U-phase first simulated downtime DC current value Idcu is less than a threshold value 1, the failure determination unit 452 determines that a failure has occurred in the U-phase power semiconductor is. When an OFF stuck failure of a power semiconductor occurs, a first simulated fail-time DC current of a corresponding phase is substantially equal to an actual DC current value in a time zone in which the current is to flow to the failed power semiconductor. The threshold 1 is set to a value that satisfies such a relationship. As a result, it is possible to determine in which phase the failure has occurred.

In step S13, the failure determination unit 452 determines whether the engine 20 is in a power running state or in a regeneration state based on the inputted target torque or the like.

When it is determined that the engine 20 is in the power running state, the processing proceeds to step S14, and the failure determination unit 452 determines in step S14 whether the U-phase duty value Du is greater than a threshold value 2. If the U-phase -duty value Du is greater than the threshold value 2, it is determined in step S16 that an OFF stuck failure of the upper arm power semiconductor of the U-phase occurs. When the U-phase duty value Du is not greater than the threshold value 2, it is determined in step S17 that an OFF stuck failure of the lower-arm power semiconductor of the U-phase occurs. When the U-phase duty value Du is in the range from 0 to 1, the threshold 2 is set to 0.5, for example. As a result, it is determined to which of the upper circuit arm and the lower circuit arm the current should flow.

When it is determined in step S13 that the engine 20 is in the regeneration state, the processing proceeds to step S15, and the failure determination unit 452 determines whether the U-phase duty value Du is equal to or smaller than the threshold 2 in step S15 . When the U-phase duty value Du is equal to or smaller than the threshold value 2, it is determined in step S16 that the OFF-stuck failure of the power semiconductor of the U-phase upper arm circuit occurs. When the U-phase duty value Du is not equal to or smaller than the threshold value 2, it is determined in step S17 that the OFF-stuck failure of the power semiconductor of the lower-arm circuit of the U-phase occurs.

In step S<b>18 , the failure determination unit 452 outputs a failure notification signal corresponding to a failure point to the PWM signal generation unit 44 and the failure notification device 30 .

In this way, no current flows through the failed power semiconductor, the DC current becomes substantially equal to a first failed-time simulated DC current of a failed phase when the current is to flow to the failure point. At this time, by determining a duty value of the failed phase, which of the upper and lower arms is mainly on, the failure point of the upper and lower arms can be determined based on the duty. It should be noted that the phase of the voltage (that is, the duty cycle) and the phase of the current are the same during power operation, a time zone in which the duty cycle is greater than the threshold of 0.5 coincides with a time zone in which in which the current is to flow to the upper branch. On the other hand, the phase of the voltage (that is, the duty cycle) and the phase of the current are shifted by 180° during regeneration, a time zone in which the duty cycle is less than the threshold of 0.5 coincides with the time zone in which the current should flow to the upper branch.

Steps S22 to S27 indicate V-phase dropout determination processing, and steps S32 to S37 indicate W-phase dropout determination processing.

In step S12, the processing proceeds to step S22 when the difference between the DC current sensor value Idcs and the first simulated downtime DC current value Idcu of the U-phase is not smaller than the threshold 1. In step S22, it is determined if a difference between the DC current sensor value Idcs and the V-phase first simulated downtime DC current value Idcv is less than the threshold value 1, the failure determination unit 452 that a failure has occurred in the V-phase power semiconductor.

Hereinafter, steps S22 to S27 are similar to steps S12 to S17 corresponding to the U-phase dropout determination processing, and thus their description is omitted.

In step S22, the processing proceeds to step S32 if the difference between the DC current sensor value Idcs and the first simulated downtime DC current value Idcv of the V-phase is not smaller than the threshold 1. In step S32, it is determined if a difference between the DC current sensor value Idc and the W-phase first simulated downtime DC current value Idcw is less than the threshold value 1, the failure determination unit 452 that a failure has occurred in the W-phase power semiconductor. Hereinafter, steps S32 to S37 are similar to steps S12 to S17 corresponding to the U-phase dropout determination processing, and thus their description is omitted.

If the difference between the DC current sensor value Idcs and the W-phase first simulated downtime DC current value Idcw is not less than the threshold value 1 in step S32, the dropout determination unit 452 proceeds to step S39. In step S39, it is determined that there is no OFF-stuck failure in the power semiconductor.

4 FIG. 12 is a flowchart showing failure handling processing of the PWM signal generation unit 44. FIG.

When receiving the failure notification signal from the failure determination unit 452, the PWM signal generation unit 44 starts the failure handling processing. If the failure notification signal in step S18 of 3 is received and it is determined that the OFF stuck failure has occurred in the upper arm of any one of the U phase, the V phase and the W phase, which is done in step S40 of FIG 4 takes place, the processing proceeds to step S41.

In step S41, a PWM signal to be in the free-running state or the active short-circuit state of the lower arm is generated. Since it is difficult to turn on the power semiconductor of the upper arm circuit due to the failure, the upper arm circuit is not brought into the active short circuit state.

When it is determined in step S42 that the OFF stuck failure has occurred in the lower arm of any one of the U phase, the V phase and the W phase, the processing proceeds to step S43.

In step S43, a PWM signal to be in the free-running state or the upper-arm active short-circuit state is generated. Since it is difficult to turn on the power semiconductor of the lower arm circuit due to the failure, the lower arm circuit is not brought into the active short circuit state.

In a case that corresponds to no failure in step S40 and step S42, the processing proceeds to step S44. Since no failure has occurred, the PWM signal generation unit 44 continues a PWM operation, generates a PWM signal according to the duty values Du, Dv, and Dw of the respective phases, and outputs the PWM signal to the drive circuit 50 in step S44.

5(A) , 5(B) and 5(c) 12 are graphs of AC current, duty cycle, and DC current when an OFF-stuck failure has occurred in the U-phase upper circuit arm during power operation.

5(A) represents the AC current, 5(B) represents the duty cycle, 5(c) represents DC current and the horizontal axis of each graph represents time. A case is illustrated in which an OFF-stuck failure has occurred in the U-phase upper circuit arm at the time t during the power operation.

The AC current sensor value lus flowing through the U-phase becomes zero since the OFF-stuck failure occurred in the upper circuit arm of the U-phase at the time t as shown in FIG 5(A) is shown. As in 5(c) 1, a time zone occurs in which the first simulated downtime DC current Idcu of the U-phase is close to the DC current value Idcs. In this time zone, it is determined that the difference between the DC current sensor value Idcs and the U-phase first downtime simulated DC current value Idcu is smaller than the threshold 1, as in step S13 of FIG 3 is shown. Then, the U-phase duty value Du in this time zone exceeds 0.5, as in 5(B) is shown. Therefore, it is determined that the U-phase duty value Du is larger than the threshold 2 as in step S14 of FIG 3 is shown. As a result, in step S16 of 3 the OFF-stuck failure of the power semiconductor of the upper branch circuit of the U-phase is determined.

[Second embodiment]

6 12 is a circuit configuration diagram of a power conversion device 200 according to a second embodiment.

The power conversion device 200 according to the second embodiment does not include a DC current sensor 80 and a different power semiconductor diagnosis unit 46 compared to the power conversion device 100 according to the first embodiment shown in FIG 1 is shown. The same points as those of the power conversion device 100 according to the first embodiment are denoted by the same reference numerals, their description is omitted, and different parts are described below.

A simulated DC current calculation unit 461 of the power semiconductor diagnosis unit 46 calculates a first downtime simulated DC current of each phase based on the formulas (1) to (3) described in the first embodiment. Further, a simulated normal-time DC current value is calculated using the duty ratios Du, Dv, and Dw of the respective phases and the AC current sensor values lus, Ivs, and Iws of the respective phases. That is, a DC current at the normal time can be calculated by the following formula (4), and thus the value calculated by this formula (4) is used instead of a DC current sensor. $$\text{DC}-\text{current}=\left(\text{You}\times \text{ius}\right)+\left(\text{Dv}\times \text{ivs}\right)+\left(\text{Dv}\times \text{Iws}\right)$$

Here, Du is a U-phase duty ratio, Dv is a U-phase duty ratio of V-phase, Dw on is a W-phase duty ratio, lus is a U-phase AC current sensor value, Ivs is on V-phase current sensor value and Iws is a W-phase current sensor value.

The simulated DC current calculation unit 461 outputs the calculated DC current to a failure determination unit 462 . The failure determination unit 462 determines which point of the power semiconductor in the power conversion circuit 60 has failed using the first simulated failure time DC current values of the respective phases, the simulated normal time DC current value, the duty values Du, Dv and Dw of the respective phases and one target torque and outputs a failure notification signal corresponding to the failure point to the failure notification device 30 and the PWM signal generation unit 44 . It is noted that the failure determination unit 462 determines the target torque to identify whether it is the power operation time or the regeneration time. Specifically, a positive target torque indicates power run time, and a negative target torque indicates regeneration time. As another identification method, the power operation time can be identified when the simulated normal-time DC current calculated by the simulated DC current calculation unit 461 is positive, and the regeneration time can be identified when the simulated normal-time current calculated by the simulated DC current calculation unit 461 is positive DC current calculated simulated standard time DC current is negative.

7 FIG. 12 is a flowchart showing the power semiconductor failure determination processing in the power semiconductor diagnosis unit 46. FIG.

In the failure determination processing in the power semiconductor diagnostic unit 46 according to the second embodiment, the same points as those in the flowchart showing the failure determination processing according to the first embodiment shown in FIG 3 is denoted by the same reference numerals and their description is omitted, and different parts will be described below.

As in step S10' in 7 As shown, the power semiconductor diagnosis unit 46 acquires the AC current sensor values Ius, Ivs and Iws.

In step S11′, the simulated DC current calculation unit 461 calculates a U-phase first downtime simulated DC current value Idcu, a V-phase first downtime simulated DC current value Idcv, and a downtime first simulated DC current value Idcw of the W phase based on the formulas (1) to (3) from the duty values Du, Dv, and Dw and the AC current sensor values lus, Ivs, and Iws of the respective phases, and outputs the calculated values to the failure determination unit 462. Further, a simulated normal-time DC current Idea, which is a DC current at the normal time, is calculated based on Formula (4) and output to the failure determination unit 462 .

In step S12', when a difference between the simulated normal-time DC current Idce and the first simulated downtime DC current value Idcu of the U-phase is smaller than a threshold value 1, the failure determination unit 462 determines that in the U-phase power semiconductor an outage has occurred. When an OFF-stuck failure of a power semiconductor occurs, a first simulated fail-time DC current of a corresponding phase is substantially equal to an actual DC current value in a time zone in which the current is to flow to the failed power semiconductor. The threshold 1 is set to a value that satisfies such a relationship. As a result, it is possible to determine in which phase the failure has occurred.

In step S13, the failure determination unit 462 determines whether the engine 20 is in a power running state or in a regeneration state based on the inputted target torque or the like. The following is similar to the flowchart showing the failure determination processing according to the first embodiment shown in FIG 3 is shown.

When the difference between the simulated normal-time DC current Idce and the first simulated down-time DC current value Idcu of the U-phase is not smaller than the threshold 1 in step S12', the processing proceeds to step S22'. In step S22', when a difference between normal-time simulated DC current Idce and the V-phase first failed-time simulated DC current value Idcv is smaller than the threshold value 1, the failure determination unit 462 determines that in the V-phase power semiconductor an outage has occurred. Hereinafter, steps S23 to S27 are similar to steps S13 to S17 in the U-phase dropout determination processing, and thus their description is omitted.

When the difference between the simulated normal-time DC current Idce and the first simulated down-time DC current value Idcv of the V-phase is not smaller than the threshold 1 in step S22', the processing proceeds to step S32'. In step S32', when a difference between normal-time simulated DC current Idce and W-phase first failed-time simulated DC current value Idcw is smaller than the threshold 1, the failure determination unit 462 determines that in the W-phase power semiconductor an outage has occurred. Hereinafter, steps S33 to S37 are similar to steps S13 to S17 in the U-phase dropout determination processing, and thus their description is omitted.

When in step S32' the difference between the simulated normal-time DC current Idce and the first simulated down-time DC current value Idcw of the W-phase is not smaller than the threshold 1, the outage determination unit 462 proceeds to step S39. In step S39, it is determined that there is no OFF-stuck failure in the power semiconductor.

[Third Embodiment]

8th 14 is a circuit configuration diagram of a power conversion device 300 according to a third embodiment.

The power conversion device 300 according to the third embodiment differs from the power conversion device 100 according to the first embodiment shown in FIG 1 1, regarding a power semiconductor diagnosis unit 47. The same points as those of the power conversion device 100 according to the first embodiment are denoted by the same reference numerals, their description is omitted, and different parts will be described below.

$$\begin{array}{l}\text{Zweiter simulierter Ausfallzeit}-\text{DC}-\text{Strom der V}-\text{Phase Idcv2}=\text{Du}\times \text{Ius}+\text{K}\times \text{Ivs}+\\ \text{Dw}\times \text{Iws}\end{array}$$

$$\begin{array}{l}\text{Zweiter simulierter Ausfallzeit}-\text{DC}-\text{Strom der W}-\text{Phase Idcw2}=\text{Du}\times \text{Ius}+\text{Dv}\times \text{Ivs}\\ +\text{K}\times \text{Iws}\end{array}$$

A simulated DC current calculation unit 471 of the power semiconductor diagnosis unit 47 calculates a first downtime simulated DC current of each phase based on the formulas (1) to (3) described in the first embodiment. Further, second simulated downtime DC currents of the respective phases are calculated based on the following formulas (5) to (7). $$\begin{array}{l}\text{Second simulated downtime}-\text{DC}-\text{current of the U}-\text{Phase Idcu2}=\text{K}\times \text{ius}+\text{Dv}\times \text{ivs}+\\ \text{Dw}\times \text{Iws}\end{array}$$

$$\begin{array}{l}\text{Second simulated downtime}-\text{DC}-\text{current of the v}-\text{Phase Idcv2}=\text{You}\times \text{ius}+\text{K}\times \text{ivs}+\\ \text{Dw}\times \text{Iws}\end{array}$$

$$\begin{array}{l}\text{Second simulated downtime}-\text{DC}-\text{current of the W}-\text{Phase Idcw2}=\text{You}\times \text{ius}+\text{Dv}\times \text{ivs}\\ +\text{K}\times \text{Iws}\end{array}$$

Here, Du is a U-phase duty ratio, Dv is a V-phase duty ratio, Dw is a W-phase duty ratio, lus is a U-phase AC current sensor value, Ivs is a V-phase current sensor value , Iws is a W-phase current sensor value, and K is a coefficient. The coefficient K is set within the range of 0<K≦1. The first simulated downtime DC currents of the formulas (1) to (3) shown in the first embodiment correspond to a case where the formulas (5) to (7) are calculated with K=0. In order to avoid erroneous detection in normal time, it is desirable to set K to a value significantly different from 0 (e.g. K=1).

The first downtime simulated DC current and the second downtime simulated DC current of each phase calculated by the simulated DC current calculation unit 471 are output to the outage determination unit 472 .

The failure determination unit 472 determines which point of the power semiconductor in the power conversion circuit 6O has failed using the first downtime simulated DC current values of the respective phases, the second downtime simulated DC current values of the respective phases, a DC current sensor value Idcs, the duty cycle values Du, Dv, and Dw of the respective phases and a target torque, and outputs a failure notification signal corresponding to the failure point to the failure notification device 30 and the PWM signal generation unit 44 .

In the present embodiment, the outage determination unit 472 determines whether a difference between the DC current sensor value Idcs and the first simulated outage time DC current value is less than a threshold 1 and a difference between the DC current sensor value Idcs and the second simulated downtime DC current value is less than the threshold 1.

Since no current flows through a failed power semiconductor, the second simulated downtime DC currents using all three phase AC currents and the DC currents are also equal. Therefore, a point of failure can be identified even if the second simulated failure time DC current is additionally used. If only the difference between the DC current sensor value Idcs and the first simulated downtime DC current value is determined, the DC current approaches the first simulated downtime DC current value, which is not a failed phase, at the time to which the duty cycle is small (duty cycle ≈ 0), which can cause erroneous detection of a failure. On the other hand, it is possible to falsely detect the failure by determining whether the difference between the DC current sensor value Idcs and the first simulated downtime DC current value is less than threshold 1 and the difference between the DC current sensor value Idcs and the second simulated one Downtime DC current value is less than the threshold 1 to be eliminated in the present embodiment.

9 FIG. 12 is a flowchart showing the power semiconductor failure determination processing in the power semiconductor diagnosis unit 47. FIG.

In the failure determination processing in the power semiconductor diagnostic unit 47 according to the third embodiment, the same points as those in the flowchart showing the failure determination processing according to the first embodiment shown in FIG 3 is denoted by the same reference numerals, their description is omitted, and different parts will be described below.

In step S10 of 9 the power semiconductor diagnosis unit 45 acquires the AC current sensor values lus, Ivs and Iws and the DC current sensor value Idcs, and in step S11", the simulated DC current calculation unit 471 calculates the first simulated downtime DC current value Idcu of the U-phase, the first simulated downtime DC current value Idcv of V-phase and the first simulated downtime DC current value Idcw of W-phase from the duty cycle values Du, Dv, and Dw and the AC current sensor values Ius, Ivs, and Iws based on the formulas (1) to (3) described in the first embodiment, and outputs the calculated values to the dropout determination unit 472. Further, the simulated DC current calculation unit 471 calculates the second failed-time simulated DC current value Idcu2 of the U-phase, the second simulated downtime DC current value Idcv2 of the V-phase and the second simulated downtime DC current value Idcw2 of the W-phase based on the formulas (5) to (7), and gives the calculated values te to the failure determination unit 472 .

In step S12", the failure determining unit 472 determines that a failure has occurred in the U-phase power semiconductor when the difference between the DC current sensor value Idcs and the first simulated downtime DC current value Idcu of the U-phase and is smaller than the threshold 1 and the difference between the DC current sensor value Idcs and the second simulated DC current value Idcu2 of U-phase is smaller than the threshold 1.

In step S13, the failure determination unit 462 determines whether the engine 20 is in a power running state or in a regeneration state based on the inputted target torque or the like. Hereinafter, steps S13 to S18 are similar to those of the flowchart showing the failure determination processing according to the first embodiment shown in FIG 3 is shown.

The failure determination unit 472 proceeds to a process of step S22" if a condition that the difference between the DC current sensor value Idcs and the first simulated failure time DC current value Idcu of the U-phase is smaller than the threshold 1 and the difference between the DC current sensor value Idcs and the second simulated downtime DC current value Idcu2 of the U-phase is smaller than the threshold value 1 is not satisfied in step S12". In step S22", the failure determination unit 472 determines that a failure has occurred in the V-phase power semiconductor when the difference between the DC current sensor value Idcs and the first simulated failure-time DC current value Idcv of the V-phase and is smaller than the threshold 1 and the difference between the DC current sensor value Idcs and the second simulated downtime DC current value Idcv2 of the V phase is smaller than the threshold 1. Below, steps S23 to S27 are similar to steps S13 to S17 in that of the U phases -failure determination processing, and thus its description is omitted.

If a condition that the difference between the DC current sensor value Idcs and the first simulated downtime DC current value Idcv of the V phase is smaller than the threshold 1 and the difference between the DC current sensor value Idcs and the second simulated downtime DC current value Idcv2 of the V-phase is smaller than the threshold value 1 is not satisfied in step S22", the processing proceeds to a process of step S32". In step S32", the failure determining unit 472 determines that a failure has occurred in the W-phase power semiconductor when the difference between the DC current sensor value Idcs and the first simulated downtime DC current value Idcw of the W-phase and is smaller than the threshold 1 and the difference between the DC current sensor value Idcs and the second simulated downtime DC current value Idcw2 of the W phase is smaller than the threshold 1. Below, steps S33 to S37 are similar to steps S13 to S17 in that of the U phase -failure determination processing, and thus its description is omitted.

The failure determination unit 462 proceeds to a process of step S39 if a condition that the difference between the DC current sensor value Idcs and the first simulated failure time DC current value Idcw of the W-phase is smaller than the threshold 1 and the difference between the DC current sensor value Idcs and the second simulated failure time DC current value Idcw2 of the W-phase is smaller than the threshold value 1, is not satisfied in step S32". In step S39, it is determined that there is no OFF-stuck failure in the power semiconductor is.

[Fourth Embodiment]

Since the power conversion device 100 according to a fourth embodiment is similar to the power conversion device 100 according to the first embodiment shown in FIG 1 1, the same items are denoted by the same reference numerals and their description is omitted.

10 14 is a flowchart showing power semiconductor failure determination processing according to the present embodiment. In the present embodiment, there is a difference in the failure determination processing from the flowchart showing the failure determination processing according to the first embodiment shown in FIG 3 is shown, represents. The same points as those of the flowchart showing the failure determination processing according to the first embodiment shown in FIG 3 FIG. 1 is denoted by the same reference numerals, their description will be omitted, and different parts will be described below.

In the first embodiment, in step S12 of 3 determines whether the difference between the DC current sensor value Idcs and the first simulated downtime DC current value Idcu of the U-phase is smaller than a threshold value 1. In the present embodiment, in step S12''' of 10 determines whether a state in which a difference between a DC current sensor value Idcs and a first simulated downtime DC current value Idcu of the U-phase is smaller than a threshold value has lasted for a specific period of time or longer. When an AC current of a particular phase is zero, a DC current sensor value coincides with a first simulated downtime DC current value of the corresponding phase even if there is no failure in a power semiconductor, so there is a possibility that the failure is incorrectly detected. Therefore, in the present embodiment, a failure is detected when the state in which the difference between the DC current sensor value Idcs and the first simulated failure time DC current value Idcu of the U-phase is smaller than the threshold 1 for a specific period of time or lasts longer, thereby avoiding erroneous detection of the failure.

In step S22''' of 10 it is determined whether a state in which the difference between the DC current sensor value Idcs and a first simulated downtime DC current value Idcv of the V-phase is smaller than the threshold 1 has lasted for a specific period of time or longer.

In step S32''' of 10 it is determined whether a state in which the difference between the DC current sensor value Idcs and a first simulated downtime DC current value Idcw of the W-phase is smaller than the threshold 1 has lasted for a specific period of time or longer.

[Fifth Embodiment]

Since the power conversion device 300 according to a fifth embodiment is similar to the power conversion device 300 according to the third embodiment shown in FIG 8th 1, the same items are denoted by the same reference numerals and their description is omitted.

11 14 is a flowchart showing power semiconductor failure determination processing according to the present embodiment. In the present embodiment, there is a difference in the failure determination processing from the flowchart showing the failure determination processing according to the third embodiment shown in FIG 9 is shown, represents. The same points as those of the flowchart showing the failure determination processing according to the third embodiment shown in FIG 9 FIG. 1 is denoted by the same reference numerals, their description will be omitted, and different parts will be described below.

In the third embodiment, in step S12" of 9 determines whether the difference between the DC current sensor value Idcs and the first simulated downtime DC current value Idcu of the U-phase is smaller than a threshold 1 and the difference between the DC current sensor value Idcs and the second simulated downtime DC current value Idcu2 of the U-phase is smaller than the threshold value 1. In the present embodiment, in step S12''' of 11 determines whether a difference between a first simulated downtime DC current value Idcu of U-phase and a second simulated downtime DC current value Idcu2 of U-phase is smaller than a threshold 1. In the third embodiment, when a condition, that a difference between a DC current sensor value Idcs and the first simulated downtime DC current value Idcu of the U phase is smaller than the threshold 1 and a difference between the DC current sensor value Idcs and the second simulated downtime DC current value Idcu2 of the U -phase is smaller than the threshold 1, the difference between the first simulated downtime DC current value Idcu of U-phase and the second simulated downtime DC current value Idcu2 of U-phase also falls into a specific range. Therefore, it is possible to perform a determination equivalent to the determination condition of the third embodiment using the determination condition of the present embodiment while simplifying the determination condition compared to the third embodiment.

In step S22''' in 11 it is determined whether a difference between a first simulated downtime DC current value Idcv of the V-phase and a second simulated downtime DC current value Idcv2 of the V-phase is smaller than the threshold 1.

In step S32''' in 11 it is determined whether a difference between a first simulated downtime DC current value Idcw of the W-phase and a second simulated downtime DC current value Idcw2 of the W-phase is smaller than the threshold 1.

• (1) Die Leistungsumsetzungsvorrichtung 100 enthält: die Leistungsumsetzungsschaltung 60, die entsprechend jeder Phase des Motors 20, der mehrere Phasen aufweist, einen oberen Schaltungszweig und einen unteren Schaltungszweig enthält und einen DC-Strom in AC-Ströme der mehreren Phasen umsetzt; die Steuerschaltung 40, die ein PWM-Signal zu dem oberen Schaltungszweig und dem unteren Schaltungszweig ausgibt; die Berechnungseinheit 451 für simulierten DC-Strom, die erste simulierte Ausfallzeit-DC-Ströme basierend auf AC-Stromwerten verbleibender Phasen, wenn eine Phase aus den mehreren Phasen ausfällt, basierend auf den AC-Strömen, die aus der Leistungsumsetzungsschaltung 60 ausgegeben werden, und einer relativen Einschaltdauer des PWM-Signals berechnet; und die Ausfallbestimmungseinheit 452, die einen Ausfall des oberen Schaltungszweigs oder des unteren Schaltungszweigs irgendeiner Phase basierend auf einem DC-Strom, der in die Leistungsumsetzungsschaltung 60 eingegeben wird, oder einem DC-Strom basierend auf einem AC-Stromwert, der aus der Leistungsumsetzungsschaltung 60 ausgegeben wird, der relativen Einschaltdauer des PWM-Signals und dem ersten simulierten Ausfallzeit-DC-Strom detektiert. Als ein Ergebnis ist es möglich zu identifizieren, welcher Punkt von Leistungshalbleitern, die einen oberen Schaltungszweig und einen unteren Schaltungszweig bilden, ausgefallen ist.
• (2) Ein Verfahren zum Steuern der Leistungsumsetzungsvorrichtung 100 enthält: Bilden der Leistungsumsetzungsschaltung 60, die entsprechend jeder Phase des Motors 20, der mehrere Phasen aufweist, einen oberen Schaltungszweig und einen unteren Schaltungszweig enthält, und Umsetzen eines DC-Stroms in AC-Ströme der mehreren Phasen; Ausgeben eines PWM-Signals zu dem oberen Schaltungszweig und dem unteren Schaltungszweig; Berechnen erster simulierter Ausfallzeit-DC-Ströme basierend auf AC-Stromwerten verbleibender Phasen, wenn eine Phase aus den mehreren Phasen ausfällt, basierend auf den AC-Strömen, die aus der Leistungsumsetzungsschaltung 60 ausgegeben werden, und einer relativen Einschaltdauer des PWM-Signals; und Detektieren eines Ausfalls des oberen Schaltungszweigs oder des unteren Schaltungszweigs irgendeiner Phase basierend auf einem DC-Strom, der in die Leistungsumsetzungsschaltung 60 eingegeben wird, oder einem DC-Strom basierend auf einem AC-Stromwert, der aus der Leistungsumsetzungsschaltung 60 ausgegeben wird, der relativen Einschaltdauer des PWM-Signals und dem ersten simulierten Ausfallzeit-DC-Strom. Als ein Ergebnis ist es möglich zu identifizieren, welcher Punkt von Leistungshalbleitern, die einen oberen Schaltungszweig und einen unteren Schaltungszweig bilden, ausgefallen ist.

According to the embodiments described above, the following operational effects are obtained.

• (1) The power conversion device 100 includes: the power conversion circuit 60 that includes an upper arm circuit and a lower arm circuit corresponding to each phase of the motor 20 having multiple phases, and converts a DC current into AC currents of the multiple phases; the control circuit 40 which outputs a PWM signal to the upper circuit arm and the lower circuit arm; the simulated DC current calculation unit 451 calculates first simulated downtime DC currents based on AC current values of remaining phases when one phase out of the plurality of phases fails, based on the AC currents output from the power conversion section 60, and a duty ratio of the PWM signal is calculated; and the failure determination unit 452 that determines a failure of the upper circuit arm or the lower circuit arm of any phase based on a DC current input to the power conversion circuit 60 or a DC current based on an AC current value output from the power conversion circuit 60 is detected, the duty cycle of the PWM signal and the first simulated downtime DC current. As a result, it is possible to identify which point of power semiconductors constituting an upper arm and a lower arm has failed.
• (2) A method for controlling the power conversion device 100 includes: forming the power conversion circuit 60 including an upper arm circuit and a lower arm circuit corresponding to each phase of the motor 20 having multiple phases, and converting a DC current into AC currents of the multiple phases; outputting a PWM signal to the upper circuit branch and the lower circuit branch; calculating first simulated failure time DC currents based on AC current values of remaining phases when one phase of the plurality of phases fails, based on the AC currents output from the power conversion circuit 60 and a duty ratio of the PWM signal; and detecting a failure of the upper circuit arm or the lower circuit arm of any phase based on a DC current input to the power conversion circuit 60, or a DC current based on an AC current value output from the power conversion circuit 60, the duty ratio of the PWM signal, and the first simulated downtime DC current. As a result, it is possible to identify which point of power semiconductors constituting an upper arm and a lower arm has failed.

(Modifications)

• (1) Der Motor 20 ist als ein Beispiel der drei Phasen, die im Inneren drei Wicklungen aufweisen, beschrieben worden, kann jedoch ein Mehrphasenmotor sein, ohne auf die drei Phasen beschränkt zu sein. Selbst in diesem Fall ist es möglich, einen Ausfall eines oberen Schaltungszweigs oder eines unteren Schaltungszweigs irgendeiner Phase zu detektieren.
• (2) Die Leistungsumsetzungsvorrichtung 100 enthält den AC-Stromsensor 90 für die drei Phasen darin, kann jedoch einen AC-Stromsensor für nur zwei Phasen enthalten. In diesem Fall kann ein AC-Strom der verbleibenden einen Phase unter Verwendung einer Tatsache berechnet werden, dass die Summe der AC-Ströme der drei Phasen null wird, und der Ausfall des oberen Schaltungszweigs oder des unteren Schaltungszweigs irgendeiner Phase kann auf ähnliche Weise wie in dem Fall, der den AC-Stromsensor 90 für die drei Phasen enthält, detektiert werden.

The present invention can be modified as follows by modifying the first to fifth embodiments described above.

• (1) The motor 20 has been described as an example of the three phases having three windings inside, but may be a polyphase motor without being limited to the three phases. Even in this case, it is possible to detect failure of an upper arm or a lower arm of any phase.
• (2) The power conversion device 100 includes the AC current sensor 90 for the three phases therein, but may include an AC current sensor for only two phases. In this case, an AC current of the remaining one phase can be calculated using a fact that the sum of the AC currents of the three phases becomes zero, and the failure of the upper-arm circuit or the lower-arm circuit of any phase can be detected in a similar manner as in the case including the AC current sensor 90 for the three phases can be detected.

The present invention is not limited to the above-described embodiments, and other modes that can be conceived within a scope of the technical idea of the present invention are also included in the scope of the present invention as long as the characteristics of the present invention are not impaired. In addition, the invention can be configured by combining the embodiments and modifications.

reference list

10

DC power supply

20

engine

40

control circuit

41

engine speed calculation unit

42

target current calculation unit

43

duty cycle calculation unit

44

PWM signal generation unit

45

Power semiconductor diagnostic unit

50

control circuit

60

power conversion circuit

100

power conversion device

451

Calculation unit for simulated DC current

452

failure determination unit

QUOTES INCLUDED IN DESCRIPTION

This list of documents cited by the applicant was generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Patent Literature Cited

• JP 2017208893 A [0005]

Claims (20)

Power conversion device, comprising: a power conversion circuit that includes an upper arm circuit and a lower arm circuit corresponding to each phase of a motor having multiple phases, and converts a DC current into AC currents of the multiple phases; a control circuit that outputs a PWM signal to the upper circuit arm and the lower circuit arm; a simulated DC current calculation unit that calculates first simulated downtime DC currents based on AC current values of remaining phases when one phase of the plurality of phases fails, based on the AC currents output from the power conversion circuit, and a duty ratio of the PWM signal is calculated; and a failure determination unit that determines a failure of the upper circuit arm or the lower circuit arm of any phase based on a DC current that is input to the power conversion circuit, or a DC current based on an AC current value that is output from the power conversion circuit, the relative Duty cycle of the PWM signal and the first simulated downtime DC current detected. Power conversion device according to claim 1 further comprising: a DC current sensor that measures a DC current input to the power conversion circuit, wherein the failure determination unit detects a failure of the upper arm circuit or the lower arm circuit of any phase based on the DC current measured by the DC current sensor. Power conversion device according to claim 1 , wherein the simulated DC current calculation unit calculates the DC current based on the AC current value output from the power conversion circuit, based on the AC current value output from the power conversion circuit, and the duty ratio of the PWM signal , and the failure determination unit detects a failure in the upper circuit arm or the lower circuit arm of any phase based on the calculated DC current. Power conversion device according to one of Claims 1 until 3 , wherein the simulated DC current calculation unit calculates second simulated downtime DC currents based on all AC current values of the multiple phases and a failure of the upper circuit arm and the lower circuit arm of any phase based on the first simulated downtime DC current and the second simulated downtime DC current detected. Power conversion device according to one of Claims 1 until 3 , wherein if a difference between the DC current and the first simulated failure time DC current of a specific phase is equal to or less than a specific value, the failure determination unit determines that the upper branch circuit of the phase has failed if the relative duty cycle of the phase is equal to or greater than a threshold during power operation of the engine, or duty cycle of the phase is equal to or less than the threshold during regeneration of the engine. Power conversion device according to claim 5 wherein when a state in which a difference between the DC current and the first simulated downtime DC current of a specific phase is equal to or smaller than a specific value continues for a specific period of time or longer, the failure determination unit determines that the upper leg circuit of the phase has failed if the phase duty ratio during motor power operation is equal to or greater than a threshold or the phase duty ratio during motor regeneration is equal to or less than the threshold. Power conversion device according to claim 5 , wherein the control circuit outputs the PWM signal for turning off all power semiconductors constituting the upper arm circuit and the lower arm circuit of the power conversion circuit or turning on all power semiconductors constituting the lower arm circuit of the power conversion circuit when the failure determining unit determines that the upper arm circuit has failed is. Power conversion device according to one of Claims 1 until 3 , wherein when a difference between the DC current and the first simulated downtime DC current of a specific phase is equal to or less than a specific value, the failure determination unit determines that the lower circuit arm of the phase has failed if the relative duty cycle of the phase is equal to or less than a threshold during power operation of the engine or duty cycle of the phase is equal to or greater than the threshold during regeneration of the engine. Power conversion device according to claim 8 wherein when a state in which a difference between the DC current and the first simulated downtime DC current of a specific phase is equal to or smaller than a specific value continues for a specific period of time or longer, the failure determination unit determines that the lower leg circuit of the phase has failed if the phase duty ratio during motor power operation is equal to or less than a threshold or the phase duty ratio during motor regeneration is equal to or greater than the threshold. Power conversion device according to claim 8 , wherein the control circuit outputs the PWM signal for turning off all power semiconductors constituting the upper circuit arm and the lower circuit arm of the power conversion circuit, or the PWM signal for turning on all power semiconductors constituting the upper circuit arm of the power conversion circuit when the failure determination unit determines, that the lower circuit branch has failed. A method of controlling a power conversion device, comprising: forming a power conversion circuit having an upper arm circuit and a lower arm circuit corresponding to each phase of a motor having multiple phases, and converting a DC current into AC currents of the multiple phases; outputting a PWM signal to the upper circuit branch and the lower circuit branch; calculating first simulated downtime DC currents based on AC current values of remaining phases when one phase out of the plurality of phases fails, based on the AC currents output from the power conversion circuit and a duty ratio of the PWM signal; and Detecting a failure of the upper circuit arm or the lower circuit arm of any phase based on a DC current that is input to the power conversion circuit, or a DC current based on an AC current value that is output from the power conversion circuit, the duty cycle of the PWM signal and the first simulated downtime DC current. Method for controlling a power conversion device claim 11 wherein a DC current sensor that measures a DC current input to the power conversion circuit is provided, and failure of the upper arm circuit or the lower arm circuit of any phase is detected based on the DC current measured by the DC current sensor. Method for controlling a power conversion device claim 11 , wherein the DC current is calculated based on the AC current value output from the power conversion circuit, based on the AC current value output from the power conversion circuit, and the duty ratio of the PWM signal, and a failure in the upper branch circuit or the lower branch circuit of any phase is detected based on the calculated DC current. Method for controlling a power conversion device according to any one of Claims 11 until 13 , further comprising: calculating second simulated downtime DC currents based on all AC current values of the multiple phases and detecting a failure of the upper circuit branch and the lower circuit branch of any phase based on the first simulated downtime DC current and the second simulated downtime -DC current. Method for controlling a power conversion device according to any one of Claims 11 until 13 , wherein if a difference between the DC current and the first simulated failure time DC current of a particular phase is equal to or less than a particular value, it is determined that the upper leg circuit of the phase has failed if the duty cycle of the phase is equal to or greater than a threshold during power operation of the engine or the duty cycle of the phase is equal to or less than the threshold during regeneration of the engine. Method for controlling a power conversion device claim 15 wherein when a condition in which a difference between the DC current and the first simulated outage DC current of a specific phase is equal to or less than a specific value persists for a specific period of time or longer is determined, that the upper branch circuit of the phase has failed if the phase duty cycle during power operation of the engine is equal to or greater than a threshold or the phase duty cycle during engine regeneration is equal to or less than the threshold. Method for controlling a power conversion device claim 15 , wherein the PWM signal for turning off all power semiconductors constituting the upper-arm circuit and the lower-arm circuit of the power conversion circuit or turning on all power semiconductors constituting the lower-arm circuit of the power conversion circuit is output when it is determined that the upper-arm circuit has failed. Method for controlling a power conversion device according to any one of Claims 11 until 13 , wherein if a difference between the DC current and the first simulated failure time DC current of a particular phase is equal to or less than a particular value, it is determined that the phase's lower circuit branch has failed if the duty cycle of the phase is equal to or less than a threshold during power operation of the engine or the duty cycle of the phase is equal to or greater than the threshold during regeneration of the engine. Method for controlling a power conversion device Claim 18 wherein when a condition in which a difference between the DC current and the first simulated outage DC current of a specific phase is equal to or less than a specific value persists for a specific period of time or longer is determined, that the lower leg circuit of the phase has failed if the phase duty cycle during power operation of the motor is equal to or less than a threshold or the phase duty cycle during motor regeneration is equal to or greater than the threshold. Method for controlling a power conversion device Claim 18 , wherein the PWM signal for turning off all power semiconductors constituting the upper arm circuit and the lower arm circuit of the power conversion circuit or the PWM signal for turning on all power semiconductors constituting the upper circuit arm of the power conversion circuit is output when it is determined that the lower circuit branch has failed.

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