DE112017007576T5 - Zonenanalyse zur rezeptoptimierung und messung - Google Patents
Zonenanalyse zur rezeptoptimierung und messung Download PDFInfo
- Publication number
- DE112017007576T5 DE112017007576T5 DE112017007576.9T DE112017007576T DE112017007576T5 DE 112017007576 T5 DE112017007576 T5 DE 112017007576T5 DE 112017007576 T DE112017007576 T DE 112017007576T DE 112017007576 T5 DE112017007576 T5 DE 112017007576T5
- Authority
- DE
- Germany
- Prior art keywords
- zone analysis
- metrology
- setup
- wafer
- procedure according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
- H10P72/0612—Production flow monitoring, e.g. for increasing throughput
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D18/00—Testing or calibrating apparatus or arrangements provided for in groups G01D1/00 - G01D15/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
- H10P74/235—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising optical enhancement of defects or not-directly-visible states
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
- H10P74/238—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection or in-situ thickness measurement
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/27—Structural arrangements therefor
- H10P74/277—Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
- H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
- Manufacturing & Machinery (AREA)
- Analysing Materials By The Use Of Radiation (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201762509679P | 2017-05-22 | 2017-05-22 | |
| US62/509,679 | 2017-05-22 | ||
| PCT/US2017/065629 WO2018217232A1 (en) | 2017-05-22 | 2017-12-11 | Zonal analysis for recipe optimization and measurement |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE112017007576T5 true DE112017007576T5 (de) | 2020-03-05 |
Family
ID=64396977
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE112017007576.9T Pending DE112017007576T5 (de) | 2017-05-22 | 2017-12-11 | Zonenanalyse zur rezeptoptimierung und messung |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US10763146B2 (https=) |
| JP (1) | JP6864122B2 (https=) |
| KR (1) | KR102301556B1 (https=) |
| CN (1) | CN110622287B (https=) |
| DE (1) | DE112017007576T5 (https=) |
| TW (1) | TWI768046B (https=) |
| WO (1) | WO2018217232A1 (https=) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10962951B2 (en) | 2018-06-20 | 2021-03-30 | Kla-Tencor Corporation | Process and metrology control, process indicators and root cause analysis tools based on landscape information |
| US11249400B2 (en) | 2018-12-14 | 2022-02-15 | Kla Corporation | Per-site residuals analysis for accurate metrology measurements |
| KR20230014360A (ko) | 2021-07-21 | 2023-01-30 | 에스케이플래닛 주식회사 | 생산적 적대 신경망을 기반으로 하는 복합체 생산 레시피를 추론하기 위한 장치 및 이를 위한 방법 |
| KR20230052529A (ko) | 2021-10-13 | 2023-04-20 | 에스케이플래닛 주식회사 | 오토인코더 특성 추출을 통한 복합체 특성과 복합체 생산 조건을 상호 추론하기 위한 방법 및 이를 위한 장치 |
| KR102936585B1 (ko) | 2023-05-08 | 2026-03-09 | 삼성전자주식회사 | 다중 피크 포커스를 가진 웨이퍼에서의 포커스 최적화 방식 |
| EP4538797A1 (en) * | 2023-10-11 | 2025-04-16 | ASML Netherlands B.V. | Method of determining a sampling scheme and associated metrology method |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7698012B2 (en) * | 2001-06-19 | 2010-04-13 | Applied Materials, Inc. | Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processing |
| US7161669B2 (en) | 2005-05-06 | 2007-01-09 | Kla- Tencor Technologies Corporation | Wafer edge inspection |
| US7570796B2 (en) | 2005-11-18 | 2009-08-04 | Kla-Tencor Technologies Corp. | Methods and systems for utilizing design data in combination with inspection data |
| KR101565071B1 (ko) * | 2005-11-18 | 2015-11-03 | 케이엘에이-텐코 코포레이션 | 검사 데이터와 조합하여 설계 데이터를 활용하는 방법 및 시스템 |
| JP4996856B2 (ja) * | 2006-01-23 | 2012-08-08 | 株式会社日立ハイテクノロジーズ | 欠陥検査装置およびその方法 |
| US7324193B2 (en) * | 2006-03-30 | 2008-01-29 | Tokyo Electron Limited | Measuring a damaged structure formed on a wafer using optical metrology |
| US7576851B2 (en) * | 2006-03-30 | 2009-08-18 | Tokyo Electron Limited | Creating a library for measuring a damaged structure formed on a wafer using optical metrology |
| JP2008004863A (ja) * | 2006-06-26 | 2008-01-10 | Hitachi High-Technologies Corp | 外観検査方法及びその装置 |
| US8611639B2 (en) * | 2007-07-30 | 2013-12-17 | Kla-Tencor Technologies Corp | Semiconductor device property extraction, generation, visualization, and monitoring methods |
| US8254661B2 (en) | 2008-06-02 | 2012-08-28 | Applied Materials Israel, Ltd. | System and method for generating spatial signatures |
| JP2012150065A (ja) * | 2011-01-21 | 2012-08-09 | Hitachi High-Technologies Corp | 回路パターン検査装置およびその検査方法 |
| US9177370B2 (en) * | 2012-03-12 | 2015-11-03 | Kla-Tencor Corporation | Systems and methods of advanced site-based nanotopography for wafer surface metrology |
| US9064823B2 (en) | 2013-03-13 | 2015-06-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for qualifying a semiconductor wafer for subsequent processing |
| SG11201703585RA (en) * | 2014-11-25 | 2017-06-29 | Kla Tencor Corp | Analyzing and utilizing landscapes |
| CN116936393B (zh) * | 2016-02-24 | 2024-12-20 | 科磊股份有限公司 | 光学计量的准确度提升 |
-
2017
- 2017-12-11 KR KR1020197037472A patent/KR102301556B1/ko active Active
- 2017-12-11 US US15/751,514 patent/US10763146B2/en active Active
- 2017-12-11 CN CN201780090469.0A patent/CN110622287B/zh active Active
- 2017-12-11 DE DE112017007576.9T patent/DE112017007576T5/de active Pending
- 2017-12-11 WO PCT/US2017/065629 patent/WO2018217232A1/en not_active Ceased
- 2017-12-11 JP JP2019564033A patent/JP6864122B2/ja active Active
-
2018
- 2018-05-21 TW TW107117147A patent/TWI768046B/zh active
Also Published As
| Publication number | Publication date |
|---|---|
| KR20200000447A (ko) | 2020-01-02 |
| JP6864122B2 (ja) | 2021-04-21 |
| US10763146B2 (en) | 2020-09-01 |
| TWI768046B (zh) | 2022-06-21 |
| WO2018217232A1 (en) | 2018-11-29 |
| TW201909011A (zh) | 2019-03-01 |
| CN110622287A (zh) | 2019-12-27 |
| US20190088514A1 (en) | 2019-03-21 |
| JP2020522127A (ja) | 2020-07-27 |
| CN110622287B (zh) | 2023-11-03 |
| KR102301556B1 (ko) | 2021-09-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R081 | Change of applicant/patentee |
Owner name: KLA CORPORATION, MILPITAS, US Free format text: FORMER OWNER: KLA-TENCOR CORPORATION, MILPITAS, CALIF., US |
|
| R082 | Change of representative |
Representative=s name: REICHERT & LINDNER PARTNERSCHAFT PATENTANWAELT, DE |
|
| R012 | Request for examination validly filed | ||
| R016 | Response to examination communication | ||
| R079 | Amendment of ipc main class |
Free format text: PREVIOUS MAIN CLASS: H01L0021660000 Ipc: H10P0074000000 |