DE1109424B - Elektronische Divisionseinrichtung fuer Binaerzahlen - Google Patents

Elektronische Divisionseinrichtung fuer Binaerzahlen

Info

Publication number
DE1109424B
DE1109424B DEN13204A DEN0013204A DE1109424B DE 1109424 B DE1109424 B DE 1109424B DE N13204 A DEN13204 A DE N13204A DE N0013204 A DEN0013204 A DE N0013204A DE 1109424 B DE1109424 B DE 1109424B
Authority
DE
Germany
Prior art keywords
digit
circuit
waveform
delay
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEN13204A
Other languages
German (de)
English (en)
Inventor
Christopher Strachey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE1109424B publication Critical patent/DE1109424B/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
    • G06F7/5334—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
    • G06F2207/5352—Non-restoring division not covered by G06F7/5375
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
  • Electrophonic Musical Instruments (AREA)
DEN13204A 1956-01-20 1957-01-19 Elektronische Divisionseinrichtung fuer Binaerzahlen Pending DE1109424B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2036/56A GB857511A (en) 1956-01-20 1956-01-20 Improvements in or relating to dividing multiplying arrangements for electronic digital computing machines

Publications (1)

Publication Number Publication Date
DE1109424B true DE1109424B (de) 1961-06-22

Family

ID=9732475

Family Applications (1)

Application Number Title Priority Date Filing Date
DEN13204A Pending DE1109424B (de) 1956-01-20 1957-01-19 Elektronische Divisionseinrichtung fuer Binaerzahlen

Country Status (5)

Country Link
US (1) US3033457A (en:Method)
DE (1) DE1109424B (en:Method)
FR (1) FR1171473A (en:Method)
GB (1) GB857511A (en:Method)
NL (1) NL213878A (en:Method)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3182180A (en) * 1960-11-17 1965-05-04 Control Data Corp Division system
US3222505A (en) * 1961-11-20 1965-12-07 North American Aviation Inc Division apparatus
CN113391787B (zh) * 2021-06-11 2022-06-14 宁波中车时代传感技术有限公司 一种除法器及除法处理方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2701095A (en) * 1949-02-12 1955-02-01 George R Stibitz Electronic computer for division
NL81109C (en:Method) * 1949-03-14
GB736144A (en) * 1950-08-16 1955-09-07 Remington Rand Inc Binary automatic computer
US2936116A (en) * 1952-11-12 1960-05-10 Hnghes Aircraft Company Electronic digital computer
NL113686C (en:Method) * 1952-12-10
GB796404A (en) * 1953-08-27 1958-06-11 Nat Res Dev Improvements in or relating to electronic digital computing machines
US2928850A (en) * 1955-05-03 1960-03-15 Schering Corp 19-nor-pregnatriene compounds and processes for their manufacture

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

Also Published As

Publication number Publication date
NL213878A (en:Method)
US3033457A (en) 1962-05-08
FR1171473A (fr) 1959-01-27
GB857511A (en) 1960-12-29

Similar Documents

Publication Publication Date Title
DE1549476C3 (de) Anordnung zur Ausführung von Divisionen
DE2658248C2 (en:Method)
DE1169166B (de) Modulí¬9 Pruefzahl-Rechner
DE3524981A1 (de) Anordnung mit einem saettigbaren carry-save-addierer
DE1114050B (de) Elektronischer Gleitkomma-Rechner
DE3447634C2 (en:Method)
DE1524114B2 (de) Adreßrecheneinrichtung fur eine Datenverarbeitungsanlage
DE1109424B (de) Elektronische Divisionseinrichtung fuer Binaerzahlen
DE1524117B1 (de) Datenverarbeitungsanlage mit Umlaufregistern
DE1296426B (de) Tischrechenmaschine
DE2017132A1 (de) Binarer Parallel Addierer
DE1090453B (de) Reihenaddierer fuer in einem Binaercode verschluesselte Dezimalzahlen
DE1549461C3 (en:Method)
DE1094020B (de) Periodisch arbeitende numerische Rechenmaschine
DE2902488C2 (en:Method)
EP0416153B1 (de) Verfahren für Datenverarbeitungsanlagen zur Division von, zu Beginn jeweils normalisierten, beliebig langen Operanden und Divisionswerk zur Durchführung des Verfahrens
DE19632246C1 (de) Verfahren für eine Multiplikationsschaltung zur Multiplikation eines Multiplikanden und eines Multiplikators nach dem Booth-Verfahren in iterativen Schritten
DE1303692C2 (de) Binaerrechner
DE1549485B2 (de) Anordnung zur division binaerer operanden ohne rueckstellung des restes
DE1524146C (de) Divisionseinrichtung
DE1424926B1 (de) Verfahren zur Multiplikation binaerer Zahlen in mehreren Operationsschritten
DE1774483A1 (de) Binaeres Multiplizierwerk
DE1524117C (de) Datenverarbeitungsanlage mit Umlaufregistern
DE19921852A1 (de) Pseudozufallszahlgenerator
DE1424926C (de) Verfahren zur Multiplikation "binarer Zahlen in mehreren Operationsschritten