DE10325513B8 - Verfahren und Vorrichtung zum Erstellen eines Verhaltensaspekts einer Schaltung zur formalen Verifikation - Google Patents

Verfahren und Vorrichtung zum Erstellen eines Verhaltensaspekts einer Schaltung zur formalen Verifikation Download PDF

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Publication number
DE10325513B8
DE10325513B8 DE10325513A DE10325513A DE10325513B8 DE 10325513 B8 DE10325513 B8 DE 10325513B8 DE 10325513 A DE10325513 A DE 10325513A DE 10325513 A DE10325513 A DE 10325513A DE 10325513 B8 DE10325513 B8 DE 10325513B8
Authority
DE
Germany
Prior art keywords
creating
verification circuit
formal verification
behavioral aspect
behavioral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE10325513A
Other languages
English (en)
Other versions
DE10325513B4 (de
DE10325513A1 (de
Inventor
Klaus Dr. Winkelmann
Jörg BORMANN
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mentor Graphics Deutschland GmbH
Original Assignee
Onespin Solutions GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Onespin Solutions GmbH filed Critical Onespin Solutions GmbH
Priority to DE10325513A priority Critical patent/DE10325513B8/de
Priority to US10/855,856 priority patent/US20050010882A1/en
Publication of DE10325513A1 publication Critical patent/DE10325513A1/de
Application granted granted Critical
Publication of DE10325513B4 publication Critical patent/DE10325513B4/de
Publication of DE10325513B8 publication Critical patent/DE10325513B8/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3323—Design verification, e.g. functional simulation or model checking using formal methods, e.g. equivalence checking or property checking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
DE10325513A 2003-06-05 2003-06-05 Verfahren und Vorrichtung zum Erstellen eines Verhaltensaspekts einer Schaltung zur formalen Verifikation Expired - Lifetime DE10325513B8 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE10325513A DE10325513B8 (de) 2003-06-05 2003-06-05 Verfahren und Vorrichtung zum Erstellen eines Verhaltensaspekts einer Schaltung zur formalen Verifikation
US10/855,856 US20050010882A1 (en) 2003-06-05 2004-05-27 Method and device for creating a model of a circuit for the formal verification

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10325513A DE10325513B8 (de) 2003-06-05 2003-06-05 Verfahren und Vorrichtung zum Erstellen eines Verhaltensaspekts einer Schaltung zur formalen Verifikation

Publications (3)

Publication Number Publication Date
DE10325513A1 DE10325513A1 (de) 2004-12-30
DE10325513B4 DE10325513B4 (de) 2006-04-20
DE10325513B8 true DE10325513B8 (de) 2006-08-03

Family

ID=33482585

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10325513A Expired - Lifetime DE10325513B8 (de) 2003-06-05 2003-06-05 Verfahren und Vorrichtung zum Erstellen eines Verhaltensaspekts einer Schaltung zur formalen Verifikation

Country Status (2)

Country Link
US (1) US20050010882A1 (de)
DE (1) DE10325513B8 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1764715B1 (de) * 2005-09-15 2010-11-17 Onespin Solutions GmbH Verfahren zur Bestimmung der Güte einer Menge von Eigenschaften, verwendbar zur Verifikation and zur Spezifikation von Schaltungen
US7458964B2 (en) * 2006-11-01 2008-12-02 Medical Technologies Of Georgia, Inc. Catheter movement control device
US8726205B1 (en) * 2013-04-15 2014-05-13 Nvidia Corporation Optimized simulation technique for design verification of an electronic circuit
US10331829B2 (en) 2015-12-15 2019-06-25 International Business Machines Corporation System design using accurate performance models

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0445942A2 (de) * 1990-03-06 1991-09-11 AT&T Corp. Analytische Entwicklung und Verifizierung von intensiv steuernden Systemen
US6275976B1 (en) * 1996-03-15 2001-08-14 Joseph M. Scandura Automated method for building and maintaining software including methods for verifying that systems are internally consistent and correct relative to their specifications
US6449752B1 (en) * 1999-09-23 2002-09-10 Jason Raymond Baumgartner Digital circuit verification with automated specification enumeration

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5278769A (en) * 1991-04-12 1994-01-11 Lsi Logic Corporation Automatic logic model generation from schematic data base
US5465216A (en) * 1993-06-02 1995-11-07 Intel Corporation Automatic design verification
US5901073A (en) * 1997-06-06 1999-05-04 Lucent Technologies Inc. Method for detecting errors in models through restriction

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0445942A2 (de) * 1990-03-06 1991-09-11 AT&T Corp. Analytische Entwicklung und Verifizierung von intensiv steuernden Systemen
US6275976B1 (en) * 1996-03-15 2001-08-14 Joseph M. Scandura Automated method for building and maintaining software including methods for verifying that systems are internally consistent and correct relative to their specifications
US6449752B1 (en) * 1999-09-23 2002-09-10 Jason Raymond Baumgartner Digital circuit verification with automated specification enumeration

Also Published As

Publication number Publication date
DE10325513B4 (de) 2006-04-20
US20050010882A1 (en) 2005-01-13
DE10325513A1 (de) 2004-12-30

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8327 Change in the person/name/address of the patent owner

Owner name: ONESPIN SOLUTIONS GMBH, 80339 MUENCHEN, DE

8396 Reprint of erroneous front page
8364 No opposition during term of opposition
R081 Change of applicant/patentee

Owner name: ONESPIN SOLUTIONS GMBH, DE

Free format text: FORMER OWNER: ONESPIN SOLUTIONS GMBH, 80339 MUENCHEN, DE

R082 Change of representative

Representative=s name: SONNENBERG HARRISON PARTNERSCHAFT MBB, DE

Representative=s name: 24IP LAW GROUP SONNENBERG FORTMANN, DE

R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: G06F0017500000

Ipc: G06F0030000000

R082 Change of representative

Representative=s name: MAIER, DANIEL OLIVER, DIPL.-ING. UNIV., DE

Representative=s name: SONNENBERG HARRISON PARTNERSCHAFT MBB, DE

Representative=s name: SONNENBERG HARRISON PARTNERSCHAFT MBB PATENT- , DE

R082 Change of representative

Representative=s name: MAIER, DANIEL OLIVER, DIPL.-ING. UNIV., DE

R081 Change of applicant/patentee

Owner name: SIEMENS ELECTRONIC DESIGN AUTOMATION GMBH, DE

Free format text: FORMER OWNER: ONESPIN SOLUTIONS GMBH, 80335 MUENCHEN, DE

R071 Expiry of right