DE10312911B4 - Semiconductor component with space-saving edge termination - Google Patents
Semiconductor component with space-saving edge termination Download PDFInfo
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- DE10312911B4 DE10312911B4 DE10312911A DE10312911A DE10312911B4 DE 10312911 B4 DE10312911 B4 DE 10312911B4 DE 10312911 A DE10312911 A DE 10312911A DE 10312911 A DE10312911 A DE 10312911A DE 10312911 B4 DE10312911 B4 DE 10312911B4
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 158
- 230000002093 peripheral effect Effects 0.000 abstract description 2
- 230000000903 blocking effect Effects 0.000 description 13
- 238000009413 insulation Methods 0.000 description 13
- 230000015556 catabolic process Effects 0.000 description 7
- 239000012774 insulation material Substances 0.000 description 6
- 230000000295 complement effect Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 241001354791 Baliga Species 0.000 description 1
- 230000002730 additional effect Effects 0.000 description 1
- 210000004027 cell Anatomy 0.000 description 1
- 210000003850 cellular structure Anatomy 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0661—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8611—Planar PN junction diodes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- Thyristors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Halbleiterbauelement,
das folgende Merkmale aufweist:
– einen Halbleiterkörper (100)
mit einer ersten und zweiten Seite (101, 102) und einem Rand (105),
sowie einer Innenzone (103) und einer zwischen der Innenzone (103)
und dem Rand (105) angeordneten Randzone (104),
– eine erste
Halbleiterzone (20) eines ersten Leitungstyps in der Innenzone (103)
und der Randzone (104) und wenigstens eine zweite Halbleiterzone
(30) eines zweiten Leitungstyps, wobei zwischen der ersten und zweiten
Halbleiterzone (20, 30) ein Halbleiterübergang in der Innenzone (103)
gebildet ist, gekennzeichnet durch,
– eine auf den Rand (105) aufgebrachte
elektrisch isolierende Schicht (50),
– wenigstens zwei in der Randzone
(104) beabstandet zueinander angeordnete, sich an den Rand anschließende dritte
Halbleiterzonen des zweiten Leitungstyps.Semiconductor device having the following features:
- A semiconductor body (100) having a first and second side (101, 102) and an edge (105), and an inner zone (103) and between the inner zone (103) and the edge (105) arranged edge zone (104),
A first semiconductor zone (20) of a first conductivity type in the inner zone (103) and the peripheral zone (104) and at least one second semiconductor zone (30) of a second conductivity type, wherein between the first and second semiconductor zone (20, 30) a semiconductor junction in the Inner zone (103) is formed, characterized by,
An electrically insulating layer (50) applied to the edge (105),
- At least two in the edge zone (104) spaced from each other, adjoining the edge third semiconductor zones of the second conductivity type.
Description
Die vorliegende Erfindung betrifft ein vertikales Halbleiterbauelement gemäß den Merkmalen des Oberbegriffs des Anspruchs 1, das einen Halbleiterkörper mit einer ersten und zweiten Seite und einem Rand, sowie einer Innenzone und einer zwischen der Innenzone und dem Rand angeordneten Randzone aufweist, wobei eine erste Halbleiterzone eines ersten Leitungstyps in der Innenzone und der Randzone und wenigstens eine zweite Halbleiterzone eines zweiten Leitungstyps derart angeordnet ist, dass zwischen der ersten und zweiten Halbleiterzone ein Halbleiterübergang in der Innenzone gebildet ist.The The present invention relates to a vertical semiconductor device according to the characteristics of the preamble of claim 1, comprising a semiconductor body a first and second side and a rim, and an inner zone and an edge zone arranged between the inner zone and the edge, wherein a first semiconductor region of a first conductivity type in the Inner zone and the edge zone and at least one second semiconductor zone a second conductivity type is arranged such that between the first and second semiconductor zone, a semiconductor junction is formed in the inner zone.
Eine derartige Bauelementstruktur mit einem Halbleiterübergang in der Innenzone findet sich sowohl bei bipolaren Bauelementen, wie Dioden, Bipolartransistoren und IGBT als auch bei unipolaren Bauelementen, wie MOSFET. Diese Bauelemente unterscheiden sich zwar bezüglich ihres Verhaltens in leitend angesteuertem Zustand, im sperrenden Zustand ist diesen Bauelementen jedoch gemeinsam, dass sich ausgehend von dem sperrend gepolten Halbleiterübergang mit zunehmender Sperrspannung eine Raumladungszone ausbreitet.A such device structure with a semiconductor junction in the inner zone is found both in bipolar devices, such as diodes, bipolar transistors and IGBTs as well as unipolar devices, like MOSFET. Although these components differ in terms of their Behavior in a conducting state, in a blocking state However, these components in common that starting from the blocking-poled semiconductor junction with increasing blocking voltage propagates a space charge zone.
Ohne zusätzliche Maßnahmen ist bei derartigen Bauelementen bekanntlich die Spannungsfestigkeit in der Randzone geringer als in der Innenzone. Um die Spannungsfestigkeit im Randbereich zu erhöhen und dadurch bei Erreichen einer maximalen Sperrspannung einen Spannungsdurchbruch in der flächenmäßig größeren Innenzone zu erreichen sind unterschiedlichste Randabschlüsse bekannt. Bei derartigen Randabschlüssen, die ausführlich in Baliga: "Power Semiconductor Devices", PWS Publishing, 1995, Seiten 81 bis 110, beschrieben sind, unterscheidet man planare Randabschlüsse, die beispielsweise sogenannte dotierte Feldringe um die Innenzone oder Feldplatten oberhalb der Seiten des Halbleiterkörpers umfassen, und abge schrägte Randabschlüsse, die durch Abschrägen des Randes gebildet sind. Planare und abgeschrägte Abschlüsse können kombiniert werden.Without additional activities is known in such devices, the dielectric strength lower in the marginal zone than in the inner zone. To the dielectric strength to increase in the edge area and thereby a voltage breakdown when reaching a maximum reverse voltage in the area larger inner zone To achieve a variety of edge statements are known. In such Margin accounts, the detailed in Baliga: "Power Semiconductor Devices ", PWS Publishing, 1995, pages 81 to 110 planar edges, for example, the so-called doped field rings around the inner zone or field plates above the sides of the semiconductor body, and abge beveled edge finishes, the by beveling of the edge are formed. Planar and beveled statements can be combined.
Aufgabe der Randabschlüsse ist es dabei, bei Anliegen einer Sperrspannung die Krümmung des Feldlinienverlaufes im Randbereich zu reduzieren und die auftretenden Feldstärken im Randbereich gegenüber den auftretenden Feldstärken im Innenbereich zu reduzieren.task the edge finishes It is, if there is a blocking voltage, the curvature of the Reduce field line history in the border area and the occurring field strengths in the border area opposite the field strengths occurring indoors to reduce.
In
Besonders planare Randabschlüsse, die gegenüber abgeschrägten Abschlüssen den Vorteil besitzen, dass sie mittels herkömmlicher Dotierungs- und Abscheideschritte herstellbar sind, sind allerdings sehr platzaufwendig. Das heißt, sie erfordern zwischen der für aktive Bauelementbereiche genutzten Innenzone und dem Rand eine breite Randzone, wodurch ein nicht unerheblicher Teil der Chipfläche nicht für aktive Bauelementbereiche zur Verfügung steht.Especially planar edge finishes, the opposite bevelled statements have the advantage that they by means of conventional doping and deposition steps can be produced, but are very space consuming. That means, you require between for active component areas used inner zone and the edge one wide edge zone, whereby a not insignificant part of the chip area is not for active Component areas is available.
In
Ziel der vorliegenden Erfindung ist es, ein vertikales Halbleiterbauelement mit einem platzsparenden Randabschluss zur Verfügung zu stellen. Dieses Ziel wird durch Bauelemente gemäß der Merkmale des Anspruchs 1 erreicht.aim It is the object of the present invention to provide a vertical semiconductor device to provide with a space-saving edge termination. This goal is characterized by components according to the features of claim 1 achieved.
Vorteilhafte Ausgestaltungen der Erfindung sind Gegenstand der Unteransprüche. Das erfindungsgemäße Halbleiterbauelement umfasst einen Halbleiterkörper, der eine erste und zweite Seite und einen Rand, sowie eine Innenzone und eine zwischen der Innenzone und dem Rand angeordnete Randzone aufweist und der eine erste Halbleiterzone eines ersten Leitungstyps in der Innenzone und der Randzone und wenigstens eine zweite Halbleiterzone eines zweiten Leitungstyps aufweist, wobei zwischen der ersten und zweiten Halbleiterzone ein Halbleiterübergang in der Innenzone gebildet ist. Dieses Bauelement weist weiterhin eine auf den Rand aufgebrachte elektrisch isolierende Schicht und wenigstens zwei in der Randzone beabstandet zueinander angeordnete, sich an den Rand anschließende dritte Halbleiterzonen des zweiten Leistungstyps auf.advantageous Embodiments of the invention are the subject of the dependent claims. The Semiconductor device according to the invention comprises a semiconductor body, the first and second sides and an edge, and an inner zone and an edge zone disposed between the inner zone and the rim and a first semiconductor zone of a first conductivity type in the inner zone and the peripheral zone and at least one second semiconductor zone a second conductivity type, wherein between the first and second semiconductor zone formed a semiconductor junction in the inner zone is. This device further has an applied to the edge electrically insulating layer and at least two in the edge zone spaced from one another, adjoining the edge third Semiconductor zones of the second power type on.
Bei diesem Bauelement schließt sich an die erste Halbleiterzone vorzugsweise eine stärker als die erste Halbleiterzone dotierte Schicht des ersten oder zweiten Leitungstyps an, wobei der Rand im Bereich dieser stärker dotierten Zone vorzugsweise eine Stufe aufweist.at this component closes preferably one stronger than the first semiconductor zone first semiconductor zone doped layer of the first or second conductivity type , wherein the edge in the region of this more heavily doped zone preferably a Stage has.
Selbstverständlich kann dieses Bauelement als Kompensationsbauelement mit in der Driftzone abwechselnd angeordneten Zonen des ersten und zweiten Leistungstyps ausgebildet sein. Außerdem kann dieses Bauelement als Diode, Bipolartransistor, MOSFET oder Thyristor ausgebildet sein.Of course you can this component as Kompensationsbauelement with alternating in the drift zone arranged zones of the first and second power type formed be. In addition, can this device as a diode, bipolar transistor, MOSFET or thyristor be educated.
Die vorliegende Erfindung wird nachfolgend in Ausführungsbeispielen anhand von Figuren näher erläutert. In den Figuren zeigtThe The present invention will be described below in exemplary embodiments with reference to FIG Figures explained in more detail. In the figures shows
In den Figuren bezeichnen, sofern nicht anders angegeben, gleiche Bezugszeichen gleich Teile und Halbleiterbereiche mit gleicher Bedeutung.In denote the figures, unless otherwise indicated, like reference numerals equal parts and semiconductor regions with the same meaning.
Die
p-dotierte zweite Halbleiterzone
Das
Bauelement umfasst im Randbereich einen Graben
Anschließend an
den Graben
Der
Graben
Der
Randabschluss mit dem Graben
Bei
Anlegen einer Sperrspannung zwischen dem Anodenanschluss A und dem
Kathodenanschluss K bzw. zwischen der zweiten Halbleiterzone
Zusammenfassend
ist festzuhalten, dass der Graben
Wie
für ein
veranschaulichendes Beispiel in dem Querschnitt in
Wenngleich
der Randabschluss in
Bei
dem Bauelement gemäß
Im
Randbereich
An
die Driftzone
Die
gestrichelte Linie im Randbereich
Der
Graben
Entlang
beider Seiten des Grabens
Der
Randabschluss mit wenigstens einem sich in den Halbleiterkörper
Das
Randabschlusskonzept mit einer in vertikaler Richtung eines Halbleiterkörpers verlaufenden Isolationsschicht
und sich einer an die Isolationsschicht anschließenden wenigstens einen Feldringzone
erfordert nicht notwendigerweise einen sich in den Halbleiterkörper hinein
erstreckenden Graben, wie nachfolgend anhand des veranschaulichenden Beispiels
in
- 100100
- HalbleiterkörperSemiconductor body
- 101101
- Vorderseite des Halbleiterkörpersfront of the semiconductor body
- 102102
- Rückseite des Halbleiterkörpersback of the semiconductor body
- 105105
- Randedge
- 103103
- Innenzoneinner zone
- 104104
- Randzoneborder zone
- 4040
- Grabendig
- 50, 5250, 52
- Isolationsmaterialinsulation material
- AA
- Anodenanschlussanode
- KK
- Kathodenanschlusscathode
- SS
- Source-AnschlussSource terminal
- GG
- Gate-AnschlussGate terminal
- DD
- Drain-AnschlussDrain
- 60–6860-68
- FeldringzonenField ring zones
- 2020
- erste Halbleiterzone, Driftzonefirst Semiconductor zone, drift zone
- 3030
- zweite Halbleiterzone, Anodenzonen, Bodyzonesecond Semiconductor zone, anode zones, body zone
- 7070
- vierte Halbleiterzone, Kathodenzone, Drainzonefourth Semiconductor zone, cathode zone, drain zone
- 3535
- fünfte Halbleiterzone, Source-Zonefifth semiconductor zone, Source zone
- 9090
- Gate-ElektrodeGate electrode
- 9292
- Soruce-ElektrodeSoruce electrode
- 105A105A
- vertikaler Randabschnittvertical edge section
- 105B105B
- lateraler Randabschnittlateral edge section
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10312911A DE10312911B4 (en) | 2003-03-22 | 2003-03-22 | Semiconductor component with space-saving edge termination |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10312911A DE10312911B4 (en) | 2003-03-22 | 2003-03-22 | Semiconductor component with space-saving edge termination |
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US7595238B2 (en) * | 2006-07-10 | 2009-09-29 | Fuji Electric Holdings Co., Ltd. | Trench MOS type silicon carbide semiconductor device and method for manufacturing the same |
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JP4734968B2 (en) * | 2005-03-04 | 2011-07-27 | トヨタ自動車株式会社 | Insulated gate semiconductor device |
JP4923416B2 (en) * | 2005-03-08 | 2012-04-25 | 富士電機株式会社 | Super junction semiconductor device |
DE102005041838B3 (en) * | 2005-09-02 | 2007-02-01 | Infineon Technologies Ag | Semiconductor component with space saving edge structure with more highly doped side region |
DE102006036347B4 (en) | 2006-08-03 | 2012-01-12 | Infineon Technologies Austria Ag | Semiconductor device with a space-saving edge structure |
US9252251B2 (en) | 2006-08-03 | 2016-02-02 | Infineon Technologies Austria Ag | Semiconductor component with a space saving edge structure |
DE102007030755B3 (en) * | 2007-07-02 | 2009-02-19 | Infineon Technologies Austria Ag | Semiconductor device having a trench edge having edge and method for producing a border termination |
KR101220568B1 (en) * | 2008-03-17 | 2013-01-21 | 미쓰비시덴키 가부시키가이샤 | Semiconductor device |
JP2011066207A (en) * | 2009-09-17 | 2011-03-31 | Mitsubishi Electric Corp | Semiconductor device |
JP2011114028A (en) * | 2009-11-24 | 2011-06-09 | Toyota Motor Corp | SiC SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE SAME |
JP5812029B2 (en) | 2012-06-13 | 2015-11-11 | 株式会社デンソー | Silicon carbide semiconductor device and manufacturing method thereof |
JP2014195089A (en) * | 2014-04-28 | 2014-10-09 | Toshiba Corp | Semiconductor device |
CN107293491A (en) * | 2016-04-12 | 2017-10-24 | 北大方正集团有限公司 | The preparation method of VDMOS device |
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