DE10297597T5 - Suspendieren der Ausführung eines Threads in einem Mehrfach-Thread-Prozessor - Google Patents

Suspendieren der Ausführung eines Threads in einem Mehrfach-Thread-Prozessor Download PDF

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Publication number
DE10297597T5
DE10297597T5 DE10297597T DE10297597T DE10297597T5 DE 10297597 T5 DE10297597 T5 DE 10297597T5 DE 10297597 T DE10297597 T DE 10297597T DE 10297597 T DE10297597 T DE 10297597T DE 10297597 T5 DE10297597 T5 DE 10297597T5
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DE
Germany
Prior art keywords
thread
processor
resources
instruction
several
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE10297597T
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German (de)
English (en)
Inventor
Deborah Portland Marr
Scott Hillsboro Rodgers
David Cornelius Hill
Shivananden Portland Kaushik
James Banks Crossland
David Portland Koufaty
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Intel Corp
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Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE10297597T5 publication Critical patent/DE10297597T5/de
Ceased legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30076Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/3009Thread control instructions
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/3012Organisation of register space, e.g. banked or distributed register file
    • G06F9/30123Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854Instruction completion, e.g. retiring, committing or graduating

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
DE10297597T 2001-12-31 2002-12-11 Suspendieren der Ausführung eines Threads in einem Mehrfach-Thread-Prozessor Ceased DE10297597T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/039,777 2001-12-31
US10/039,777 US20030126416A1 (en) 2001-12-31 2001-12-31 Suspending execution of a thread in a multi-threaded processor
PCT/US2002/039790 WO2003058434A1 (en) 2001-12-31 2002-12-11 Suspending execution of a thread in a multi-threaded

Publications (1)

Publication Number Publication Date
DE10297597T5 true DE10297597T5 (de) 2005-01-05

Family

ID=21907295

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10297597T Ceased DE10297597T5 (de) 2001-12-31 2002-12-11 Suspendieren der Ausführung eines Threads in einem Mehrfach-Thread-Prozessor

Country Status (8)

Country Link
US (1) US20030126416A1 (https=)
JP (1) JP2005514698A (https=)
KR (1) KR100617417B1 (https=)
CN (1) CN1287272C (https=)
AU (1) AU2002364559A1 (https=)
DE (1) DE10297597T5 (https=)
TW (1) TW200403588A (https=)
WO (1) WO2003058434A1 (https=)

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US8578394B2 (en) * 2011-09-09 2013-11-05 Microsoft Corporation Exempting applications from suspension
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US10346195B2 (en) * 2012-12-29 2019-07-09 Intel Corporation Apparatus and method for invocation of a multi threaded accelerator
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Also Published As

Publication number Publication date
TW200403588A (en) 2004-03-01
AU2002364559A1 (en) 2003-07-24
HK1075109A1 (en) 2005-12-02
CN1608246A (zh) 2005-04-20
CN1287272C (zh) 2006-11-29
KR20040069352A (ko) 2004-08-05
KR100617417B1 (ko) 2006-08-30
JP2005514698A (ja) 2005-05-19
US20030126416A1 (en) 2003-07-03
WO2003058434A1 (en) 2003-07-17

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