DE10080443B4 - Device for measuring a jitter - Google Patents

Abstract

Device for measuring the jitter of an input signal, comprising:
Analytic signal conversion means (11) for transforming the input signal into a complex analytic signal;
Instantaneous phase estimation means (12) for detecting the instantaneous phase of the input signal from the analytic signal;
Linear phase removing means (13) for detecting a linear phase component of the instantaneous phase and for removing the linear phase component from the instantaneous phase to obtain a phase noise waveform; and
Jitter detection means (14, 15, 73) for detecting the jitter of the input signal from the phase noise waveform.

Description

Reference to related applications

These Application is a continuation-in-part application of the US patent application with serial number 09/246 458 filed on 08 February 1999.

Background of the invention

1. Field of the invention

The The present invention relates to a device for measuring a Jitters in a microcomputer. More specifically, the present invention relates Invention an apparatus for measuring a jitter in a in a clock generating circuit used in a microcomputer.

2. Description of the state of the technique

In the last 30 years, the number of transistors on a VLSI (very large scale integrated circuit) chip has increased exponentially according to Moore's Law, and the clock frequency of a microcomputer has also increased exponentially according to Moore's Law. At present, the clock rate is about to exceed the 1.0 GHz limit (see, eg, Naoaki Aoki, HP Hofstee, and S. Dong; "GHz MicroProcessor,""InformationProcessing," Volume 39, No. 7, July 1998). , 1 Figure 4 is a graph showing the evolution of the clock period in a microcomputer published in the Semiconductor Industry Association: "The National Technology Roadmap for Semiconductors, 1997." In 1 is also an RMS jitter (effective jitter) applied.

In A communication system becomes a carrier frequency and a carrier phase or symbol timing by applying non-linear operations to a received signal and by inputting the result of non-linear process into a phase-locked loop circuit (PLL) regenerated. This regeneration corresponds to the maximum likelihood parameter estimation. If but a carrier or a data value from the received signal due to an influence from noise or the like can not be correctly regenerated, can be a retransmission be requested by the sender. In a communication system is a clock generator on one separate from the other components Chip formed. This clock generator is on a VLSI chip under Use of bipolar technology, GaAs technology or CMOS technology educated.

In many microcomputers, the execution of a command is controlled by a clock signal having a constant period. The clock period of this clock signal corresponds to a cycle time of a microcomputer. (See, for example, Mike Johnson, "Superscale Microprocessor Design", Prentice-Hall, Inc., 1991). If the clock period is too short, synchronous operation becomes impossible and the system locks. In a microcomputer, a clock generator on the same chip is integrated with other logic circuits. 2 shows as an example a Pentium chip. In 2 a white square () denotes a clock generating circuit. This microprocessor is manufactured using a CMOS (complementary metal-oxide semiconductor) process.

In A communication system is the average jitter or the RMS jitter important. The RMS jitter contributes to an average Noise of the signal-to-noise ratio at and increased the bit error rate. On the other hand, determined in a microcomputer the worst momentary value of some parameters is the working frequency. This means, the peak-to-peak or peak-to-peak jitter (the worst value of the jitter) determines the upper limit of the Operating frequency.

Therefore is for the exam a PLL circuit in a microcomputer a method for accurate measurement an instantaneous value of the jitter needed in a short period of time. There Jitter measurement in the field of communication has been developed is, there is currently no measuring method, which corresponds to this requirement in the field of microcomputers. It is an object of the present invention to provide a method for precise and rapid measurement of an instantaneous value of the jitter.

On the other hand, to test a PLL circuit in a communication system, a method of accurately measuring an RMS jitter is needed. A measuring method exists and is used in practice, but it takes about 10 minutes of measurement time. 3 shows a comparative overview of clock generators in a microcomputer and a communication system.

A phase locked loop (PLL loop) is a feedback system. In a PLL circuit, a frequency and a phase θ _{i of} a given reference signal are compared with a frequency and a phase θ _{0 of} an internal signal source to control the internal signal source by utilizing the differences therebetween so as to minimize the frequency difference or the phase difference can. Therefore, a voltage controlled oscillator (VCO), which is an internal signal source of a PLL circuit, includes a component or components whose delay time is variable. When a DC voltage is input to this oscillator, a recurring waveform having a constant period proportional to the DC value is output.

The PLL circuit relating to the present invention comprises a phase-frequency detector, a charge pump circuit, a loop filter and a VCO. 4 shows a basic circuit configuration of a PLL circuit in block diagram form. The operation of each of the circuit components will be briefly described below.

A phase-frequency detector is a digital sequential circuit. 5 Fig. 10 is a block diagram showing a circuit configuration of a phase-frequency detector comprising two D-type flip-flops D-FF1 and D-FF2 and one AND-gate. A reference clock is applied to a clock terminal ck of the first D flip-flop D-FF1, and a PLL clock is applied to a clock terminal ck of the second D flip-flop D-FF2. A logical value "1" is supplied to each data input terminal d.

If in the circuit configuration described above, the two Q outputs both flipflops simultaneously become "1", that sets AND gate both flip flops back. The phase-frequency detector gives in dependence from the phase difference and the frequency difference between the two Input signals an UP signal to increase the frequency or an AB signal to reduce the frequency. (See, for example, R. Jacob Baker, Henry W. Li and David E. Boyce; "CMOS Circuit Design, Layout, and Simulation ", IEEE Press, 1998).

• (i) Der Phase-Frequenz-Detektor arbeitet an einer steigenden Flanke eines Eingabetaktes und ist nicht auf die Gestalt der Wellenform wie etwa eine Pulsbreite des Taktes bezogen.
• (ii) Der Phase-Frequenz-Detektor koppelt nicht an eine Harmonische der Referenzfrequenz.
• (iii) Da in einem Zeitraum, in dem die Schleife gekoppelt ist, beide Ausgaben logisch "0" sind, wird an der Ausgabe des Schleifenfilters keine Restwelligkeit erzeugt.

6 shows a state transition diagram of a phase-frequency detector (PFD). The phase-frequency detector changes state on rising edges of a reference clock and a PLL clock. If z. B. as in 7 If the frequency of a reference clock is 40 MHz and the frequency of a PLL clock is 37 MHz, an UP signal is output to increase the frequency during a time interval between the two rising edges. A corresponding operation is also performed when there is a phase difference between the reference clock and the PLL clock. The phase-frequency detector has the following features as compared with a phase detector employing an exclusive-OR circuit (see, for example, Jacob Baker, Henry W. Li, and David E. Boyce; "CMOS Circuit Design, Layout and Simulation ", IEEE Press, 1998.)

• (i) The phase-frequency detector operates on a rising edge of an input clock and is not related to the shape of the waveform, such as a pulse width of the clock.
• (ii) The phase-frequency detector does not couple to a harmonic of the reference frequency.
• (iii) Since in a period in which the loop is coupled, both outputs are logic "0", no ripple is produced at the output of the loop filter.

• (iv) ist der Phase-Frequenz-Detektor empfindlich gegen Rauschen.

The phase-frequency detector is highly sensitive to a flank. If an edge of a reference clock can not be detected due to noise, the phase-frequency detector remains stuck in a state. On the other hand, with a phase detector based on an exclusive-OR circuit, the average output is 0 (zero) even if no edge can be detected. Therefore

• (iv) the phase-frequency detector is sensitive to noise.

A charge pump circuit converts the UP and DOWN logic signals from the Phase Frequency Detector (PFD) to specific analog signal levels (i _p , -i _p, and 0). The reason for this implementation is that, because the signal amplitude within a digital circuit has a large tolerance width, conversion to a specific analog signal level is necessary. (See, for example, Floyd M. Gardner, "Phaselock Techniques," 2nd Edition, John Wiley & Sons, 1979, and Heinrich Meyr and Gerd Ascheid, "Synchronization in Digital Communications," Volume 1, John Wiley & Sons, 1990 .)

As in 8A As shown, a charge pump circuit comprises two current sources. In order to simplify the model circuit, it is assumed in this case that each of the current sources has the same current value I _p . In order to easily describe an output current i _{p of} the charge pump circuit, a negative pulse width is introduced as in 8B shown. The logical signals UP and DOWN open and close switches S ₁ , S ₂ . That is, the logic signal UP closes the switch S ₁ during a period of positive pulse width τ, and the logic signal AB closes the switch S ₂ during a period of negative pulse width τ. Therefore, the output current i _p during the time period of pulse width τ is given by the following equation. i p = I p sgn (τ) (2.1.1)

Otherwise, the output current i _{p is} as follows. i p = 0 (2.1.2) (See, eg, Mark Van Paemel, "Analysis of Charge-Pump PLL: A New Model," IEEE Trans. Commun., Vol. 42, pp. 2490-2498, 1994.)

In this case, sgn (τ) is a sign function. The function sgn (τ) assumes a value of + 1 when τ is positive, and assumes a value of -1 when τ is negative. When the two switches S ₁ and S _{2 are} open, no current flows. Therefore, the output node is in a high impedance state.

A loop filter converts a current i _{p of} the charge pump circuit into an analog voltage _value V _CTRL . As in 9A As shown, a first-order loop filter can be constructed by connecting a resistor R ₂ and a capacitor C in series. When a constant current given by equations (2.1.1) and (2.1.2) is input to the filter, an electric charge proportional to a period of time is charged into the capacitor C. That is, as in 9B As shown, the control voltage V _{CTRL changes} linearly during the time period τ. In the other time period, the control voltage V _CTRL remains constant (see, for example, the literature by Mark van Paemel).

The resistance value and the capacitance value of the loop filter are selected so that a damping coefficient and a natural frequency are optimized. (See, e.g., Jose Alvarez, Hector Sanchez, Gianfranco Gerosa and Roger Countryman, "A Wide-bandwidth Low-Voltage PLL for Power PC Microprocessors", IEEE J. Solid-State Circuits, Vol. 30, pp. 383-391, 1995 and Behzad Razavi, "Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design," IEEE Press, 1996.) In the present invention, the loop filter is configured as a passive weighted-field filter, as in U.S. Pat 10 according to a work by Ronald E. Best listed below (see Ronald E. Best, "Phase-Locked Loops", 3rd Ed., McGraw-Hill, 1997). As disclosed in this paper by Ronald E. Best, the combination of a phase-frequency detector with a passive weighted filter has an infinite range of sync and hold, so there is no advantage in using another type of filter. In 10 C = 250 pF, R ₁ = 920 Ω and R ₂ = 360 Ω are set. The VCO is, as in 11 constructed of thirteen stages of CMOS inverters IN-1, IN-2, ... and IN-13. The supply voltage is 5 V.

The linear characteristic of the voltage-controlled oscillator VCO is given by the following equation. f VCO = K VCO V CTRL (2.3)

In this case, K _{VCO is} a gain of the VCO, and its unit is Hz / V.

When the PLL is in a synchronous state (a state where a rising edge of a reference clock coincides with a rising edge of a PLL clock), the phase-frequency detector does not output a signal. The charge pump circuit, the loop filter and the VCO provided in the rear stages of the PLL do not transmit / receive signals and maintain the internal state unchanged. Conversely, if a rising edge of a reference clock does not match a rising edge of a PLL clock (in the asynchronous state), the phase-frequency detector outputs an UP signal or an AB signal to change the oscillation frequency of the VCO. As a result, the charge pump circuit, the loop filter, and the VCO provided in the rear stages of the PLL circuit send / receive signals and go into a corresponding state. From this one could conclude that in order to measure an internal noise of the PLL circuit, the PLL circuit ge in a synchronous state ge must be brought. In contrast, to check a short-circuit failure or a delay failure of the PLL circuit, the PLL circuit must be brought into a different state.

Now becomes a random one Jitter described.

A jitter on a clock appears as a fluctuation of a rise time and a fall time of a series of clock pulses. For this reason, when a clock signal is transmitted, the reception time or the pulse width of the clock pulse becomes uncertain (see, for example, Ron K. Poon, "Computer Circuits Electrical Design", Prentice-Hall, Inc. 1995.) 12 shows jitter of a rise time period and a fall time period of a series of clock pulses.

Each component in the in 4 The blocks shown have the potential to generate jitter. Among these components, the most important factors for jitter are thermal noise and shot noise of the inverters forming the VCO. (See, for example, Todd C. Weigandt, Beomsup Kim and Paul R. Gray, "Analysis of Timing Jitter in CMOS Ring Oscillators", International Symposium on Circuits and System, 1994.) Therefore, the jitter generated by the VCO is a random fluctuation and does not depend on the input. In the present invention, assuming that the main jitter source is the VCO, it is assumed that the measurement of random jitter of an oscillation waveform of the VCO is the most important problem to be solved.

In order to measure only a random jitter of an oscillation waveform of the VCO, it is necessary that the PLL circuit keep all components other than the VCO inactive. Therefore, as mentioned above, it is important that a reference input signal to be supplied to the PLL circuit strictly maintain a constant period, so that the PLL circuit under test does not induce a phase error. One concept of this measurement method is in 13 shown.

In preparation for discussing phase noise, a zero crossing is defined. Assuming that the minimum value -A of a cosine wave A cos (2πf ₀ t) is 0% and the maximum value + A thereof is 100%, a level of 50% corresponds to a zero amplitude. A point where the waveform crosses a zero level is called a zero crossing.

Phase noise is discussed with reference to a cosine wave generated by an oscillator as an example. An ideal oscillator output signal X _IDEAL (t) is an ideal cosine wave without distortion. X DEAL (t) = A c cos (2πf c t + θ c ) (2.4)

In this case, A _c and f _{c are} nominal values of amplitude and frequency, respectively, and θ _c is an original phase angle. When the output signal X _IDEAL (t) is observed in the frequency domain, the output signal is measured as a line spectrum as shown in FIG 14 shown. The actual oscillator has some deviations from the nominal values. In this case, the output signal is expressed as follows. X OSC (t) = [A c + ε (t)] cos (2πf c t + θ c + Δφ (t)) (2.5.1) X OSC (t) = A c cos (2πf c t + θ c + Δφt)) (2.5.2)

In the above equations, ε (t) represents an amplitude fluctuation. In the present invention, the discussion is made on the assumption that, as shown in Equation (2.5.2), the amplitude fluctuation ε (t) of the oscillator is zero. In the above equations, Δφ (t) represents a phase fluctuation. That is, Δφ (t) is a term for modulating the ideal cosine wave. The original phase angle θ _c follows a uniform distribution in the range of an interval (0.2 π). The phase fluctuation Δπ (t), however, is a random data value and follows z. B. a Gaussian distribution. This Δφ (t) is called phase noise.

In 15 An output signal X _IDEAL (t) of an ideal oscillator and an output signal X _OSC (t) of an actual oscillator are plotted. Comparing these signals with each other, it can be seen that the zero crossing of X _OSC (t) is changed by Δφ (t).

If, on the other hand, as in 16 As shown, when the oscillation signal X _OSC (t) is transformed into the frequency domain, the influence of phase noise as a spectrum broadening near the nominal frequency f ₀ is observed. If 15 With 16 It can be said that it is easier to observe the influence of phase noise in the frequency domain. However, even if the in 12 shown clock pulse is transformed into the frequency domain, the maximum value of Pulsbereitenflktuation not be estimated. This is because the transformation is a process of averaging the fluctuation at certain frequencies, and in the summation step of the process, the maximum value and the minimum value cancel each other out. Therefore, in a process for estimating the peak-to-peak jitter that is the subject of the present invention, a time-domain process must be the core of the process.

Here, it is made clear that additive noise at the reference input end of the PLL circuit is equivalent to additive noise at the input end of the loop filter. (See Floyd M. Gardner, "Phaselock Techniques," 2nd Edition, John Wiley & Sons, 1979, and John G. Proakis, "Digital Communications," 2nd Edition, McGraw-Hill, 1989.) 17 shows additive noise at the reference input end of the PLL circuit. To simplify the calculation, it is assumed that a phase detector of the PLL circuit is a sine wave phase detector (mixer).

The PLL circuit is phase locked to a given reference signal expressed by the following equation (2.6). X ref (t) = A c cos (2.pi.f c t) (2.6)

In this case, it is assumed that the following additive noise expressed by the equation (2.7) is added to this reference signal X _ref (t). X noise (t) = n i (t) cos (2πf c t) - n q (t) sin (2πf c t) (2.7) X VCO (t) = cos (2πf c t + Δφ) (2.8)

An oscillation waveform of the VCO expressed by the above equation (2.8) and the reference signal X _ref (t) + X _noise (t) are input to the phase detector to be converted into a difference frequency component.

In this case, K _{PD is} a phase comparator gain. It is therefore to be understood that the additive noise of the reference signal is equivalent to supplying an additive noise given by the following equation (2.10) to an input end of the loop filter.

18 shows additive noise at the input end of the loop filter. When a spectral power density of the additive noise at the reference input end of the PLL circuit is assumed to be N ₀ [V ² / Hz], the spectral power density G _nn (f) of the additive noise at the input end of this loop filter is from equation (2.10) by the following Given equation (2.11).

Besides that is to see from equation (2.9) that if a phase difference Δφ between the oscillation waveform of the VCO and the reference signal π / 2, an output of the phase detector becomes zero. That is, if a sine wave phase detector is used, then the VCO is with phase locked to the reference signal when the phase of the VCO by 90 ° against the phase of the reference signal is shifted. Also, in this calculation the additive noise is neglected.

Next, using an in 17 The model of equivalent additive noise shown illustrates an amount of jitter caused by additive noise. (See Heinrich Meyr and Gerd Ascheid, "Synchronization in Digital Communications," Volume 1, John Wiley & Sons, 1990). To the off To simplify printing, assuming that θ _i = 0, the phase θ _{0 of} the output signal corresponds to an error. A phase spectrum of the oscillation waveform of the VCO is given by the equation (2.12). G θ₀θ₀ (f) = | H (f) | 2 G nn (f) (2.12)

In In this case, H (f) is a transfer function of the PLL circuit.

Since a phase error -θ is ₀ , a variance of the phase error is given by the following equation (2.14).

By doing equation (2.11) for Equation (2.14) uses the following two equations receive.

groß ist, wird das Phasenrauschen klein. In diesem Fall ist B_e eine äquivalente Rauschbandbreite der Schleife.That is, if a signal to noise ratio of the loop

is large, the phase noise becomes small. In this case, B _{e is} an equivalent noise bandwidth of the loop.

As described above, an additive noise at the reference input end the PLL circuit or an additive noise at the input end of the Loop filter observed as an output phase noise, the a low-pass filter corresponding to one of the loop characteristics conducted Component is. The power of the phase noise is inversely proportional to the signal-to-noise ratio of PLL loop.

Next, it will be discussed how phase noise caused by internal noise of the VCO affects the phase of the output signal of the PLL. (See Heinrich Meyr and Gerd Ascheid, "Synchronization in Digital Communications," Vol. 1, John Wiley & Sons, 1990). It is assumed that the output signal of the VCO is given by the following equation (2.16). X VCO'noise = A c cos (2.pi.f c t + θ p (t) + (t)) (2.16)

In this case, θ _p (t) is a phase of an ideal VCO. An internal thermal noise or the like generates ψ (t). The generated ψ (t) is an internal phase noise and causes the phase of the VCO to fluctuate randomly. 19 shows a model of the internal phase noise of the VCO. A phase θ _P (S) at the output end of the ideal VCO is given by Equation (2.17).

In this case, Φ (t) is a phase error and corresponds to an output of the phase detector. Φ (s) = θ i (s) - θ O (s) = θ i (s) - (θ p (s) + ψ (s)) (2.18)

Taking the θ _P (S) of equation (2.17) for that of equation (2.18), the following equation (2.19) is obtained.

The The following equation (2.20.1) can be obtained by rearranging the above equation (2.19).

By substituting equation (2.13) for equation (2.20.1), the following equation (2.20.2) is obtained. Φ (s) = (1-H (s)) (θ i (s) - ψ (s)) (2.20.2)

The is phase fluctuation caused by internal noise of the VCO therefore given by the following equation (2.21).

The is called, an internal phase noise of the VCO is called phase noise of a Output signal of the PLL circuit observed, the one through highpass filter is gone component. This high pass filter corresponds to a phase error transfer function the loop.

As stated above, is made of an internal thermal noise of the VCO is a phase noise of an oscillation waveform of the VCO. In addition, will a high-pass filter corresponding to a loop phase error gone through component observed as output phase noise.

Additive noise of the PLL circuit and / or internal thermal noise of the VCO is converted into phase noise of an oscillation waveform of the VCO. Additive noise of the PLL circuit and / or internal thermal noise of the VCO is observed corresponding to the path from a noise generating block through the output of the PLL circuit as phase noise with a low frequency or a high frequency component. It can therefore be seen that the noise of the PLL circuit can cause a phase fluctuation of an oscillation waveform of the VCO. This is equivalent to a voltage change at the input end of the VCO. In the present invention, additive noise is applied to the input end of the VCO to randomly modulate the phase of a waveform of the VCO so as to simulate jitter. 20 shows a method for simulating a jitter.

When next A method of measuring a jitter of a clock will be explained. One Peak-to-peak jitter is measured in the time domain and an RMS jitter is in the frequency domain measured. Each of these conventional Jitter measurement method needed approx. 10 minutes test time. In a VLSI test However, only about 100 ms test time for one test article to disposal. The conventional one Jitter measurement method therefore can not for an exam used in the VLSI production line.

When studying the method of measuring a jitter, zero crossing is an important concept. From the viewpoint of period measurement, a relationship between the zero-crossings of a waveform and the zero-crossings of the fundamental waveform of its fundamental frequency is discussed. It is shown that "the fundamental frequency of the waveform contains the zero-crossing information of the original waveform". In the present invention, this feature of the basic waveform is called a "zero crossing theorem". An explanation will be given for an in 21 as an example ideal clock waveform X _d50% (t) with a duty cycle of 50% is discussed. Assuming that one period of this clock waveform T is ₀ , the Fourier transform of the clock waveform is given by the following equation (3.1). (See, for example, reference c1.)

The is called, a period of the fundamental wave is equal to a period of the clock.

If the fundamental waveform of the clock signal is extracted, correspond their zero crossings the zero crossings the original one Clock waveform. Therefore, one period of a clock waveform can turn off the zero crossings estimated their basic waveform become. In this case, the estimation accuracy becomes even then not improved when adding some harmonic to the fundamental waveform become. Harmonic and estimation accuracy a period will be checked later.

When next a Hilbert transform and an analytic signal are explained (see z. Eg reference c2).

As can be seen from equation (3.1), when the Fourier transform of the waveform X _a (t) is calculated, a power spectrum S _aa (f) ranging from negative to positive frequencies can be obtained. This is called a two-sided performance spectrum. The negative frequency spectrum is a mirrored image of the positive frequency spectrum on the f = 0 axis. Therefore, the two-sided power spectrum is symmetric about the f = 0 axis, ie, S _aa (-f) S _aa (f). The spectrum of negative frequencies is not observable. A spectrum G _aa (f) can be defined in which negative frequencies are truncated to zero and instead the observable positive frequencies are doubled. This is called a one-sided performance spectrum. G aa (f) = 2S aa (f) f> 0 G aa (f) = 0 f <0 (3.3.1) G aa (f) = S aa (f) [1 + sgn (f)] (3.3.2)

In In this case, sgn (f) is a sign function that has the value + 1 if f is positive and takes the value -1, if f is negative is. This one-sided spectrum corresponds to a spectrum of a analytic signal z (t). The analytic signal z (t) can be in the time domain expressed as follows become.

The real part corresponds to the original waveform X _a (t). The imaginary part is given by the Hilbert transform x ⌢ _a (t) of the original waveform. As the equation (3.5) shows, the Hilbert transform x ⌢ _a (t) of a waveform X _a (t) is given by a convolution of the waveform X _a (t) with 1 / πt.

Determine Let us now turn to the Hilbert transform of the present invention managed waveform. First the Hilbert transform is derived from a cosine wave.

Since the integral of the first term is zero and the integral of the second term is n, the following equation (3.6) is obtained. H [cos (2.pi.f 0 t)] = sin (2πf 0 t) (3.6)

In a corresponding manner, the following equation (3.7) is obtained. H [sin (2.pi.f 0 t)] = - cos (2πf 0 t) (3.7)

Next, the Hilbert transform is derived from a square wave corresponding to a clock waveform (see, for example, reference c3). The Fourier series of an in 21 The ideal clock waveform shown is given by the following equation (3.8).

The Hilbert transform is using equation (3.6) given by the following equation (3.9).

22 shows examples of a clock waveform and its Hilbert transform. These waveforms are based on the partial summation up to the harmonic 11 , Order. The period T _O is 20 ns in this example.

One analytic signal z (t) is introduced by J. Dugundji to an envelope to get a waveform clearly. (See, for example, literature reference c4). When an analytic signal in a polar coordinate system expressed the following equations (3.10.1), (3.10.2) and (3.10.3) receive.

In this case, A (t) represents an envelope of X _a (t). For this reason, z (t) is referred to by J. Dugundji as "pre-envelope." Further, Θ (t) represents an instantaneous phase of X _a (t). In the method of measuring a jitter according to the present invention, a method of estimating this instantaneous phase is the core.

If A measured waveform can be treated as a complex number envelope and instantaneous phase can be easily obtained. The Hilbert Transformation is a tool for transforming a waveform into an analytical one Signal. An analytical signal can be obtained by the procedure the following algorithm 1.

• 1. Eine Wellenform wird unter Verwendung der schnellen Fouriertransformation in den Frequenzbereich transformiert;
• 2. negative Frequenzkomponenten werden auf Null beschnitten und positive Frequenzkomponenten werden verdoppelt; und
• 3. das Spektrum wird mit Hilfe von inverser schneller Fouriertransformation in den Zeitbereich transformiert.

Algorithm 1 (procedure for transforming a real waveform into an analytic signal):

• 1. A waveform is transformed into the frequency domain using the fast Fourier transform;
• 2. Negative frequency components are truncated to zero and positive frequency components are doubled; and
• 3. the spectrum is transformed by means of inverse fast Fourier transformation into the time domain.

When next becomes a "phase unwrap method" for converting a phase into a continuous phase.

The phase unpacking method is a method proposed to obtain a complex cepstrum. (See, for example, reference c5.) If a complex logarithmic function log (z) is defined as an arbitrary complex number satisfying e ^{log (z)} = z, the following equation (3.11) can be obtained. (See, for example, reference c6.) log (z) = log | z | + jARG (z) (3.11)

As a result of the Fourier transform of a temporal waveform X _a (n), S _a (e ^jω ) is assumed. If its logarithmic magnitude spectrum log | S _a (e ^jω ) | and phase spectrum ARG [S _a (e ^jω )] correspond to a real part and an imaginary part of a complex spectrum, respectively, and perform inverse Fourier transformation is used, a complex cepstrum C _a (n) can be obtained.

In In this case ARG represents the main value of the phase. The main value the phase is in the range [-π, π]. There are Discontinuity points at -π and + π in the phase spectrum of the second term. There is an influence of these discontinuities over the entire time domain by applying inverse Fourier transform a complex cepstrum can not be estimated accurately. To convert a phase into a continuous phase, a unpacked phase introduced. An unwrapped phase can be clearly indicated by integrating a derived function of a phase.

in which arg is an unwrapped phase. An algorithm for obtaining an unwrapped phase by eliminating discontinuity points from a phase spectrum in the time domain is by Ronald W. Schäfer and Donald G. Childers (see, for example, reference c7).

Algorithm 2:

• 1 ARG (0) = 0, C (0) = 0
• 2
  
• 3 arg (k) = ARG (k) + C (k)

A Unpacked phase is obtained with Algorithm 2 above. First, will by obtaining differences between the principal values of neighboring ones Stages an assessment conducted, to determine if there is a discontinuity point. If there is one Discontinuity point, ± 2π is added to the main value, to remove the point of discontinuity from the phase spectrum (cf. Reference c7).

In the above algorithm 2, it is assumed that a difference between adjacent phases is smaller than π. The resolution for observing a phase spectrum must therefore be small enough. However, at a frequency near a pole (a resonance frequency), the phase difference between the adjacent phases is larger than π. If the frequency resolution for observing a phase spectrum is too coarse, it can not be judged whether a phase is increased or decreased by 2π or more. Therefore, an unwrapped phase can not be accurately obtained. This problem has been solved by Jose M. Tribolet. Jose M. Tribolet proposed a method in which the integration of the derived function of a phase in equation (3.12) is approximated by a numerical integration based on a trapezoidal rule, and a division width of the integration range is adaptively divided into small pieces until an estimated phase value for determining whether a phase is increased or decreased by 2π or more (see, for example, reference c8). In this way, an integer I of the following equation (3.14) is found. arg [S a (e jΩ )] = ARG [p a (e jΩ )] + 2πI (Ω) (3.14)

Tribolet's algorithm is by Kuno P. Zimmermann on a phase unpacking algorithm in the time domain been expanded (see, for example, reference c9).

In the present invention, phase unpacking is used to obtain a current phase waveform in the time domain by eliminating discontinuity points at -π and + π from the current one Transform phase waveform into a continuous phase. A sampling condition for uniquely performing phase unpacking in the time domain will be discussed later.

When next becomes a linear trend estimation method briefly described, which is used to make a continuous Phase to obtain a linear phase (see, for example, Bibliography c10 and c11).

The goal of the linear trend estimation method is to find a linear phase g (x) that is adaptive to a phase data y _i . g (x) = a + bx (3.1 5)

In this case, "a" and "b" are the constants to be found. A quadratic error R between g (x _i ) and each data (x _i , y _i ) is given by the following equation (3.16).

In In this case, L is the number of phase data values. A linear phase to minimize the quadratic error is found. A partial Differentiation of equation (3.16) against each of the unknown constants a and b are calculated and the result is set to zero. Then can the following equations (3.17.1) and (3.17.2) are obtained.

These Equations are transformed to satisfy the following equation (3.18) to obtain.

Therefore the following equation (3.19) can be obtained.

The is called, a linear phase can be obtained from the following equations (3.20.1) and 3.20.2).

at The present invention is for estimating a linear phase a continuous phase, a linear trend estimation method used.

As from the above discussion becomes conventional Method for measuring a jitter, a peak-to-peak jitter in the time domain using an oscilloscope and an RMS jitter in the frequency domain measured using a spectral analyzer.

In the method of measuring a jitter in the time domain, a peak-to-peak jitter J _{PP of} a clock signal in the time domain is measured. A relative fluctuation between zero crossings becomes a problem as a peak-to-peak jitter J _PP . If z. At a clock signal in a computer or the like, as in 81a shown, a jitter-free clock signal has a waveform shown by a dashed line, fluctuates in a jittering clock signal in which z. For example, if a rise point of the waveform is considered, a time interval T _int between a rise point and the next rise point from the rise point of the dashed waveform as the center to the leading and trailing sides. This instantaneous interval T _int is obtained as a peak-to-peak jitter J _PP . 23 and 24 show a measured example of a peak-to-peak jitter, measured with an oscilloscope or the measuring system. A clock signal to be tested is applied to a reference input of the phase detector. In this case, the phase detector and the signal generator form a phase-locked loop. A signal from the signal generator is synchronized with the tested clock signal and fed to an oscilloscope as a trigger signal. In this example, a jitter of the rising edge of the clock signal is observed. A rectangular zone is used to specify a level to be crossed by the signal. A jitter is measured as a varying component of the time interval between "a time when the tested clock signal crosses the specified level" and "a reference time given by the trigger signal". This procedure requires a longer period for the measurement. For this reason, the trigger signal must be phase locked to the clock signal under test, so that the measurement is not affected by a frequency drift of the clock signal under test.

A Measurement of the jitter in the time domain corresponds to a measurement of a Fluctuation of a time when the signal crosses a level. This is referred to as the zero crossing method in the present invention designated. Because a rate of change a waveform at the zero crossing is maximum, is the time error a time measurement at the zero crossing minimal.

In 25 (a) the zero crossing is indicated in each case by small circles. A time interval between a time t _i at which a rising edge crosses a zero amplitude level and a time t _{i + 2} where a next rising edge crosses a zero amplitude level gives a period of this cosine wave. 25 (b) shows a current period P _inst obtained from the zero crossing (found from adjacent zero crossings t _{i + 1} , and t _{i + 2} ). A momentary frequency f _inst is given by the reciprocal of P _inst . p inst (t i + 2 ) = t i + 2 - t i , p inst (t i + 2 ) = 2 (t i +2 - t i +1 ) (3.22.1) f inst (t i + 2 ) = 1 / p inst (t i + 2 ) (3.22.2)

Problems in measuring a jitter in the time domain are discussed. In order to measure a jitter, a rising edge of a tested clock signal X _c (t) is captured by means of an oscilloscope at the time of zero crossing. X c (i) = A c cos (2.pi.f c t + θ c + Δφ (t)) (3.23)

This means that only X _c (t) satisfying the next phase angle condition given by the following equation (3.24) can be collected.

A density function of the probability that a sample corresponds to the zero crossing of a rising edge is given by the following equation (3.25). (See, for example, reference c10.)

Therefore, the time taken for randomly sampling a clock signal _{under test} for collecting phase noise Δφ (t _{3π / 2} ) from N points is given by the following equation (3.26). (2πA c (NT) O ) (3.26)

That is, since only zero-crossing samples can be used for jitter estimation, at least (2πA _c ) times the test period is required compared to a conventional measurement.

As 26 shows, the magnitude of a set of phase noise values that can be sampled using the zero-crossing method is less than the total amount of phase noise values. Therefore, a peak-to-peak jitter J _{pp, 3π / 2} which can be estimated to be less than or equal to the true peak-to-peak jitter J _PP .

The main disadvantage of the zero-crossing method is that the time resolution of the period measurement can not be selected independently of the period of a signal under test. The time resolution of this method is determined by the period of the signal under test, ie the zero crossing. 27 is a diagram in which the zero crossings of the rising edges are plotted on a complex plane. The sample in the zero-crossing method is only a dot indicated by an arrow, and the number of samples per period can not be increased. When a number n _{i is} given to the zero crossing of a rising edge, the zero crossing method measures a phase difference given by the following equation (3.28).

n _i (2π) (3.28)

A current period measured by the zero-crossing method thus runs as in 25 (b) shown to a rough approximation obtained using a step function.

In 1988, David Chu invented a time interval analyzer (see, for example, References c12 and c13). If in the time interval analyzer integer values n _{i of} the zero crossings n _i (2π) of the signal under test are counted, the elapsed time periods t _i are also counted simultaneously. With this method, the temporal variation of the zero crossing with respect to the elapsed time period could be plotted. In addition, using (t _i , n _i ), a point between measured data values can smoothly be interpolated by spline functions. As a result, it became possible to observe an instantaneous period approximated in higher order. It should be noted, however, that David Chu's time interval analyzer is based on the zero-crossing measurement of the signal under test. Although the interpolation by spline functions makes it easier to understand the physical meaning, the fact is that only the degree of approximation of a current period is increased. This is because the data between zero crossings is still not measured. That is, even the time interval analyzer can not exceed the limitations of the zero crossing procedure. One possible method for interpolating the current data will be discussed later.

When next A method for measuring a jitter in the frequency domain will be described.

An RMS jitter J _{RMS of} a clock signal is measured in the frequency domain. For example, in data communication, a deviation from an ideal time as RMS jitter J _RMS becomes a problem. As in 81b 2, where a jitter-free square wave signal has a waveform shown by a broken line, the rise time of a jittering waveform fluctuates. In this case, a deviation width of an actual rising point (solid line) from a normal rising point (broken line) is obtained as the RMS jitter JRM _S. 28 and 29 show an example of RMS jitter measured by a spectrum analyzer or measuring system using a spectrum analyzer. A clock signal under test is input to a phase detector as the reference frequency. In this case, the phase detector and the signal generator form a phase-locked loop. A phase difference signal between the clock signal under test detected by the phase detector and the signal from the signal generator is input to the spectrum analyzer to observe a phase noise spectrum density function. The area under the in 28 shown phase noise spectrum curve corresponds to the RMS jitter J _RMS . The frequency axis expresses the frequency deviations from the clock frequency. That is, zero (0) Hz corresponds to the clock frequency.

A phase difference signal Δφ (t) between the clock signal X (t) under test given by the equation (3.23) and a reference signal given by the following equation (3.29) is output from the phase detector. x ref (t) = Acos (2 f c t +) (3.29)

At this time, the reference signal applied to a phase-shifter under test is applied, has a constant period, the phase difference signal Δφ (t) corresponds to a phase noise waveform. When the phase difference signal Δφ (t) observed over a finite period T is transformed into the frequency domain, a spectral power density function of the phase noise G _ΔφΔφ (f) can be obtained.

To Parseval's theorem is the mean of the squares of the phase noise waveform given by the following equation (3.32). (see, for example, reference to literature c14).

It is thus to be understood that by measuring a sum of the power spectrum, an average of the squares of a phase noise waveform can be estimated. The positive square root of the mean of the squares (ie, an RMS value) is called the RMS jitter J _RMS .

If the mean is zero, the mean of the squares is equivalent to a variance, and the RMS jitter is equal to the standard deviation.

As in 28 J _RMS can be accurately approximated by a sum of G _ΔφΔφ (f) near the clock frequency (see, for example, reference literature reference c15). In fact, in Eq. (3.33) the upper limit f _{MAX of} the frequency to be summed of G _ΔφΔφ (f) equals (2f _c -ε). Namely, when G _ΔφΔφ (f) is summed over a wider frequency range than the clock frequency, the harmonics of the clock frequency are included in J _RMS .

To measure the RMS jitter in the frequency domain, a phase detector, a low phase noise signal generator and a spectrum analyzer are needed. As shown by Eq. (3.33) and 28 is to be understood, a phase noise spectrum is measured by frequency sweeping a low frequency range. For this reason, the measuring method requires a measuring time period of about 10 minutes and is not applicable to the testing of a microprocessor. In addition, when measuring an RMS jitter in the time domain, a peak-to-peak jitter can not be estimated because the phase information is lost.

As described above, in the conventional method of measuring a jitter, a peak-to-peak jitter in the time domain is measured by means of an oscilloscope. The basic method for measuring a jitter in the time domain is the zero-crossing method. The main disadvantage of this method is that a time resolution of a period measurement can not be refined depending on the period of the signal under test. For this reason, a time interval analyzer for simultaneously counting the integer values n _{i of} the zero crossings of the signal under test n _i (2π) and the elapsed time periods t _{i has been} invented. However, the data between zero crossings can not be measured. Also, the time interval analyzer can not overcome the limitation of the zero-crossing method.

on the other hand is an RMS jitter in the frequency domain with a spectrum analyzer measured. Since the phase information has been lost, a Peak-to-peak jitter can not be estimated.

Also required both measuring a jitter in the time domain and measuring an RMS jitter in the frequency range a measuring time of about 10 minutes. at an exam a VLSI is every test object a test time allocated by about only about 100 ms. That's why it's a serious disadvantage of the conventional Method for measuring a jitter that does not use the method on the exam a VLSI is applicable in its manufacturing process.

The clock frequency of a microcomputer has a speed of 2.5 times per 5 Shift years to higher frequencies. Therefore, the clock jitter of a microprocessor can not be measured unless the method of measuring a clock jitter is scalable with respect to the measurement time resolution. Conventionally, time-domain peak-to-peak jitter has been measured using an oscilloscope or a time interval analyzer. In order to measure a peak-to-peak jitter of a higher frequency clock signal with these measuring devices, it is necessary to increase the sampling rate (the number of samples per second) or to decrease the sampling interval. That is, these hardware devices must be developed at least every 5 years.

issues When measuring the jitter of a CD or DVD are described. at a CD or DVD, a light beam is focused on a plate, and returning from a pit reflected light is detected by an optical pickup, and then that will be detected Light in a high frequency signal (an electrical signal) through converted a photodiode. The pit on the plate is slightly lengthwise stretched or shortened. This causes rise and fall characteristics (duty cycle) of the High frequency signal asymmetric. If using an oscilloscope an eye pattern of the RF signal is observed is its center along the Y axis postponed. To evaluate a jitter of the plate, the rising edge and the falling edge of the high-frequency signal can be distinguished. When measuring an RMS jitter using a spectrum analyzer can the rising and falling edges of the high-frequency signal are not be differentiated.

In addition, As stated above, the clock frequency of a microcomputer with a Speed increased to 2.5 times per 5 years. Around a peak-to-peak jitter of a higher frequency clock signal to measure, one must AD converter for inputting to a higher speed digital oscilloscope according to the higher Speed of the clock signal work and a resolution of eight Have bits or more.

BRIEF DESCRIPTION OF THE INVENTION

A Object of the present invention is a device and a A method of measuring a jitter to create a peak-to-peak jitter or RMS jitter in a short test time of about 100 ms or similar can be.

A Another object of the present invention is a device and to provide a method of measuring jitter in which from the conventional RMS jitter measurement or conventional peak-to-peak jitter measurement obtained data can be used.

A Another object of the present invention is to provide a scalable Device and a scalable method for measuring a jitter specify.

Yet An object of the present invention is a method and a Device for measuring a jitter to create a peak-to-peak jitter and / or can measure an RMS jitter, each one increasing or a falling edge corresponds to a waveform.

Yet Another object of the present invention is a device to measure a jitter that does not need an AD converter.

Still another object of the present invention is to provide an apparatus for measuring a jitter, which is provided with a method for measuring a peak-to-peak jitter according to a conventional zero-crossing method as in 24 and / or a method for measuring an RMS jitter according to an in 29 shown phase detection method is compatible.

Yet An object of the invention is to provide a device which measure a cycle-to-cycle jitter can.

Yet Another object of the present invention is a device To measure a jitter to indicate a histogram of the jitter can measure.

DISCLOSURE OF THE INVENTION

In order to achieve the above objects, according to one aspect of the present invention, there is provided an apparatus for measuring a jitter wherein a clock waveform X _c (t) is detected by means of an analytic signal is converted into a complex analytic signal to obtain a variable term obtained by eliminating linear phase from a current phase of this analytic signal, ie, a phase noise waveform Δφ (t), and a jitter of the clock waveform by means of linear phase removing means is obtained from this phase noise waveform by jitter detecting means.

According to another aspect of the present invention, there is provided a method of measuring a jitter, comprising the steps of: converting a clock waveform X _c (t) into a complex analytic signal; Estimating a variable term obtained by removing a linear phase from a current phase of this analytic signal, ie, a phase noise waveform Δφ (t); and obtaining a jitter from the phase noise waveform.

One RMS jitter is obtained from the phase noise waveform. In addition will the phase noise waveform near a zero crossing point of the real part of an analytic signal, and a differential one or waveform of the sample phase noise waveform calculated to give a peak-to-peak jitter from the differential To get phase noise waveform.

It become a scalable device and a scalable method for measuring a jitter constructed so that the clock waveform is frequency divided by a frequency divider and then the frequency-divided clock waveform converted into an analytical signal becomes.

According to one Another aspect of the present invention is the clock waveform with an analog reference size a comparator, and an output signal of the comparator is transformed into an analytic signal.

BRIEF DESCRIPTION OF THE DRAWINGS

1 Fig. 10 is a diagram showing a relation between a clock period of a microcomputer and an RMS jitter;

2 Fig. 10 is a diagram showing a Pentium processor and its on-chip clock driver circuit;

3 Fig. 10 is a diagram showing comparisons between a PLL of a computer system and a PLL of a communication system;

4 Fig. 10 is a diagram showing basic configurations of a PLL circuit;

5 Fig. 10 is a block diagram showing an example of a phase-frequency detector;

6 is a state transition diagram of the phase-frequency detector;

7 shows the operating waveforms of the phase-frequency detector when a frequency error is negative;

8 (a) FIG. 12 is a diagram showing a charge pump circuit, and FIG 8 (b) Fig. 15 is a diagram showing a relation between a switch control signal and an output current of the charge pump circuit;

9 (a) FIG. 15 is a diagram showing a loop filter circuit, and FIG 9 (b) is a diagram showing a relationship between one in the circuit 9 (a) input constant current and an output control voltage;

10 Fig. 10 is a circuit diagram showing a passive weigth filter;

11 shows an example of a VCO circuit;

12 shows an example of the jitter of a clock;

13 Fig. 12 is a diagram for explaining a method of measuring a jitter;

14 Fig. 12 is a diagram showing a spectrum of an output signal of an ideal oscillator;

15 Fig. 12 is a diagram showing a fluctuation of zero crossing caused by phase noise;

16 Fig. 12 is a diagram showing a spectrum-caused scattering of a spectrum;

17 Fig. 10 is a block diagram showing a VCO circuit in which noise is added at the input end;

18 Fig. 10 is a block diagram showing another VCO circuit equivalent to the VCO circuit in which noise is added at the input end;

19 Fig. 10 is a block diagram showing an internal phase noise VCO circuit;

20 Fig. 10 is a block diagram showing a PLL circuit that simulates jitter;

21 Fig. 12 is a diagram showing an ideal clock waveform;

22 Fig. 12 is a waveform diagram showing a clock waveform and its Hilbert transformed result;

23 Fig. 10 is a diagram showing an example of a measured peak-to-peak jitter in the time domain;

24 Fig. 10 is a typical model diagram showing a measuring system for peak-to-peak jitter;

25 (a) is a diagram showing zero crossing points of a clock signal, and 25 (b) Fig. 12 is a diagram showing current periods of these zero crossing points;

26 Fig. 10 is a diagram showing a set of phase noise values and a set of phase noise values that can be sampled by a zero-crossing procedure;

27 is a diagram showing the zero crossing in a complex plane;

28 FIG. 12 is a waveform diagram showing a measured example of RMS jitter in the frequency domain; FIG.

29 Fig. 10 is a typical model diagram showing a measurement system for RMS jitter;

30 (a) FIG. 12 is a diagram showing a functional construction by which a real part of a randomly phase-modulated signal is extracted, and FIG 30 (b) Fig. 12 is a diagram showing a functional construction by which a random phase-modulated signal is extracted as an analytic signal;

31 Fig. 15 is a diagram showing a vibration waveform of a VCO as an analytic signal;

32 Fig. 10 is a block diagram showing a first embodiment of a jitter measuring apparatus according to the present invention;

33 Fig. 10 is a diagram showing a constant frequency signal for measuring a jitter;

34 Fig. 10 is a typical model diagram showing a jitter measuring system using a jitter measuring apparatus according to the present invention;

35 (a) Fig. 16 is a diagram showing a Hilbert pair generator; 35 (b) FIG. 12 is a diagram showing an input waveform of the Hilbert pair generator, and FIG 35 (c) Fig. 15 is a diagram showing an output waveform of the Hilbert pair generator;

36 (a) is a diagram showing a clock waveform 36 (b) FIG. 12 is a diagram that shows one by applying FFT to the clock waveform 36 (a) obtained spectrum shows 36 (c) is a diagram showing one by bandpass filtering the spectrum 36 (b) obtained spectrum shows, and 36 (d) FIG. 12 is a waveform diagram that illustrates one by applying inverse FFT to the spectrum of 36 (c) shows obtained waveform;

37 (a) which shows an input signal of an instantaneous phase estimator, 37 (b) is a diagram showing a momentary phase 37 (c) is a diagram showing an unwrapped phase, and 37 (d) Fig. 15 is a diagram showing the instantaneous phase estimator;

38 (a) Fig. 4 is a diagram showing an input phase φ (t) of a linear phase remover; 38 (b) FIG. 15 is a diagram showing an output Δφ (t) of the linear phase remover, and FIG 38 (c) Fig. 12 is a diagram showing the linear phase remover;

39 (a) Fig. 16 is a diagram showing an input clock waveform; 39 (b) Fig. 12 is a diagram showing an output of the Δφ (t) method, and 39 (c) Fig. 15 is a diagram showing an output period of the zero-crossing method;

40 (a) shows a device for measuring a jitter, in which a quadrature modulation signal is used in a means for reshaping the analytical signal, and 40 (b) Fig. 10 is a block diagram showing an apparatus for measuring a jitter in which a heterodyne system is used in its input stage;

41 Fig. 12 is a diagram showing differences between a zero crossing method scanning method and a scanning method in the method of the present invention;

42 (a) is a diagram showing the fundamental spectrum, and 42 (b) Fig. 15 is a diagram showing a clock waveform of the fundamental wave spectrum;

43 (a) is a diagram showing a partial sum spectrum up to the 13th harmonic, and 43 (b) Fig. 12 is a diagram showing a clock waveform of the partial harmonic spectrum up to the 13th harmonic;

44 (a) FIG. 12 is a graph showing a relative period error estimated from a waveform recovered to a certain harmonic order; and FIG 44 (b) Fig. 12 is a graph showing a relative error of an effective value estimated from a recovered waveform as the effective value of the original clock waveform to a certain order of harmonics;

45 Fig. 12 is a diagram showing parameters of a MOSFET;

46 Fig. 10 is a block diagram showing a jitter-free PLL circuit;

47 (a) FIG. 12 is a diagram showing a waveform at the input of a VCO in the jitter-free PLL circuit, and FIG 47 (b) Fig. 15 is a diagram showing a waveform at the output of the VCO in the jitter-free PLL circuit;

48 (a) FIG. 12 is a diagram showing an output waveform of a VCO in the jitter-free PLL circuit, and FIG 48 (b) Fig. 15 is a diagram showing a phase noise waveform of the VCO of the jitter-less PLL circuit;

49 (a) FIG. 15 is a diagram showing a current period of phase noise of the jitter-free PLL circuit, and FIG 49 (b) Fig. 10 is a diagram showing a waveform of the phase noise of the jitter-free PLL circuit;

50 Fig. 10 is a block diagram showing a jittery PLL circuit;

51 (a) FIG. 12 is a diagram showing a waveform at the input of a jitter PLL circuit VCO, and FIG 51 (b) Fig. 12 is a diagram showing a waveform at the output of the jitter PLL circuit VCO;

52 (a) FIG. 12 is a diagram showing an output waveform of a VCO in the jittery PLL circuit, and FIG 52 (b) FIG. 12 is a diagram illustrating a phase noise waveform of the output wave. FIG shows the VCO in the jittery PLL circuit;

53 (a) FIG. 12 is a diagram showing a current period of phase noise of the jittery PLL circuit, and FIG 53 (b) Fig. 15 is a diagram showing a waveform of the phase noise of the jittery PLL circuit;

54 (a) Fig. 12 is a diagram showing an RMS jitter estimated by a spectral method, and Figs 54 (b) Fig. 15 is a diagram showing Δφ (t) estimated by a phase noise waveform estimation method;

55 Fig. 12 is a diagram for comparing estimates of the RMS jitter;

56 (a) FIG. 12 is a graph showing a peak-to-peak jitter estimated by the zero-crossing method, and FIG 56 (b) Fig. 10 is a diagram showing a peak-to-peak jitter estimated by the phase noise waveform estimation method;

57 is a graph comparing estimates of peak-to-peak jitter;

58 (a) FIG. 15 is a diagram showing a result of measuring the current period of a PLL clock with the zero-crossing method, and FIG 58 (b) Fig. 10 is a waveform diagram showing a phase noise estimated by the Δφ (t) method;

59 Fig. 12 is a diagram for comparing estimated values of the RMS jitter of a frequency-divided clock;

60 Fig. 12 is a diagram for comparing estimated values of the peak-to-peak jitter of a frequency-divided clock;

61 (a) FIG. 12 is a waveform diagram showing a phase noise spectrum when 3σ = 0.15V, and FIG 61 (b) Fig. 12 is a waveform diagram showing a phase noise spectrum for 3σ = 0.10V;

62 Fig. 15 is a waveform diagram showing an example of a Hilbert pair;

63 Fig. 15 is a waveform diagram showing another example of a Hilbert pair;

64 Fig. 15 is a waveform diagram for explaining a difference between peak-to-peak jitter;

65 Fig. 12 is a graph plotting estimated values of peak-to-peak jitter;

66 (a) FIG. 12 is a waveform diagram showing a VCO input of a delay-error-free PLL circuit; and FIG 66 (b) Fig. 15 is a waveform diagram showing a PLL clock of a delay-error-free PLL circuit;

67 is a block diagram showing a specific example of the means for reshaping the analytical signal 11 shows;

68 Fig. 12 is a block diagram each showing specific examples of a present-phase estimator 12 and a linear phase remover 13 shows;

69 Fig. 10 is a block diagram showing another example of the means for reshaping the analytic signal 11 and Fig. 14 shows an example of a jitter measuring apparatus to which a spectrum analyzing part is added;

70A Fig. 12 is a diagram showing a 1/2 frequency divider;

70B FIG. 15 is a diagram illustrating an input waveform T and an output waveform Q of the in 70A shown frequency divider shows;

71 is a block diagram illustrating a system configuration for measuring a jitter of the frequency shows divided clock waveform with a digital oscilloscope;

72 is a diagram showing a relationship between with the in 71 shown system shows peak-to-peak jitter and the number of frequency divisions N of the frequency divider;

73 is a diagram showing a relationship between a with the in 71 shown system measured RMS jitter and the number of frequency divisions N of the frequency divider;

74 Fig. 10 is a block diagram showing a system configuration for measuring a jitter of the frequency-divided clock waveform using a Δφ evaluator;

75 is a diagram showing a relationship between a with the in 74 shown system shows peak-to-peak jitter and the number of frequency divisions N of the frequency divider;

76 is a diagram showing a relationship between a with the in 74 shown system measured RMS jitter and the number of frequency divisions N of the frequency divider;

77 Fig. 15 is a diagram showing respective results when a clock signal similar to a sine wave is supplied to an analog-to-digital converter and a comparator where peak-to-peak jitter is measured;

78 Fig. 12 is a diagram showing respective results when a clock signal similar to a sine wave is supplied to an analog-to-digital converter and a comparator where RMS jitter is measured;

79 Fig. 12 is a diagram showing respective results when a clock signal having a rectangular wave shape is supplied to an analog-to-digital converter and a comparator where peak-to-peak jitter is measured;

80 Fig. 12 is a diagram showing respective results when a clock signal having a rectangular wave shape is supplied to an analog-to-digital converter and a comparator where RMS jitter is measured.

81a FIG. 12 is a diagram showing a jitter of a relative zero-crossing time, and FIG 81b is a diagram showing a jitter against an ideal time;

82 Fig. 10 is a block diagram showing a functional configuration of an embodiment in which the present invention is applied to the measurement of a peak-to-peak jitter;

83 FIG. 12 is a diagram showing approximated zero crossing points, samples of the phase noise waveform, and their differences in in 82 shown embodiment shows;

84 Fig. 10 is a diagram showing a configuration of an experiment of a peak-to-peak jitter measurement by means of a conventional time interval analyzer;

85 FIG. 15 is a diagram illustrating a configuration of an experiment of a peak-to-peak jitter measurement using the in. FIG 82 shown embodiment shows;

86 Fig. 12 is a graph showing peak values of a jitter showing a measured experimental result of peak-to-peak jitter;

87 Fig. 12 is a graph showing an experimental measurement result of peak-to-peak jitter based on effective values of a jitter;

88 Fig. 10 is a diagram showing another embodiment of the present invention;

89 Fig. 10 is a graph showing an experimental measurement result of an RMS jitter from peak values of a jitter;

90 is a diagram showing an experimental measurement result of an RMS jitter based on jitter rms values;

91 Fig. 12 is a diagram showing an embodiment in which the present invention is applied to the measurement of a cycle-to-cycle jitter;

92 Fig. 10 is a diagram showing an experimental measurement result of a cycle-to-cycle jitter;

93 Fig. 10 is a diagram showing a histogram of sine wave jitter measured with a conventional device;

94 is a diagram showing a histogram of with the in 82 shown embodiment shows measured sine wave jitter;

95 is a graph showing a histogram of the in 68 1 shows a measured phase noise waveform;

96 is a diagram showing a histogram of with the in 91 1 shows measured cycle-to-cycle jitter;

97 Fig. 15 is a diagram showing a histogram of random jitter measured by the conventional apparatus;

98 is a diagram showing a histogram of with the in 82 1 shows measured random jitter;

99a Fig. 15 is a diagram showing a waveform of a real part of an analytic signal. 99b FIG. 12 is a diagram showing a phase noise waveform and its zero-crossing samples; and FIG 99c Fig. 12 is a graph showing a peak-to-peak jitter obtained by a differential calculation in the case of T _s = T _in ;

100 Fig. 15 is a graph showing a correlation between each sampling time required for the differential calculation of the phase noise waveform Δπ (t) in the case of T _s <T _in , its sample value, and a time point at which the differential value is obtained;

101 Fig. 15 is a diagram showing a waveform of a real part of an analytic signal. 101b FIG. 12 is a diagram showing a phase noise waveform and its zero-crossing samples; and FIG 101c Fig. 15 is a graph showing a peak-to-peak jitter obtained by a differential calculation in the case of T _s = 1 and T _in = 17;

102 Fig. 15 is a diagram showing a peak-to-peak jitter obtained in the case of T _s = T _in for sine wave jitter, and Figs 102b Fig. 12 is a diagram showing a peak-to-peak jitter obtained in the case of T _s = 1 and T _in = 17 for sine wave jitter;

103a FIG. 12 is a diagram showing a configuration for performing ordinary AD conversion, and FIG 103b Fig. 15 is a diagram showing a configuration for performing an AD conversion by an undersampling method;

104a FIG. 15 is a diagram showing a waveform of a sequence of samples when an input signal is sampled in the high-frequency state as usual; and FIG 104b Fig. 15 is a diagram showing a waveform of a sequence of samples when an input signal is sampled by the undersampling method; and

105a is a diagram showing a spectrum of in 104a shows shown sequence of samples, and 105b is diagram that is a spectrum of in 104b shows shown sequence of samples.

BEST TYPES OF EXECUTING THE INVENTION

In the study and development of a PLL circuit, a conventional method of measuring a jitter is still used, and the compatibility between data in a test stage and data in a development stage is an important problem. In particular, to make a design change in a short time and / or to improve a process for realizing an improvement in production yield, a test method that can share test results is important. From this point of view The present invention provides a method and apparatus that are reasonable as a clock checking method.

Around the compatibility with RMS jitter must take the form of a phase noise power spectrum be maintained in the frequency domain. This can be solved by using an analytical signal already discussed. For compatibility with a peak-to-peak jitter measurement to ensure, is a method for maintaining the zero crossing of a Waveform required. As already clearly shown, the fundamental contains a clock waveform, the zero crossing information of the original one Clock upright ("Nullgangstheorem"). For a measurement of a peak-to-peak jitter, therefore, it is sufficient to have a phase angle using only the fundamental wave of the clock waveform. To the For example, equation (2.5.2) or (3.23) corresponds to this fundamental.

It can be interpreted from the equation (2.5.2) or (3.23) that a phase noise waveform Δφ (t) randomly changes a phase of a carrier wave corresponding to the clock frequency. As a result of this random phase modulation, the period of the carrier wave fluctuates and jitter is generated. An actually observable quantity is, as in 30 (a) only the real part of the randomly phase modulated signal is shown (see, for example, reference c16). However, if the imaginary part could also be observed at the same time, the phase angle could be easily obtained. This concept corresponds to the conception of the clock waveform as the above-mentioned analytic signal. 30 (b) shows a block diagram where the clock waveform is considered as an analytical signal. If the inside of the PLL circuit is considered as in 31 As shown, a vibration waveform of a voltage controlled oscillator (VCO) could be treated as the analytic signal.

In this case Δφ (t) randomly modulates the phase of the clock waveform. An object of the present invention is therefore to provide a method for deriving Δφ (t) from the tabular form. 32 shows a block diagram of a first embodiment of a device for measuring a jitter according to the present invention. For example, an analog clock waveform will be from a PLL circuit under test 17 converted into a digital clock signal by an analog-to-digital converter ADC, and the digital clock signal is supplied to a Hilbert pair generator, which is used as a means 11 for transforming the analytic signal, by which the digital clock signal is transformed into a complex analytic signal. With respect to this analytic signal, a momentary phase of the analytic signal is detected by a momentum phase estimator 12 estimated. A linear phase is taken from the instantaneous phase by a linear phase removing means 13 to obtain a variable portion of the current phase, that is, a phase noise waveform. A peak-to-peak jitter is extracted from the phase noise waveform by a peak-to-peak detector 14 detected. In addition, an RMS jitter from the phase noise waveform is detected by an RMS detector 15 detected.

As already mentioned above, a reference clock signal which continues strictly to a constant period is supplied to the PLL circuit under test. 33 shows the reference clock signal. As a result, the PLL circuit under test does not internally generate a phase error, so that only a random jitter caused by a VCO appears on the clock waveform. A picked-up clock waveform is converted into an analytic signal, and its instantaneous phase is estimated to estimate a jitter based on the dispersion versus a linear phase. 34 shows a jitter test system where the present invention is applied.

Each block can also be realized by analog signal processing. However, in the present invention, each block is implemented by digital signal processing. Digital signal processing is more flexible than analog signal processing, and its speed and accuracy can be easily changed according to the circuit configuration. From the inventors' current experience in developing a noise analysis device for a television picture signal, it is believed that the number of bits required to quantize a clock waveform 10 Bits or more would be.

Now For example, an algorithm for measuring a jitter is described in of the present invention is used.

A Hilbert pair generator as in 32 and 35 An analytical signal transforming means 11 transforms a clock waveform X _c (t) into an analytic signal Z _c (i). According to equation (3.6), the Hilbert-transformed result of X _c (t) is given by the following equation (3.34). x ⌢ c (t) = H [x c (t)] = A c sin (2.pi.f c t + θ c + Δφ (t)) (3.34)

If X _c (t) and x ⌢ _c (t) are considered to be the real part and the imaginary part of a complex number, an analytic signal is given by the following equation (3.35). z c (t) = x c (t) + jx ⌢ c (t) = A c cos (2.pi.f c t + θ c + Δφ (t)) + jA c sin (2.pi.f c t + θ c + Δφ (t)) (3.35)

In this case, it is preferable as in 35 shown that the clock waveform X _c (t) by the band-pass filter 21a is performed to eliminate high-frequency components and a DC component, and that the filter output is used as a real part of the analytical signal Z _c (t), and that an output of the Hilbert transformer 21 , which is a result of a Hilbert transform of the filter output, is used as an imaginary part of the analytic signal Z _c (t). When the fundamental wave frequency of the clock waveform X _c (t) is assumed to be f ₀ , the pass band of the filter is 21a f ₀ / 2-1.5f ₀ . There is also a Hilbert transformer 21 in which a bandpass filter is present. In this case, the clock waveform X _c (t) becomes the Hilbert transformer 21 is supplied so that the clock waveform X _c (t) is passed through the internal band-pass filter, and then the filter output is Hilbert-transformed to be used as an imaginary part. On the other hand, the clock waveform X _c (t) is passed through the band-pass filter to be used as a real part.

The following Algorithm 3 is a calculation procedure that uses the "zero-geared theorem" (the fundamental wave of a waveform containing the zero-crossing information of the original waveforms). That is, Algorithm 3 is the computational procedure that uses this demonstration. In other words, the algorithm 3 transforms only the fundamental wave of a clock waveform into an analytic signal. 36 (a) shows the original clock waveform, which has a shape similar to a square wave. More precisely, this agent performs 11 for transforming an analytic signal, as in 67 shown a Fourier transform of the clock waveform using the FFT part 21 by. 36 (b) shows a two-sided power spectrum that is the result of the Fourier transform. Then, the negative frequency components through the band-pass filter 22 cut off. At the same time, as in 36 (c) shown only the fundamental wave of the clock waveform through a band-pass filter 22 extracted. That is, in this step, Hilbert transform and band pass filtering are performed simultaneously. If that is in 36 (c) spectrum shown by an inverse FFT part 23 Inverse Fourier transform, an analytical signal is obtained. Since only the frequency components in the vicinity of the fundamental wave are extracted by the band-pass filtering, the in 36 (d) is the basic waveform of the clock waveform, and X _c (t) shown as a solid line is a sum of sine waves.

Algorithm 3 (Procedure for transforming a real waveform into an analytic signal from its fundamental):

• 1. By fast Fourier transformation is c is transformed into the frequency domain;
• 2. Negative frequency components are truncated to zero. Frequency components in the vicinity of the clock frequency are through a bandpass filtering extracted, and other frequency components are truncated to zero;
• 3. The spectrum is determined by inverse fast Fourier transformation transformed into the time domain.

A momentary phase estimator 12 estimates an instantaneous phase of X _c (t) using Z _c (t). That is, the following equation (3.36.1) is obtained. Θ (t) = [2πf c + θ c + Δφ (t)] mod 2π (3.36.1)

Next, the instantaneous phase estimator applies 12 the above-mentioned phase unpacking method on Θ (t). As in 68 Namely, the instantaneous phase estimator comprises a momentary phase judging part 24 for estimating a current phase of the analytic signal Z _c (t) and a continuous-phase conversion part 25 for applying an unpacking method to the estimated instantaneous phase Θ (t) to obtain a continuous phase θ (t). As a result of the continuous phase transformation, the following equation (3.36.2) is obtained. θ (t) = 2πf c t + θ c + Δφ (t) (3.36.2)

37 (b) and 37 (c) show a momentary phase or an unwrapped phase. In addition, a linear phase remover estimates 13 using the linear trend estimation method mentioned above, a linear phase [2πf _c t + θ _c ] based on θ (t) with a linear phase estimation part 26 from. If next through a subtracting part 27 the linear phase of θ (t) is removed, a variable term Δφ (t) of the current phase, namely a phase noise waveform expressed by the following equation (3.36.3). θ (t) = Δφ (t) (3.36.3)

37 (b) shows Δφ (t). The jitter measuring algorithm used in the present invention can simultaneously detect a peak-to-peak jitter J _PP and an RMS jitter J _RMS from Δφ (t) through the peak-to-peak detector 14 and the RMS detector 15 estimated. That is, the following equations (3.37) and (3.38) can be obtained.

in the The following is the process of the invention also as Δφ (t) method designated.

When next becomes the method according to the invention logically compared with the zero crossing procedure.

First, it is shown that if only one rising edge of a signal (equal to zero crossing) is sampled, the Δφ (t) method is equivalent to the zero crossing method. When the period of zero crossing is expressed as T _ZERO , a clock waveform X _c (t) is expressed by the following equation (3.39)

Under Using Equation (3.35) can be given by the following equation (3.40) analytical signal are obtained.

From the equation (3.10.3), a momentary frequency of Z _c (t) is obtained by the following equation (3.41).

consequently f (t) can be expressed as follows become.

The is called, when only a rising edge of a signal is sampled shown that the Δφ (t) method equivalent to the zero crossing procedure.

In the zero-crossing method, the time resolution of the period measurement can not be arbitrarily selected. The time resolution of this method is determined by the zero crossing of the measured signal. By contrast, in the Δφ (t) method, both time resolution and phase resolution can be improved by increasing the number of samples per period. 39 Fig. 12 shows a comparison between the data of the conventional zero-crossing method and the data of the Δφ (t) method. It can be seen that the time resolution on the time axis and the phase resolution on the longitudinal axis are improved.

Now let us compare an upper limit of the sampling interval of the Δφ (t) method with that of zero by main action. The upper limit of the sampling interval of the Δφ (t) method can be derived from the conditions described above. That is, to unambiguously perform phase unpacking, a phase difference between adjacent analytic signals Z _c (t) must be less than π. For Z _c (t) to satisfy this condition, at least two samples must be sampled at the same interval within a period. Because z. For example, f _{C is} the frequency of X _c (t) given by equation (3.23), the upper limit of the sample interval is 1 / 2f _c . On the other hand, the upper limit of the equivalent sampling interval of the zero-crossing method is 1 / f _c .

Next, a sampling method using quadrature modulation will be described. The clock frequency of a microcomputer has increased by a factor of 2.5 every 5 years. Unless the method of measuring a jitter is scalable with respect to the measurement time resolution, the clock jitter of a microcomputer can not be measured. One method to make the method of measuring a jitter scalable is quadrature modulation. How out 28 and 16 can be seen, a phase noise spectrum is scattered by the clock frequency as the center frequency at a jittery clock waveform. A jittery clock waveform is thus a bandwidth limited signal. For this reason, it is possible to reduce the lower limit of the sampling frequency by combining the quadrature modulation with a low-pass filter.

40 (a) Fig. 10 is a block diagram showing a phase estimator for estimating Δφ (t) of a clock waveform using a quadrature modulation system. The input X _c (t) is multiplied in a complex mixer according to the following equation (3.43). cos (2π (f c + Δf) t + θ) + jsin (2π (f c + Δf) t + θ) (3.43)

A complex output of the low-pass filter is given by the following equation (3.44).

That is, X _c (t) is converted into an analytic signal Z _c (i) by the quadrature modulation and the low-pass filter, and the frequency is reduced to Δf. Subsequently, the analog signal is converted into a digital signal, and an instantaneous phase of X _c (t) is estimated by an instantaneous phase estimator, so that a current phase Θ (t) expressed by the following equation (3.45) can be obtained. Θ (t) = [2πΔft + (θ - θ c ) - Δφ (t)] mod2π (3.45)

Similar to the previous example, phase unpacking is performed on Θ (t), and a linear phase is removed by a linear phase remover, so that the following equation (3.46) can be obtained. θ (t) = -Δφ (t) (3.46)

As mentioned above, it has been shown that the lower limit of the sampling frequency of the Δφ (t) method is reduced from 2f _c to 2 (Δf) by combining the quadrature modulation with a low pass filter. Similarly, the lower limit of the equivalent sampling frequency of the zero-crossing method can be reduced from f _c to Δf. A similar effect can also be obtained by combining an in 40 (b) shown heterodyne system with a low-pass filter. Here, an input clock waveform X _c (t) with cos (2π (fc + Δf) t + θ) is multiplied by the mixer, and a frequency difference component is extracted from the output of the mixer by a low-pass filter or a band-pass filter. The difference frequency component is converted by the AD converter into a digital signal, and the digital signal is z. B. supplied to the Hilbert pair generator, which acts as a means 11 for reshaping the analytical signal.

Finally, the measurement time periods T _{meas of} the Δφ (t) method and the zero-crossing method are derived. T _{meas, ZERO of} the zero-crossing method is given by the following equation (3.47.1) as a time period required to collect the Δφ (t) of N points corresponding to the lower limit of an equivalent sampling frequency Δf.

For the Δφ (t) method the case of K times the number of samples per period is discussed. Therefore, one in the Δφ (t) method needed Time period for sampling N points of Δφ (t) having a frequency 2K (Δf) which is K times as high as the frequency of the lower limit of the sampling frequency is given by the following equation (3.47.2).

The Δφ (t) method can therefore measure Δφ (t) 2K times faster than the zero-crossing method. In addition, it can be seen that the measurement time resolution can be scaled by adjusting K scalable. By contrast, the time resolution of the zero-crossing method is defined by Δf. 41 shows a comparison between the Δφ (t) method and the zero-crossing method.

When next will be a method of estimating of a spectral power density function of a phase noise waveform Δφ (t). There at the above mentioned Algorithm 3 only the fundamental wave is extracted by band-pass filtering, There is the disadvantage that the Frequency range in which a spectral distribution of Δφ (t) is observed can be limited. Since the algorithm described below 4 serves to observe a spectral distribution of Δφ (t) becomes therein no bandpass filtering used. Conversely, the algorithm 4 described below can not used to observe Δφ (t) become.

When an analytic signal Z _c (t) is estimated, fast Fourier transform is used. In this case, X _c (t) W (t) (a waveform obtained by multiplying X _c (t) by a window function W (t)) is subjected to a fast Fourier transform. In general, the amplitude of W (t) has a value near zero near the first time and the last time (see, for example, reference c17). For this reason, the inverse Fourier transform calculated waveform X _c (t) W (t) has a large error near the first timing and the last timing so that X _c (t) W (t) can not be used as data , Also in the estimation of Z _c (t), the X _c (t) W (t) corresponding to the central region, ie, about 50% of the window function, is multiplied by an inverse of the window function 1 / W (t) to obtain Z _c ( t) and the values of both ends of X _c (t) W (t) must be discarded.

In this method, only 512 points of Z _c (t) of 1024 points of X _c (t) can be estimated. In this case, it is assumed that X _c (t) is recorded in a waveform recording buffer. In order to increase the number of samples for Z _c (t), it is necessary to segment the waveform recording buffer so that the waveform partially overlaps the previous waveform to calculate Z _c (t) corresponding to each time interval, and finally each Z _c (t) to obtain the entire composite Z _c (t).

If Z _c (t) is estimated, then a window function should be used which only causes the minimum modulation of an amplitude of X _c (t). The window function that can satisfy this condition is Hanning (see reference c17). This has only the minimum, ie a spectrum at the upper and lower sideband. In this case, about 25% overlap a waveform.

• 1. X_c(t) wird ab der Startadresse aus dem Wellenform-Aufzeichnungspuffer 31 entnommen (69);
• 2. X_c(t) wird mit einer Fensterfunktion W(t) durch ein Fensterfunktion-Multiplizierteil 32 multipliziert;
• 3. Das Produkt X_c(t)W(t) wird durch ein schnelles Fouriertransformierteil 33 in den Frequenzbereich transformiert;
• 4. Nur die negativen Frequenzkomponenten werden auf Null beschnitten;
• 5. Das Spektrum wird durch ein schnelles inverses Fouriertransformierteil 35 in den Zeitbereich transformiert, um Z_c(t)W(t) zu erhalten;
• 6. Z_c(t)W(t) wird mit einem Kehrwert der Fensterfunktion durch ein Fensterfunktion-Dividierteil 36 multipliziert, um Z_c(t) zu erhalten;
• 7. X_c(t) wird aus dem Wellenform-Aufzeichnungspuffer entnommen. In diesem Fall wird X_c(t) so entnommen, daß zwei benachbarte X_c(t) miteinander um ca. 25% überlappen; und
• 8. Die obigen Schritte 2–7 werden wiederholt, bis das gesamte Z_c(t) erhalten ist.

Algorithm 4 (procedure for estimating a spectrum of an analytic signal):

• 1. X _c (t) is taken from the start address of the waveform record buffer 31 taken ( 69 );
• 2. X _c (t) is multiplied by a window function W (t) by a window function multiplier part 32 multiplied;
• 3. The product X _c (t) W (t) is replaced by a fast Fourier transforming part 33 transformed into the frequency domain;
• 4. Only the negative frequency components are truncated to zero;
• 5. The spectrum is characterized by a fast inverse Fourier transforming part 35 transformed into the time domain to obtain Z _c (t) W (t);
• 6. Z _c (t) W (t) is given with a reciprocal of the window function by a window function dividing part 36 multiplied to obtain Z _c (t);
• 7. X _c (t) is taken from the waveform record buffer. In this case, X _c (t) is taken so that two adjacent X _c (t) overlap with each other by about 25%; and
• 8. The above steps 2-7 are repeated until the entire Z _c (t) is obtained.

A power spectrum for a thus processed Z _c (t) is determined by a spectrum analyzer 38 estimated.

Next, a specific example will be described in which the effectiveness of the above Method for measuring a jitter is checked by a simulation.

Relationship between the zero crossing of a clock waveform and the fundamental wave of the clock waveform 21 shown ideal clock waveform that "the zero crossing of the fundamental wave of a waveform containing the zero crossing information of the original waveform (zero crossing theorem)". That is, a clock waveform is Fourier-transformed, the fundamental frequency component is left over, and the frequency components of the second and higher harmonics are clipped to zero. This spectrum is inverse Fourier transformed to obtain the recovered waveform in the time domain. The period is estimated from the zero crossing of this waveform. 42 (a) shows a spectrum from which the harmonics have been removed. 42 (b) shows the recovered waveform with the original clock waveform over it. Correspondingly, a partial sum spectrum is up to the harmonic 13 , Order and the recovered waveform in 43 (a) respectively. 43 (b) applied. Comparing each recovered waveform to the original clock waveform, one sees that the zero crossing is a fixed point. That is, a time of zero crossing is constant regardless of the number of orders of the harmonics used in the partial sum.

A relative error between a "period of the original clock signal" and a "period estimated from a recovered waveform" is obtained for each order of harmonics by incrementing the number of harmonics of 1 to 13. 44 (a) shows the relative error values of the period. An error of the estimated period does not depend on the number of harmonic orders. Thus it is shown that the "zero crossing of the fundamental wave gives a good approximation to the zero crossing of the original signal". The relative errors of rms values of a waveform are given for comparison purposes. 44 (b) shows the relative errors of the estimated rms values from a recovered waveform compared to the rms values of the original clock waveform. It can be seen that in the effective case, the relative error does not decrease unless the partial sum contains higher-order harmonics.

When Summing up the above results one can state that "if only the fundamental of a Clock signal can be extracted, a current period from the Zero crossing of the original one Estimated clock waveform can be. In this case, the estimation accuracy is not improved even if more harmonics are added to the estimation. "Thus, the" zero crossing theorem "is proved.

Next, a case where the method of measuring a jitter (Δφ (t) method) according to the present invention is applied to a jitter-free PLL circuit will be explained. As the PLL circuit, the PLL circuit disclosed in the explanation of the prior art is used. An in 46 The PLL circuit shown is constructed in a SPICE simulation from 0.6 μm CMOS parts and is operated by a power supply of 5 V to obtain various waveforms. 45 shows parameters of a MOSFET. An oscillation frequency of the VCO is 128 MHz. A frequency divider divides a vibration waveform of the VCO to a quarter of the frequency to convert it into a PLL clock having a frequency of 32 MHz. The time resolution of the SPICE simulation waveform is 50 ps. Then, a phase noise waveform Δφ (t) is calculated from the simulation waveform. The estimation of Δφ (t) is simulated with Matlab.

47 (a) shows an input waveform of the VCO. 47 (b) shows an oscillation waveform of the VCO. 48 (a) shows an output power spectrum of the VCO. The oscillation waveform of the VCO of 8092 points is multiplied by a "minimum 4-term window function" (see, for example, reference c18), and a spectral power density function is estimated by means of fast Fourier transform. 48 (b) shows the spectral power density function of the algorithm 4 estimated Δφ (t). As in 69 is shown, an analytical signal Z _c (i) by the means for reshaping the analytical signal 11 generated using the algorithm 4. Then, an instantaneous phase θ (t) of this analytic signal Z _c (t) with the instantaneous phase estimator 12 is estimated, and a linear phase becomes out of the current phase θ (t) by the linear phase detector 13 to obtain the phase noise waveform Δφ (t). Then, a power spectrum of the phase noise waveform Δφ (t) becomes the spectrum analyzing part 37 receive. The conditions for the fast Fourier transform are the same as those used to obtain the spectral output power density function of the VCO. If 48 (a) With 48 (b) If one compares, in the power spectrum of Δφ (t), the spectrum of the oscillation frequency of the VCO of 128 MHz is attenuated by approximately 120 dB. The power density function of Δφ (t) has higher levels at lower frequencies through the influence of 1 / f noise.

49 shows diagrams for comparing the conventional zero-crossing method with him inventive method. 49 (a) FIG. 12 shows a result of instantaneous period measurement of a vibration waveform of the VCO measured by the zero-crossing method. 49 (b) shows Δφ (t) estimated by the method of algorithm 3 according to the present invention. A spectrum with a frequency range (10 MHz to 200 MHz), in which the harmonic 2 , Order was not included, was extracted by a band-pass filter, and Δφ (t) was obtained by fast inverse Fourier transform. From the fact that the instantaneous period and Δφ (t) indicate no noise, it can be shown that this PLL circuit actually has no jitter.

In 47 (a) It can be seen that a frequency increase pulse is applied to the VCO at a time of approximately 1127 ns. Two frequency sweep pulses are applied to the VCO at times of approximately 908 ns and 1314 ns, respectively. This is based on the performance of the PLL circuit used in the simulation. Looking at that in 49 (b) shown Δφ (t), so a phase change occurs by the influence of the frequency increase pulse at about 1140 ns time. Phase changes due to the effects of the two frequency sweep pulses occur at about 920 ns and 1325 ns, respectively. These are deterministic data. On the other hand, in the current period of 49 (a) a phase change due to the influence of the frequency increase pulse at a time of about 1130 ns. A phase change due to the influence of the frequency reduction pulses occurs only at about 910 ns. An influence of the frequency sweep pulse at about 1314 ns does not occur in the change of the current period.

If summarizing the above results, it can be seen that in the Δφ (t) method according to the invention the oscillation state corresponding to a frequency increase pulse or a frequency sweep pulse changes, if there is no phase noise. The Δφ (t) method has in relation to usual Zero crossing procedure a higher one Resolution. The spectral power density function of Δφ (t) is through the spectrum the oscillation frequency of the VCO little affected.

When next a case is explained where the above mentioned Method for measuring a jitter according to the present invention (Δφ (t) method) is applied to a jittery PLL circuit. In addition will the method according to the present invention with the current Periodic assessment compared using the zero crossing procedure to verify that the inventive method to measure a jitter for a phase noise estimate is usable.

As mentioned above, jitter can be simulated by applying additive noise to the VCO to randomly modulate the phase of the oscillation waveform of the VCO. In the present invention, the jitter of the PLL circuit was simulated by supplying an additive noise to an input end of the VCO oscillation circuit. A Gaussian noise was generated using the function randn0 of Matlab. Further, based on SPICE simulation, Gaussian noise was applied to an input end of the VCO of FIG 50 supplied PLL circuit shown.

51 (a) shows an input waveform of the VCO when 3σ of the Gaussian noise is 0.05V. 51 (b) shows an oscillation waveform of the VCO. If you compare 47 (a) With 51 (a) , it can be seen that the number of frequency increase pulses is increased from 1 to 4 by the jitter, and that the number of frequency lowering pulses is also increased from 2 to 3.

52 (a) shows the output power spectrum of the VCO. The noise spectrum is increased. 52 (b) shows a spectral power density function of Δφ (t). If you compare 48 (b) With 52 (b) , it can be seen that the power of Δφ (t) is increased. The spectral power density function of Δφ (t) has higher levels at lower frequencies.

53 (a) and 53 (b) Fig. 15 are diagrams for comparing the conventional zero crossing method with the method for measuring a jitter according to the present invention.

53 (a) shows a result of the instantaneous period measurement of an oscillation waveform of the VCO measured by the zero-crossing method. 53 (b) shows Δφ (t) estimated by the method of measuring a jitter according to the present invention. If you compare 53 With 49 , it can be seen that the corresponding change in the waveform differs significantly. That is, if there is no jitter, the instantaneous period and / or Δφ (t) have low frequency components. However, if jitter exists, current period and / or Δφ (t) have relatively high frequency components. This means that the current period or the Δφ (t), as in 53 shown corresponds to a phase noise. If 53 (a) carefully with 53 (b) is compared, the following is recognized: (i) The current period and Δφ (t) are somewhat similar to each other. However, (ii) time resolution and phase (perio the -) resolution of Δφ (t) higher than that of the current period.

Do you understand the The above results together, so the inventive method for measuring a jitter (the Δφ (t) method) Estimate a phase noise with a high time resolution and a high phase resolution. Of course you can also the zero crossing method phase noise in the form of a estimate the current period. A disadvantage of the zero-crossing method, however, is that the time resolution and the period estimate resolution Zero crossings are limited.

When next becomes the conventional one Method of estimating a jitter with the inventive method for measuring a Jitters (the Δφ (t) method) compared. But what about the estimation of a RMS jitter, the Δφ (t) method compared with the spectral method, and with respect to the estimation of a Peak-to-peak jitters will be the Δφ (t) method with the Zero crossing procedure compared.

54 shows conditions for comparing the estimated values of the RMS jitter. The spectral power density function of Δφ (t) estimated by the above-mentioned algorithm 4 is used as a spectrum according to the conventional method. In the spectral method, a sum of the phase noise power spectrum is obtained in the frequency range (10 MHz to 200 MHz) in which the second order harmonic is not included, and an RMS jitter J _RMS is estimated by the equation (3.33). The in 54 (a) black painted area is the spectrum corresponding to the frequency range. On the other hand, in the Δφ (t) method, an RMS jitter J _{RMS is} estimated from the above-mentioned algorithm 3 and equation (3.38). This corresponds to an effective value of the phase noise waveform Δφ (t). The 3σ of a Gaussian noise is applied to an input end of the VCO of FIG 50 is shown by changing its value from 0 to 0.5V to estimate an RMS jitter value of an oscillation waveform of the VCO. As in 55 1, the Δφ (t) method and the spectral method each provide substantially compatible estimates.

56 shows graphs for comparing estimates of peak-to-peak jitter. Triangular markers each denote peak values. The positions of the triangular marks are different for the Δφ (t) method and the spectral method. This means that a peak-to-peak jitter is not necessarily generated at the zero crossings. As in 57 1, the Δφ (t) method and the spectral method provide mutually compatible estimates.

If Summarizing the above results, the Δφ (t) method yields according to the present Invention in the estimation an RMS jitter estimates, those with the conventional ones Spectral method are compatible. Also in the estimation of a Peak-to-peak jitter provides the Δφ (t) method Estimates which are compatible with those of the zero crossing procedure.

Next, the performance of the conventional jitter estimation method and the performance of the Δφ (t) method of the present invention are compared using a PLL clock clocked down to 1/4 of the frequency. As a PLL circuit, the in 50 Used PLL circuit needed. The frequency divider of this circuit divides an oscillation waveform of the VCO down to 114 of the frequency to convert the oscillation frequency to a PLL clock having a frequency of 32 MHz. 66 (b) shows the waveform of the PLL clock. To compare with the results of the above examples, the 3σ of additive Gaussian noise is set to 0.05V.

When the period of the oscillation waveform of the VCO is τ _VCO , the period of the frequency-quartered PLL clock τ _{PLL is} given by the following equation (3.48).

In this case, ε _{i represents} a time fluctuation of a rising edge. From equation (3.48), it can be seen that the frequency division has a jitter reducing effect.

58 shows diagrams for comparing the zero-crossing process with the Δφ (t) method according to the invention. 58 (a) shows the result of a measurement of a current periods of the PLL clock with the zero-crossing method. 58 (b) shows Δφ (t) estimated with the algorithm mentioned above mus 3 of the Δφ (t) method according to the invention. A spectrum in the frequency range (20 MHz to 59 MHz) in which the second-order harmonic is not included is extracted by a band-pass filter, and Δφ (t) is obtained by inverse fast Fourier transformation. It can be seen that the Δφ (t) of the PLL clock is significantly different from that in 53 (b) differs Δφ (t) obtained from the oscillation waveform of the VCO. The Δφ (t) of the PLL clock emphasizes phase discontinuity points. The phase discontinuity points are at equal intervals and corresponding to the regular frequency dividing edges.

59 shows a diagram for comparing the estimates of the RMS jitter. In the spectral method (i) Δφ (t) was estimated from the PLL clock with the algorithm 4 of the Δφ (t) method according to the invention; (ii) the 8092 points of Δφ (t) were multiplied by the "minimum 4-term window function" (see, e.g., reference c18), and the spectral power density function was estimated by fast Fourier transform Spectral method a sum of the phase noise power spectrum in the frequency range (20 MHz to 59 MHz), in which the second order harmonic is not included, and an RMS jitter J _RMS was estimated by means of equation (3.33). t) method, on the other hand, an RMS jitter J _RMS was estimated using Algorithm 3 and Equation (3.38) 59 As shown, the Δφ (t) method provides substantially compatible estimates. In the vicinity of a 3σ of an additive Gaussian noise of 0.05 V, however, the RMS jitter J _RMS estimated using the Δφ (t) method is greater than the RMS jitter of the spectral method. The reason for this is explained together with the test result of the peak-to-peak jitter J _PP . If 59 With 55 Comparing, it can be seen that the frequency division to 1/4 of the frequency in this particular example leads to a J _RMS of 1 / 3.7.

60 shows a diagram for comparing the estimates of the peak-to-peak jitter. The Δφ (t) method and the zero-crossing method provide substantially compatible estimates. However, in the vicinity of a 3σ of Gaussian additive noise of 0.05, the peak-to-peak jitter J _PP estimated by the Δφ (t) method is larger than that estimated in the zero-crossing method. The reason for this will be explained next.

61 (a) shows a phase noise power spectrum for 3σ = 0.05V (essentially the same as the zero crossing procedure). A cursor in the figure denotes an upper limit frequency in the estimation of Δφ (t). A weak phase modulation spectrum can be seen near the cursor. 62 shows an analytic signal Z _c (t) for this case. It can be seen that the analytical signal Z _c (t) has become a complex sine wave due to the weak phase modulation spectrum. For this reason, the current phase changes evenly.

61 (b) shows a phase noise power spectrum when 3σ = 0.10 V (larger estimate than in the zero-crossing method). This phase noise power spectrum exhibits a typical shape for 1 / f noise. The fundamental frequency of this 1 / f noise is not the PLL clock frequency 32 MHz. However, the Z _c (t) of the 1 / f noise is given by the Hilbert pair of a square wave derived from the above-mentioned example. That's why this takes in 63 Z _c (t) has the same shape as that in FIG 22 shown Hilbert couple. Since Z _c (t) has a complex shape, the instantaneous phase changes greatly. Therefore, J _PP and J _RMS, when estimated by the Δφ (t) method, assume large values when 3σ of additive Gaussian noise is close to 0.05V.

If you compare 60 With 57 , it can be seen that the frequency division to 1/4 in this specific example leads to a J _PP of 1 / 3.2.

Do you understand the the above results, it has been verified that with the Δφ (t) method as well an RMS jitter and a peak-to-peak jitter of a frequency-divided Estimated tact can be. The estimate is with the conventional one measurement methods compatible. When the phase noise power spectrum is the shape of 1 / f noise, the Δφ (t) method provides a larger value than the conventional one Measurement methods.

As is apparent from the above discussion, the effectiveness of the method of measuring a jitter according to the invention (the Δφ (t) method) has been verified by a simulation. In addition, it has been verified that the zero crossing of the original waveform can be estimated from the zero crossing of the fundamental. This has created an important basis for estimating a zero-crossing compatible peak-to-peak jitter with the Δφ (t) method. Namely, when Δφ (t) is estimated by using the spectrum of a whole frequency range instead of only the fundamental wave, an in 56 (b) obtained waveform. That is, a ripple at higher frequencies is superimposed on the waveform. Furthermore, as in 57 shown, the compatibility with the zero-crossing method can not be realized. In addition, it has been verified that when the Δφ (t) method is applied to a jittery PLL circuit, the Δφ (t) method is effective for phase noise estimation. In addition, it has become clear that the conventional method of measuring a jitter is compatible with the Δφ (t) method in terms of peak-to-peak jitter and RMS jitter. In addition, it has been verified that a jitter of a frequency-divided clock can also be estimated compatible.

In addition, the present invention proposes a scalable device and a scalable method for measuring a jitter. For example, as indicated by a dashed line in 32 shown a frequency of a clock waveform X _c (i) from the PLL circuit under test 17 or the like through the variable frequency divider 41 to 1 / N (N is an integer) of the frequency is divided down, that is, the clock period is ver-N times. When as a frequency divider 41 z. B. in 70A T-toggle flip-flop, which is triggered by a rising edge, becomes an input clock T, as in FIG 70B shown as a clock Q with twice the time period output. By multiplying the period of the clock waveform X _c (t) by N (N is an integer equal to or greater than 2), an analog-to-digital converter ADC operating at a relatively low operating frequency (FIG. Sampling frequency). That is, even if the frequency of the clock waveform X _c (t) is high, its jitter can be measured by decreasing the frequency of the clock waveform X _c (t) to 1 / N, so that the analog-to-digital converter ADC is usable.

When the peak-to-peak jitter and the RMS jitter of the clock waveform X _c (t) are taken as J _PP1 and J _RMS1 , respectively, and these jitter of the clock waveform X _c (t) are measured, their frequency is 1 / N of the frequency the clock waveform X _c (t) is divided down, these jitter are given by the equations (4.1) J PPN = J PP1 / N, JR MSN = J RMS 1 / N (4.1)

This is checked by an in 71 shown measuring system. A clock signal is from a main clock generator 43 in an automatic test device ATE 42 generated. This clock signal is generated by an external sine wave jitter in a jitter generator 44 phase modulated so that a jitter is added to the clock signal. The clock to which a jitter has been added becomes 1 / M by a variable frequency divider 50 divided down. The frequency-divided output becomes a digital oscilloscope 45 supplied as a test signal. A clock signal from the main clock generator 43 is through the frequency divider 50 frequency divided to 1 / M and the digital oscilloscope 45 supplied as a trigger signal. A peak-to-peak jitter J _PP and an RMS jitter ^J RMS are performed with the digital oscilloscope 45 measured, and the measurement results are in 72 respectively. 73 shown. In 72 and 73 a lateral axis denotes the number of frequency divisions N, and a longitudinal axis denotes values of jitter. A symbol Δ denotes a measured value, and a broken line indicates a 1 / N curve. For each peak-to-peak jitter and RMS jitter, the various values of N corresponding jitter values are substantially equal to the values of the 1 / N curve, showing that the equations 4.1 are fulfilled.

As in 74 shown becomes the clock signal from the main clock generator 43 in the jitter generator 44 a jitter is added by a sine wave f _sin or a bandwidth limited random noise bw _edge . The jitter-added clock signal is passed through the variable frequency divider 41 frequency divided. Then, a phase noise waveform Δφ (t) is evaluated by a Δφ evaluator 46 with respect to the frequency-divided clock signal, and the peak-to-peak jitter and the RMS jitter are evaluated. The Δφ-evaluator 46 includes z. As the analog-to-digital converter ADC, the means 11 for transforming the analytic signal, the instantaneous phase estimator 12 , the linear phase remover 13 , the peak-to-peak detector 14 and the RMS detector 15 , as in 32 shown. The peak-to-peak jitter values and the RMS jitter values obtained in this case for different numbers of frequency divisions N are in 75 respectively. 76 shown. In these figures, a symbol O denotes one with the Δφ evaluator 46 and a symbol Δ denotes a value obtained by the zero-crossing method. A dashed line in 75 denotes a 1 / N curve. From these 75 and 76 It can be seen that a jitter by combining the frequency divider 41 and the Δφ (t) method can be accurately measured.

In 32 becomes a clock signal X _c (t) from the PLL circuit under test 17 through the frequency divider 41 divided down to 1 / N frequency. This frequency divided clock signal is converted to a digital signal, and this digital signal is passed through the Hilbert pair generator 11 converted into a complex analytic signal to obtain a momentary phase of the analytic signal. A linear component is removed from the current phase to obtain a phase noise waveform Δφ (t). Then, a peak-to-peak jitter of the clock signal X _c (t) can be detected by detecting a peak-to-peak value of Δφ (t). and then by multiplying, using the multiplier 47 , the peak-to-peak value of Δφ (t) can be obtained with N. In addition, an RMS jitter of the clock signal X _c (t) can be calculated by calculating an RMS value of Δφ (t) and multiplying the RMS value of Δφ (t) by N by the multiplier 48 to be obtained.

In this case, a scalable measurement can be performed by selecting the number of frequency divisions N of the frequency divider 41 corresponding to the frequency of the clock signal X (t), so that the analog-to-digital converter ADC is operable.

In addition, in the in 40a illustrated embodiment, a clock signal from the PLL circuit under test 17 as shown by a dashed line through the frequency divider 41 divided down to 1 / N frequency. The analytical signal can be obtained by multiplying the frequency-divided output by a sine wave signal in the mixer and multiplying the frequency-divided output by a cosine wave signal in the mixer. Similarly, in the case of 40b As shown embodiment, a clock signal from the PLL circuit under test 17 through the frequency divider 41 divided down to 1 / N frequency. The analytical signal can also be obtained by multiplying the frequency-divided output by a cosine wave signal in the mixer and supplying the mixer output to the low-pass filter.

Next, in the present invention, a configuration in which the AD converter is replaced by a comparator will be explained. Such as B. with dashed lines in 32 and 68 is shown, instead of the analog-to-digital converter ADC, a comparator 51 used. Pulses with a constant period are sent to the comparator 51 applied, and an input clock waveform X _c (t) is z. B. compared to a rising edge of the pulse with an analog reference variable V _R. When the level of the clock waveform X _c (t) z. B. is greater than that of the analog reference variable V _R , a predetermined high level is output, and when the level of the clock waveform X _c (t) is smaller than that of the analog reference variable V _R , a predetermined low level is output.

Further, there is the case that an input clock waveform X _c (t) is distorted and the amplitude of a harmonic component of the clock waveform X _c (t) is larger than that of a fundamental component. From such a viewpoint, it is better that a low-pass filter (or a band-pass filter) is used for extracting a fundamental component of the clock waveform X _c (i) at the input side of the comparator 51 is provided. An output signal from the comparator 51 will be in the middle 11 is input to transform the analytic signal, and is processed similarly to the output signal of the ADC ADC to obtain a jitter of the input clock waveform X _c (t).

Jitter of an output of the VCO (voltage controlled oscillator), which is similar to a sine wave, is obtained in the case where the analog-to-digital converter ADC in the in 32 shown measuring device used, as well as in the case that the comparator of in 32 shown measuring device is used. The measurement result of the peak-to-peak jitter is in 77 is shown, and the measurement result of the RMS jitter is in 78 shown. In these figures, a black circle indicates the case of the analog-to-digital converter ADC, a white circle shows the case of the comparator 51 and a lateral axis denotes the bit number of the analog-to-digital converter ADC.

In 77 In the case of the two-bit ADC, where the analog-to-digital converter ADC was used, peak-to-peak jitter was 0.9454, and peak-to-peak jitter was for an eight-bit ADC was 0.9459. In the case of the comparator 51 For example, a peak-to-peak jitter was 0.9532. Even if the comparator 51 is used, the measurement result agrees with an accuracy of two digits with that of the case where the analog-to-digital converter ADC is used. As a result, it is understood that the jitter measurement with this level of accuracy is also made using the comparator 51 is possible. How to get by 78 understands, even if the comparator 51 is used, an RMS jitter is obtained, which coincides with an accuracy of two digits with that of the case where the analog-to-digital converter ADC is used.

79 and 80 each show a measurement result of a peak-to-peak jitter and a measurement result of a similarly measured RMS jitter when the output signal of the PLL circuit 17 which is close to a square waveform, is used as an analog clock waveform X _c (t) and this signal from the frequency divider 41 is divided down. A peak-to-peak jitter is 0.3429 in the case where the comparator 51 is used. A peak-to-peak jitter in the case where the analog-to-digital converter ADC is used and the ADC has a two-bit output is 0.342. When the analog-to-digital converter ADC is used and the ADC has an eight-bit output, the peak-to-peak jitter is 0.3474. From this one can conclude that even if the comparator 51 is used, a peak-to-peak jitter can be measured with the accuracy of two digits. Similarly, an RMS jitter is .500 in the case where the comparator 51 is used. Of the RMS jitter is 0.0505 in the case where the analog-to-digital converter ADC is used and the ADC has a two-bit output. Further, the RMS jitter is 0.0510 in the case where the analog-to-digital converter ADC is used and the ADC has an eight-bit output. It can be seen that even if the comparator 51 is used, an RMS jitter can be measured with an accuracy of two digits.

If the comparator 51 is used, an analog clock waveform X _c (t) can also be used by the frequency divider 41 be divided down to the comparator 51 to be fed. As indicated by dashed lines in 40 (a) shown, can be a comparator 51c after multiplying a clock waveform X _c (t) by a cosine wave in the mixer and then passing it through a low-pass filter instead of the converter ADC to convert the low-pass filter output of that signal to a digital signal, and a comparator 51s may be used after multiplying a clock waveform X _c (i) by a sine wave in the mixer and passing it through a low pass filter instead of the converter ADC to convert the low pass filter output of that signal into a digital signal. This processing case can be applied to both cases, both where the frequency divider 41 is used as well as where the frequency divider is not used. As in 40 (b) shown with dashed lines, can be a comparator 51 instead of the converter ADC for converting a frequency-converted output of a clock waveform X _c (t), which is converted by a mixer and a low-pass filter into a low-frequency band signal, into a digital signal. This processing case can be applied to both cases, both where the frequency divider 41 is used, as well as where the frequency divider 41 not used. To get an input signal of in 67 and 69 shown means 11 For generating the analytic signal, as shown by dashed lines in these figures, a comparator 51 instead of the analog-to-digital converter ADC, an output of the comparator 51 to the means 11 to provide for the transformation of the analytical signal. In these cases, the clock waveform X _c (t) can also by the frequency divider 41 for the supply to the comparator 51 be frequency divided.

• (i) Das Δφ(t)-Verfahren erfordert kein Trigger-Signal.
• (ii) Ein Peak-to-Peak-Jitter und ein RMS-Jitter können gleichzeitig aus dem Δφ(t) abgeschätzt werden.
• (iii) Ein mit dem Δφ(t)-Verfahren abgeschätzter Peak-to-Peak-Jitterwert ist mit einem Schätzwert des herkömmlichen Nulldurchgangsverfahrens kompatibel.
• (iv) Ein mit dem Δφ(t)-Verfahren abgeschätzter RMS-Jitterwert ist mit einem mit dem herkömmlichen Nulldurchgangsverfahren abgeschätzten Wert kompatibel.
• (v) Bei der Messung eines Jitters mit einem herkömmlichen Spektrumanalysator ist es notwendig, Frequenzen abzufahren und die Frequenzen langsam abzufahren, um die Auflösung zu erhöhen. Deshalb erfordert die Messung ca. 5 bis 10 Minuten. Gemäß der vorliegenden Erfindung ist jedoch selbst dann, wenn die Messung 1000 Perioden bei einer Frequenz von beispielsweise 10 MHz des Taktsignals X_c(t) erfordert, die Meßzeitperiode nicht länger als 100 ms, und die Messung kann innerhalb der für eine VLSI-Prüfung vorgesehenen Zeit vollendet werden. (vi) Wenn die Frequenz des Taktsignals X_c(t) hoch ist, kann ein Jitter durch Frequenzteilen des Taktsignals X_c(t) durch N und durch Zuführen des frequenzgeteilten Taktsignals zu einem Δφ-Bewerter gemessen werden. Insbesondere wenn die Frequenz des Taktsignals X_c(t) von Fall zu Fall unterschiedlich ist, kann durch Ändern der Zahl von Frequenzteilungen eine skalierbare Messung durchgeführt werden.
• (vii) Bei dem in 70 gezeigten Beispiel werden Anstieg und Abfall des frequenzgeteilten Signals Q nur durch die steigende Flanke des Taktsignals T bestimmt. Deshalb kann im Falle der Verwendung des Frequenzteilers 41 ein Jitter nur der steigenden Flanke oder der fallenden Flanke des Taktsignals X_c(t) gemessen werden, indem die Zahl der Frequenzteilungen zu 2 W definiert wird (W ist eine ganze Zahl gleich oder größer als 1).
• (viii) Wenn der Komparator 51 verwendet wird, kann, da ein Hochgeschwindigkeitskomparator leichter zu realisieren ist als ein Hochgeschwindigkeitskomparator ADC und außerdem ein Hochgeschwindigkeitskomparator in einer generischen automatischen Prüfeinrichtung (ATE) vorhanden ist, auch bei einem Hochgeschwindigkeitstaktsignal X_c(t) das Taktsignal X_c(t) dem in der ATE vorhandenen Komparator zugeführt werden, und die Ausgabe des Komparators kann dem Mittel 11 zur Umformung des analytischen Signals zugeführt werden.

As described above, the method of measuring a jitter of a clock according to the present invention includes the following signal processing steps: transforming a clock waveform X _c (t) into a complex analytic signal using the analytical reforming means 11 and estimating a variable term Δφ (t) of a current phase. This method has the following features.

• (i) The Δφ (t) method does not require a trigger signal.
• (ii) A peak-to-peak jitter and an RMS jitter can be estimated simultaneously from the Δφ (t).
• (iii) A peak-to-peak jitter value estimated by the Δφ (t) method is compatible with an estimate of the conventional zero-crossing method.
• (iv) An RMS jitter value estimated by the Δφ (t) method is compatible with a value estimated by the conventional zero-crossing method.
• (v) When measuring a jitter with a conventional spectrum analyzer, it is necessary to ramp down frequencies and slow down the frequencies to increase the resolution. Therefore, the measurement requires about 5 to 10 minutes. However, according to the present invention, even if the measurement requires 1000 periods at a frequency of, for example, 10 MHz of the clock signal X _c (t), the measurement time period is not longer than 100 ms, and the measurement can be within the range provided for a VLSI test Time to be completed. (vi) When the frequency of the clock signal X _c (t) is high, jitter can be measured by frequency-dividing the clock signal X _c (t) by N and supplying the frequency-divided clock signal to a Δφ evaluator. In particular, if the frequency of the clock signal X _c (t) differs from case to case, a scalable measurement can be performed by changing the number of frequency divisions.
• (vii) In the case of 70 In the example shown, the rise and fall of the frequency-divided signal Q are determined only by the rising edge of the clock signal T. Therefore, in the case of using the frequency divider 41 a jitter of only the rising edge or the falling edge of the clock signal X _c (t) can be measured by defining the number of frequency divisions at 2 W (W is an integer equal to or greater than 1).
• (viii) If the comparator 51 is used, since a high-speed comparator is easier to realize as a high speed comparator ADC and also a high speed comparator in a generic automatic test equipment (ATE) even with a high speed clock signal X _c (t) is present, the clock signal X _c (t) which in the ATE existing comparator can be fed, and the output of the comparator can be the means 11 be fed to the transformation of the analytical signal.

As before with reference to 81a For example, the conventional zero-crossing method or the conventional time-interval method is a method in which a relative fluctuation between zero-crossings is detected. A peak-to-peak Jitter J _PP , using a conventional zero-crossing method obtained peak-to-peak jitter J _{PP is} compatible, can be obtained with the Δφ (t) method. As in 82 For example, one shown by the phase noise detection means 61 that means 11 for transforming the analytic signal, the instantaneous phase estimator 12 and the linear phase first remover 13 comprises detected phase noise waveform Δφ (t) in a zero-crossing sampler 62 whereby the phase noise waveform Δφ (t) is sampled at a nearest instant at a zero crossing point of the real part X _c (t) of the analytic signal Z _c (t). That is, a waveform of the real part X _c (t) of the analytic signal is in 83a and sampling points (arithmetic processing timings) closest to a zero crossing point of the rising (or falling) waveform are detected by a zero crossing point detection part 63 detected. 83a Circle marks indicate the points closest to a detected zero crossing point. These points are called approximate zero crossing points. A phase noise waveform Δφ (t) at each of the approximated zero crossing points becomes as indicated by circle marks in 83b shown by the zero crossing scanner 62 added. Each of the recorded values is an amount of deviation from an ideal point (zero crossing point) of the real part X _c (t) of the jitter-free analytic signal. By determining a difference between each sample and a value of Δφ (t) sampled immediately before, a fluctuation between zero crossings, ie a peak-to-peak jitter J _PP , can be obtained. A J _PP = Δφ _{n + 1} -Δφ _n can be calculated from the n-th sample Δφ _n and the n + 1-th sample Δφ _{n + 1 of} the in 83b shown Δφ (t) can be obtained.

As in 82 can show a difference between a sample and one immediately before through the zero-crossing sampler 62 sampled value through a differential circuit 64 are obtained sequentially to determine a peak-to-peak jitter J _PP . Based on the obtained sequence of peak-to-peak jitter J _PP , a difference between the maximum value and the minimum value is detected by the peak-to-peak detector 14 and an RMS value is detected by the RMS detector 15 calculated. A differential waveform of the sampled phase noise waveform from the zero crossing sampler 64 is from the differential circuit 64 calculated, and the differential phase noise waveform is the detectors 14 and 15 fed.

A method of detecting an approximate zero-crossing point in the zero-cross point detection part 63 is described. Assuming that the maximum value of a waveform of an input real part X _c (t) corresponds to a 100% level and the minimum value corresponds to a 0% level, a 50% level becomes V (50%) of a difference between the maximum value and the minimum value calculated as zero crossing level. A difference between a sample and the 50% level V (50%) and a difference between its adjacent sample and the 50% level V (50%), ie (X _c (j-1) -V (50%) ) and (X _c (j) -V (50%)) are calculated, and further, a product of these values (X _c (j-1) -V (50%)) x (X _c (j) -V (50%)). When X _c (t) crosses the 50% level, ie the zero level, the sample X _c (j-1) or X _c (j) changes from a negative value to a positive value or from a positive value to a negative one Value. Thus, if the product is negative, it is detected that X _c (t) has crossed the zero level and a time j-1 or j at which the smaller absolute value of the sample X _c (j-1) or X _c (i) is detected is obtained as the approximate zero crossing point.

A jitter was with the in 84 The conventional time-interval analyzer shown in FIG. 1 was measured, and accordingly, a jitter as shown in FIG 85 shown with the in 82 Measured device measured. In 84 became a sine wave signal from a signal source 65 frequency divided and by a frequency divider 66 converted into a clock signal with a frequency of 1/20 of the sine wave signal. This clock signal was sent with an external sine wave signal through a jitter generator 44 phase modulated so that a jitter was added to the clock signal. The jitter of the added jitter clock signal was through the time interval analyzer 67 measured. In 85 was a clock signal with added jitter according to the in 84 produced process shown. This clock signal was from an AD converter 68 converted into a digital signal, and the jitter was from an in 82 shown Jittermeßvorrichtung 69 measured. The experimental conditions of this measurement were the same as those in 84 shown measuring process.

The experimental results are in 86 and 87 shown. In these figures, a lateral axis phase modulation indices J _O jitter in 44 represents. 86 shows measured peak-to-peak values (difference between maximum value and minimum value). In 86 denotes a diamond sign on from the time interval analyzer 67 measured value, a circle character indicates one of the device 69 value measured for measuring a jitter according to the Δφ method. It can be seen that the of the device 69 value measured to measure a jitter by the Δφ method is almost equal to that of the time interval analyzer 67 measured value. 87 shows RMS values of measured jitter. In 87 a diamond sign denotes one from the time interval analyzer 67 measured value, and a circle character indicates one of the device 69 value measured for measuring a jitter according to the Δφ method. In this case one can say that the one of the device 69 value measured to measure a jitter by the Δφ method is quite similar to the measured value of the time interval analyzer 67 is. Thus, the device according to the present invention can provide the same value as obtained by the conventional method (zero-crossing method), and thus the same evaluation can be made as with the values measured by the conventional method. In other words, the method of the present invention can provide measurement values compatible with those obtained by the conventional method.

In addition, the number of zero-crossing samples needed to obtain such a result was 5000 for the case of peak-to-peak jitter and RMS jitter in the time interval analyzer measurement 67 whereas, the number of zero-crossing samples in the present invention is 3179 for the case of peak-to-peak jitter and that of the RMS jitter for measurement with the device 69 for measuring a jitter according to the Δφ method according to the present invention. The device 69 for measuring a jitter according to the Δφ method according to the invention requires a smaller number of samples than the time interval analyzer, so that the measuring device according to the invention 69 can quickly take a measurement at this level.

As above with respect to 83b For example, each sample taken at approximate zero crossing points of a phase noise waveform Δφ (t) is an amount of deviation from an ideal timing. Thus, these samples are equal to the RMS jitter J _RMS measured by the conventional phase detection method, and therefore, the jitter measuring apparatus according to the Δφ method is also compatible with the conventional phase detection method. From this point of view, as in 88 shown, a sample corresponding to a zero crossing point, from the zero crossing scanner 63 from a phase noise waveform Δφ (t) taken from the phase noise detection means 61 is supplied to the sample the detectors 14 and 15 as a sample phase noise waveform. As above with respect to in 32 A jitter measuring device according to the Δφ (t) method shown may include an RMS jitter J _RMS with the zero-crossing sampler 62 be measured. Therefore, as in 88 3, the jitter measuring device may be constructed so that the phase noise waveform Δφ (t) is switched by a switch 71 can be switched and the phase noise waveform Δφ (t) the detectors 14 and 15 over the zero crossing scanner 62 or can be fed directly. Further show 89 and 90 from the peak-to-peak detector 14 detected values or from the RMS detector 15 calculated results when each of the jitter measurements is performed, under the same conditions, in the case that the zero-crossing scanner 62 is used, and in the case that the zero-crossing scanner 62 not used. In these figures, the lateral axis phase modulation indices J _O jitter in 44 A character denotes one with the zero crossing scanner 62 measured value and a symbol V denotes one without using the zero-crossing scanner 62 measured value. 89 shows that with the peak-to-peak detector 14 recorded values and 90 shows the with the RMS detector 15 calculated values. It will be understood that similar results are obtained using the zero-crossing scanner 62 or without using the zero crossing scanner 62 can be obtained.

Next, a device configuration for measuring a cycle-to-cycle jitter J _CC with the Δφ (t) method will be described with reference to FIG 91 described. A cycle-to-cycle jitter is a jitter fluctuation between adjacent clock cycles, that is, a fluctuation of the N-th time period against the (N-1) th time period. Therefore, a cycle-to-cycle jitter J can be obtained by passing through a differential circuit 72 a peak-to-peak jitter J _{PP (N) of} the Nth time period subsequent to a peak-to-peak jitter J _{PP (N-1) of} the (N-1) th time period from the differential circuit 64 in 91 is obtained (relative fluctuation between zero crossings) subtracted from the latter to sequentially obtain the subtracted values J _{PP (N)} -J _{PP (N-1)} . That is, the difference circuit 72 calculates a differential waveform for the outputs of the differential circuit 64 to get the calculated result to the detectors 14 and 15 as a second differential phase noise waveform. An example of the measurement result of J _CC is in 92 shown. The difference circuit 72 can be connected to the output side of the differential circuit 64 the in 82 be shown connected, so that a cycle-to-cycle jitter can be measured.

The conventional method for measuring a jitter is based on a histogram measurement, but also in the Δφ (t) method according to the invention a histogram of measured jitters can be generated. A histogram of sine wave jitter measured with the conventional time interval analyzer is shown in FIG 93 shown. The lateral axis shows the amount J. 94 shows a result of one with a histogram generator 73 obtained jitter histogram when the same sine wave jitter with the in 82 The device for measuring a jitter is measured according to the Δφ (t) method. It can be seen that each of the figures shows a histogram shape of sine wave jitter.

Also shows 95 an example of a histogram when a histogram is one with the in 32 shown phase noise detection means 61 obtained phase noise waveform Δφ (t) with the histogram generator 73 is produced. Further shows 96 an example of a histogram when measuring cycle-to-cycle jitter J _CC with the apparatus for measuring a jitter according to the Δφ (t) method, and a histogram of the J _CC with the histogram generator 73 is produced. In this way, various jitter can be measured with the jitter measuring apparatus according to the Δφ (t) method according to the present invention, and histograms of these jitter can also be generated. With the apparatus for measuring a jitter according to the Δφ (t) method, a jitter score based on a jitter histogram obtained by the conventional jitter measuring apparatus can be appropriately performed. The present invention is useful not only for measuring a sine wave jitter, but also for measuring a random jitter. This is checked by displaying a histogram of measured jitters. 97 Fig. 12 shows a result of histogram measurement when measuring a histogram of random jitter of a clock signal of a microcomputer with the conventional time interval analyzer. 98 shows a result of a histogram measurement when random jitter of the same clock signal with the in 82 jitter measuring device according to the Δφ (t) method are measured and a histogram is generated therefrom. It can be seen that both figures show a histogram of random signals.

When an envelope of an input signal is changed and the input signal is amplitude modulated (AM), a sideband produced by the amplitude modulation can not be discriminated from a sideband produced by a phase modulation caused by a jitter, so that a measurement result may occur of a jitter is greater than the actual value. From this point of view is in 82 a case is shown where on the input side of the phase noise detection means 61 a trimmer 74 is inserted to remove an AM (amplitude modulated) component such that a PM (phase modulated) component is input to the phase noise detection means 61 can persist. In the clipper 74 For example, in the case of both an analog signal and a digital signal, a value (magnitude) of an input signal is amplified to a value multiplied by a constant number. On the amplified input signal, a process is performed in which a signal value which is greater than a predetermined first threshold value V _t 1 is replaced by the first threshold value V _th 1, and a signal value which is smaller than a predetermined second threshold value V _th 2 (<V _th 1) is replaced by the second threshold V _th 2. In this way, the input signal is converted into a constant amplitude input signal having a non-fluctuating envelope in a temporal waveform, so that jitter can be accurately measured.

At the in 82 In the embodiment shown, a case is shown where in the differential circuit 64 an interval (time interval) T _in between two samples for determining a difference thereof and a moving step T _s for determining two time positions (calculation timings) for taking a next difference therein are input and various differences can be taken from these values T _in and T _s , 99a FIG. 12 shows a waveform of a real part X _c (t) of an analytic signal Z _c (t) and samples of its approximate zero crossing point (circle sign). 99b shows the phase noise waveform Δφ (t) and shows samples of its approximated zero crossing points by circle signs. In this example, the phase noise waveform Δφ (t) has a sine wave shape. This means, 99b shows the case of a sine wave jitter where the deviation from the ideal time changes sinewave. In this figure, there are 34 zero-crossing samples of Δφ (t) in one period of the sine wave jitter. 99 shows a case where the moving step T _s has a length of 17 sampling points, and the difference interval T _has a length of 17 sample points: In this case, a difference value Δφ (j + _T) - Δφ (j) from a zero-sample Δφ (j) is calculated at a calculation timing j and a zero-crossing sample Δφ (j + T) at a calculation timing j + T _in . Subsequently, a difference value Δφ (j + 2T _in ) - Δφ (j + T _in ) is calculated, which is a difference between a zero-crossing sample Δφ (j + T _in ) at a calculation time j + T _in and a zero-crossing sample Δφ ( j + 2T _in ) at a time of computation j + 2T _in , that is, at a time later than the previous computation point by T _in . In the conventional time interval analyzer or the like, as shown in this example, a time after a difference time T _in from a calculation time point becomes the next calculation time point. A movement step T _s can not be made smaller than the difference interval T _in .

In the present invention, a moving step T _{s may be made} smaller than a difference interval T _in , that is, T _s <T _in . That is, as in 100 shown when off at a zero sample timing 100a the operation is started at the time j, at time points after each movement step T _s from the time j, ie at times j, j + T _s , j + 2T _s , ... samples of Δφ (t), ie Δφ (j ), Δφ (j + T _s ), Δφ (j + 2T _s ), ..., as in 100b and these samples are stored in a buffer memory stored a first scan. In addition, at time points j delayed by the difference interval T _in against j, j + T _s , j + 2T _s , ..., ie at times j + T _in , j + T _s + T _in , j + 2T _s + T _in samples of Δφ (t), ie Δφ (j + T _in ), Δφ (j + T _s + T _in ), Δφ (j + 2T _s + T _in ), as in each case in FIG 100c and these samples are stored in the buffer memory as a second scan sequence. With respect to samples having the same sequence number in the first scanning sequence and the second scanning sequence, a sample in the first scanning sequence is subtracted from the corresponding sample in the second scanning sequence to obtain differential outputs under the condition of T _s <T _in .

In 101 are the waveform of the real part X _c (t) of the analytic signal, the phase noise waveform Δφ (t) and the zero crossing points are the same as in FIG 99 , 101 Fig. 10 shows a case where a calculation movement step T _{s has} the length of a zero-cross point and has the difference interval T _in the length of 17 zero crossing points. As in 101c In this case, at each zero crossing point, a difference of Δφ (t), e.g. B. J _p (j) = Δφ (j + T _in ) - Δφ (j) in the difference interval T _in (17 zero-crossing points).

In order to obtain a fluctuation of Δφ (t) clearly, T has _{to be made} slightly larger. At the in 99 However, in the conventional system shown, T _s > T _in , so that also T _s becomes large. Therefore, the number of difference values obtainable in the same period (data volume) is small, and therefore the resolution is poor, and the peak values and average values are not accurate values.

Therefore, one of the in 99 shown differences obtained peak-to-peak jitter J _PP (t) because of the reduced number of obtained difference values as in 102 and the peak is 1883 ps and the RMS value is 638 ps. One out of the in 101 Due to the increased number of difference values and the short intervals, as shown in FIG. 13, peak jitter J _PP (t) obtained under the same conditions behaves as shown in FIG 102b and the peak-to-peak value is 1940 ps and the RMS value is 650 ps. In case of 101 can have a high resolution and a more accurate jitter compared to in 99 shown in the conventional case.

With respect to a conventional AD converter, as in 103a is shown, an input signal to an AD converter 77 entered after frequency components of more than half the sampling frequency of the AD converter 77 from it by a low-pass filter 76 have been eliminated. The AD converter 77 must perform an analog-to-digital conversion at a sampling frequency equal to twice the input signal frequency or higher. In contrast, in the device according to the invention, the input signal can be sampled and converted into a digital signal at a lower frequency than the input signal frequency. As in 103b For this purpose, high-frequency components of the input signal are shown by a band-pass or low-pass filter 78 eliminated, and then the input signal in a Abtastbrückenschaltung 79 sampled, which is composed of diodes, by connecting between terminals 81a and 81b applied pulses are sampled at a frequency lower than the input signal frequency. A sample accurately obtained with this process is passed through an AD converter 81 converted to a digital signal for each sample. For example, an experiment was conducted using a sine wave signal of frequency 10.025 MHz which was phase-modulated with a 20 kHz signal. When this sine wave signal was sampled at a frequency of 40.0 MHz, that is, above the frequency of the input signal, the waveform was the sequence of samples as in FIG 104a shown. In this case the spectrum was like in 105a where a broad peak of the carrier wave component of frequency 10.025 MHz as well as peaks of upper and lower sidebands (modulation components) were observed. On the other hand, when this sine wave signal goes out through the circuit configuration 103b With a frequency of 100 kHz, that is, undersampled two orders of magnitude lower than the carrier wave frequency, the waveform was the sequence of samples as in FIG 104b shown. This sequence of samples is also in 104a shown by circle signs. In this case, the spectrum of the sequence of undersampled samples was as in 105b where a peak of the carrier wave component with frequency 25 kHz and two peaks of the modulation components (upper and lower sidebands) of 25 kHz ± 20 kHz were observed. It was seen that a jitter can be measured with the device according to the invention also using an undersampling AD converter.

At each of the in 82 . 88 and 91 shown embodiments may be one of the various in 91 . 40b . 67 and 69 shown means for reshaping the analytical signal as a means 11 be used to transform the analytical signal. Moreover, these embodiments are not limited to the use of an AD converter for converting an input signal to a digital signal, but instead a comparator may be used instead of the AD converter. That is, in general, an input signal to be measured is converted into a digital signal by an AD converter, or it is converted by a comparator into a binary value for inputting to the means 11 changed to transform the analytical signal. However, an input signal to be measured becomes the in 40b shown means for transforming the analytical signal input without being converted into a digital signal. In addition, an input signal of the phase noise detection means 61 ie an input signal of the means 11 for reforming the analytical signal, a signal generated by frequency dividing an input signal (a signal whose jitter is to be measured) by a frequency divider, or a signal generated by frequency conversion of an input signal by a frequency converter.

So far are essentially measurements of the jitter of a signal to be measured been described. However, the present invention is for jitter measurements of various signals as used in telecommunications Data signals, a recurring video signal such as a TV signal or the like to use.

The While the present invention is with reference to the preferred embodiment has been described as an example, but it is obvious to those skilled in the art that diverse Modifications, changes and / or minor improvements to the above-described embodiment carried out can be without departing from the scope of the present invention. So understand that the present invention is not limited to the illustrated embodiment, but all changes, Modifications and / or minor improvements should include within the scope of the invention as defined in the following claims, fall.

• [c1]: Alan V. Oppenheim, Alan S. Willsky and Ian T. Young, Signals and Systems, Prentice-Hall, Inc., 1983.
• [c2]: Athanasios Papoulis, "Analysis for Analog and Digita Signals", Gendai Kogakusha, 1982.
• [c3]: Stefan L. Hahn, Hilbert Transforms in Signal Processing, Artrch House Inc., 1996.
• [c4]: J. Dugundji, "Envelopes and Pre-Envelopes of Real Waveforms", IRE Trans. Inform. Theory, vol. IT-4, pp. 53–57, 1958.
• [c5]: Alan V. Oppenheim and Ronald W. Schafer, Discrete-Time Signal Processing, Prentice-Hall, Inc., 1989.
• [c6]: Tristan Needham, Visual Complex Analysis, Oxford University Press, Inc., 1997.
• [c7]: Donald G. Childers, David P. Skinner and Robert C. Kemerait, "The Cepstrum: A Guide to Processing", Proc. IEEE, vol. 65, pp. 1428–1442, 1977.
• [c8]: Jose M. Tribolet, "A New Phase Unwrapping Algorithm", IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-25, pp. 170–177, 1977.
• [c9]: Kuno P. Zimmermann, "On Frequency-Domain and Time-Domain Phase Unwrapping", Proc. IEEE, vol. 75, pp. 519–520, 1987.
• [c10]: Julius S. Bendat and Allan G. Piersol, Random Data: Analysis and Measurement Procedures, 2^nd ed., John Wiley & Sons, Inc., 1986.
• [c11]: Shoichiro Nakamura, Applied Numerical Methods with Software, Prentice-Hall, Inc., 1991.
• [c12]: David Chu, "Phase Digitizing Sharpens Timing Measurements", IEEE Spectrum, pp. 28–32, 1988.
• [c13]: Lee D. Cosart, Luiz Peregrino and Atul Tambe, "Time Domain Analysis and Its Practical Application to the Measurement of Phase Noise and Jitter", IEEE Trans. Instrum. Meas., vol. 46, pp. 1016–1019, 1997.
• [c14]: Jacques Rutman, "Characterization of Phase and Frequency Instabilities in Precision Frequency Sources: Fifteen Years of Progress", Proc. IEEE, vol. 66, pp. 1048–1075, 1977.
• [c15]: Kamilo Feher, Telecommunications Measurements, Analysis, and Instrumentation, Prentice-Hall, inc., 1987.
• [c16]: Michel C. Jeruchim, Philip Balaban and K. Sam Shanmugan, Simulation of Communication Systems, Plenum Press, 1992.
• [c17]: E. Oran Brigham, The Fast Fourier Transform, Prentice-Hall, Inc., 1974.
• [c18]: Albert H. Nuttall, "Some Windows with Very Good Sidelobe Behavior", IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-29, pp. 84–91, 1981.

Listed below are references c1 to c18 mentioned above.

• [c1]: Alan V. Oppenheim, Alan S. Willsky and Ian T. Young, Signals and Systems, Prentice-Hall, Inc., 1983.
• [c2]: Athanasios Papoulis, "Analysis for Analog and Digita Signals," Gendai Kogakusha, 1982.
• [c3]: Stefan L. Hahn, Hilbert Transforms in Signal Processing, Artrch House Inc., 1996.
• [c4]: J. Dugundji, "Envelopes and Pre-Envelopes of Real Waveforms", IRE Trans. Inform. Theory, vol. IT-4, pp. 53-57, 1958.
• [c5]: Alan V. Oppenheim and Ronald W. Schafer, Discrete-Time Signal Processing, Prentice-Hall, Inc., 1989.
• [c6]: Tristan Needham, Visual Complex Analysis, Oxford University Press, Inc., 1997.
• [c7]: Donald G. Childers, David P. Skinner and Robert C. Kemerait, "The Cepstrum: A Guide to Processing", Proc. IEEE, vol. 65, pp. 1428-1442, 1977.
• [c8]: Jose M. Tribolet, "A New Phase Unwrapping Algorithm," IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-25, pp. 170-177, 1977.
• [c9]: Kuno P. Zimmermann, "On Frequency-Domain and Time-Domain Phase Unwrapping", Proc. IEEE, vol. 75, pp. 519-520, 1987.
• [c10]: Julius S. Bendat and Allan G. Piersol, Random Data: Analysis and Measurement Procedures, ^2nd ed, John Wiley & Sons, Inc. 1986..
• [c11]: Shoichiro Nakamura, Applied Numerical Methods with Software, Prentice-Hall, Inc., 1991.
• [c12]: David Chu, "Phase Digitizing Sharpens Timing Measurements," IEEE Spectrum, pp. 28-32, 1988.
• [c13]: Lee D. Cosart, Luiz Peregrino, and Atul Tambe, "Time Domain Analysis and Its Practical Application to the Measurement of Phase Noise and Jitter," IEEE Trans. Instrum. Meas., Vol. 46, pp. 1016-1019, 1997.
• [c14]: Jacques Rutman, "Characterization of Phase and Frequency Instabilities in Precision Frequency Sources: Fifteen Years of Progress," Proc. IEEE, vol. 66, pp. 1048-1075, 1977.
• [c15]: Kamilo Feher, Telecommunications Measurements, Analysis, and Instrumentation, Prentice-Hall, Inc., 1987.
• [c16]: Michel C. Jeruchim, Philip Balaban and K. Sam Shanmugan, Simulation of Communication Systems, Plenum Press, 1992.
• [c17]: E. Oran Brigham, The Fast Fourier Transform, Prentice-Hall, Inc., 1974.
• [c18]: Albert H. Nuttall, "Some Windows with Very Good Sidebar Behavior," IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-29, pp. 84-91, 1981.

Claims (19)

Apparatus for measuring the jitter of an input signal, comprising: analytic signal conversion means ( 11 ) for transforming the input signal into a complex analytic signal; Instantaneous phase estimation means ( 12 ) for determining the instantaneous phase of the input signal from the analytic signal; Linear Phase Removal Agents ( 13 ) for detecting a linear phase component of the instantaneous phase and for removing the linear phase component from the instantaneous phase to obtain a phase noise waveform; and Jitter detection means ( 14 . 15 . 73 ) for detecting the jitter of the input signal from the phase noise waveform. The apparatus of claim 1, further comprising: a zero crossing sampler ( 62 ) for sampling the phase noise waveform at sample points each near the zero crossing of a rising or falling edge of the real part of the analytic signal and outputting samples of the phase noise waveform. Apparatus according to claim 2, further comprising: a first differential circuit ( 64 ) for calculating the difference between each of the samples and the immediately preceding sample to obtain jitter peaks. Apparatus according to claim 3, further comprising: a second differential circuit ( 72 ) for calculating the difference between minimum and maximum values of the output of the first differential circuit to obtain a peak-to-peak value of the jitter. Apparatus according to any one of claims 1 to 4, further comprising: an analysis signal conversion means ( 11 ) upstream comparator ( 51 ) for comparing the input signal with an analog reference and for converting the input signal into a binary signal. Device according to one of Claims 1 to 4, in which the analytical signal conversion means ( 11 ) comprising: a bandpass filter ( 21a ), to which the input signal is supplied, and a Hilbert transformation arrangement ( 21 ) which Hilbert transforms the output of the bandpass filter representing the real part of the analytic signal to obtain the imaginary part of the analytic signal. Device according to one of Claims 1 to 4, in which the analytical signal conversion means ( 11 ) comprise: a frequency domain transformation device ( 21 ; 33 ) for transforming the input signal into a signal in the frequency domain; a bandpass processor ( 22 ; 34 ) for cutting off negative frequency components in the output of the frequency domain transformation means ( 21 ; 33 ) and for extracting only frequency components near the frequency of the input signal; and a time domain transformation device ( 23 ; 35 ) for inverse transforming the output of the bandpass processor ( 22 ; 34 ) into a signal in the time domain. Apparatus according to claim 7, further comprising: a buffer memory ( 31 ) for storing the input signal; wherein the analytic signal conversion means ( 11 ) further comprising: means for extracting partial signals of the input signal in sequential order from the buffer memory so that the extracted partial signal partially overlaps with a partial signal extracted shortly before; Medium ( 32 ) for multiplying each extracted partial signal by a window function, and supplying the multiplication result to the frequency-domain transforming means (16) 33 ); and funds ( 36 ) for multiplying the in-time-transformed signal with the inverse of the window function to obtain the analytic signal. Device according to one of claims 1 to 4, wherein the analytic signal conversion means include:  a first frequency mixer for multiplying the Input signal having a sine wave signal;  a second Frequency mixer for multiplying the input signal by one Cosine wave signal whose frequency is the same as that of the sine wave signal is;  a first low-pass filter, to which the output of the first frequency mixer is supplied;  one second low-pass filter, to which the output of the second frequency mixer is supplied;  in which the analytic signal from the output of the first low-pass filter as its real part and the output of the second low-pass filter as his imaginary part is composed. Device according to one of claims 1 to 4, wherein the analytic signal conversion means comprise: a first frequency mixer for multiplying the input signal by a sine wave signal; a second frequency mixer for multiplying the input signal by a cosine wave signal whose frequency is the same as that of the sine wave signal; a first low-pass filter to which the output of the first frequency mixer is supplied; a second low-pass filter to which the output of the second frequency mixer is supplied; a first comparator ( 51s ) for comparing the output of the first low-pass filter with an analog reference size; and a second comparator ( 51c ) for comparing the output of the second low-pass filter with the analog reference size; wherein the analytical signal is composed of the output signal of the first comparator and the output signal of the second comparator. Apparatus according to any one of claims 1 to 4, wherein the jitter detecting means comprises peak-to-peak detecting means ( 14 ) for obtaining the difference between the maximum value and the minimum value of the phase noise waveform as a peak value of the jitter. Device according to one of Claims 1 to 4, in which the jitter detection means comprise RMS detection means ( 15 ) for calculating the effective value of the phase noise waveform to obtain an effective value of the jitter. Device according to one of claims 1 to 4, wherein the means for detecting a jitter histogram estimation means ( 73 ) for obtaining a histogram of the phase noise waveform. Device according to one of claims 1 to 4, in which the linear phase removing means comprise ( 13 ): Conversion means for converting the instantaneous phase into a continuous phase; Linear phase estimation means for estimating a linear phase from the continuous phase; and means for subtracting the estimated linear phase from the continuous phase to obtain the phase noise waveform. Device according to one of claims 1 to 4, comprising: a the analysis signal-forming means ( 11 ) upstream trimmer ( 74 ) for cutting the amplitude of the input signal to a constant value. Device according to Claim 9, in which the analytical signal conversion means ( 61 ) further comprising: a first AD converter for converting the output of the first low pass filter into a first digital signal; and a second AD converter for converting the output of the second low-pass filter into a second digital signal; wherein the analytic signal is composed of the first digital signal as its real part and the second digital signal as its imaginary part. Apparatus according to claim 1, wherein the input signal a digital signal is. The device of claim 17, further comprising:  one AD converter for converting an analog clock signal into a digital one Clock signal for use as the input signal. The device of claim 18, further comprising: one Frequency divider dividing the analog clock signal by N and a delivers frequency-divided analog clock signal to the AD converter, where N ≥ 2.