CS256073B1 - Connection for asynchronous transmission - Google Patents

Abstract

The purpose of the asynchronous transfer circuit is to perform asynchronous transfer of the output signal from the charge-coupled device — CCD — to the block for its processing. The stated purpose is achieved by connecting the controlled input of the gate circuit (Hj with the generator (G) of clock pulses, the output with the generator (GRS) of control signals for the charge-coupled device and the control input with the circuit (K) for communication. One, the input of the circuit (Kj for communication is connected to the generator (GRS) of control signals, its second input and output are connected to the block (SOj for processing the output signal from the charge-coupled device (CCD). The asynchronous transfer circuit can be used in applications of electronic devices where asynchronous transfer of the signal from the charge-coupled device to a device for processing and evaluating the output signal, e.g. a microcomputer, is required.

Description

256073

BACKGROUND OF THE INVENTION The present invention relates to the connection of asynchronous transfer of charge-coupled output signal (CCD), such as CCD line and surface image sensors, and CCD shift registers, to processing circuits. In the known connections, the control signals for the CCD components are generated by combinatorial logic, which derives them from the readers driven by the single generator. Information on the contents of the individual CCD registers is contained in the output signal only at certain intervals, periodically repeating according to the repetition rate of the clock. Circuits for processing the output signal from the CCD when generating control signaling signals are to be synchronized with a signal indicating the validity of the output data. For this signal, the output signal must be processed and the circuit prepared for the output signal of the next CCD register element. In order to process the output signal of the CCD components by a microcomputer, a digitized output signal must be stored in its memory.

Until now, the signal transmission from the CCD to the microcomputer has been performed in a synchronous mode using a block transfer channel for direct storage of the output signal from the CCD to the microcomputer memory or using the auxiliary fast buffer memory for the CCD data. It is easier to find a single-word transmission, so-called input port, with a maximum transfer rate of approximately 100 kB / s. The disadvantage of the synchronous transmission of the signal from the CCD to the microcomputer via the one-word transmission channel, the fine transmission rate, because the microprocessor must test the data validity signal from the CCD.

The above drawbacks are substantially hindered by the involvement of the asynchronous transducer of the present invention in that the controlled gate circuit input is coupled to the clock signal generator and the gating circuit output connected to the control generator. signals, wherein the control input of the gating circuit is coupled to the output of the precompression circuit, one input of which is coupled to the control signal generator and the second input and output are coupled to the output signal processing block.

The connection for asynchronous transmission makes it easy to connect electronic circuits with the CCD component to the microcomputers and transfer data from the CCD to the micro-computer. The connection does not reduce the transmission rate of the single word transmission microcomputer.

The attached drawing schematically shows a block connection for asynchronous transmission of an output signal from a CCD.

The wiring consists of a clock G generator coupled to a controlled input of the gate circuit H, from which the gated clock signal of the GRS control signal generator passes, where it generates the control signals supplied to the CCD circuit and a signal indicating the output signal from the CCD circuit. the data acquisition requirement, supplied to the communication circuit. The output signal from the CCD circuit feeds the SO signal circuit to amplify the signal from the CCD, processing and evaluating. From the communication circuit K, the paging signal to the control input of the gate circuit H and the signal requesting to receive the CCD circuit output signal are fed to the output signal processing circuit S0. From the circuit 50, a signal is sent to the communication circuit K, indicating the readiness of the circuit SO to receive the output signal size from another element of the CCD register.

The GRS control signal generator generates, in the rhythm of the clock pulses that arrive at its input from the clock pulse generator G, the signals required for CCD operation. The signal indicating the validity of the CCD output signal, which exits the GRS control signal generator to the precompression circuit, is stopped by the gate circuit H. The further operation of the clocks from the generator G to the GRSa generator is sent to the output signal block SO for the signal, indicating the validity of the CCD output signal. When the block SO acknowledges the signal reception communication circuit K and then announces the reception of the signal from the next register element, the circuit K opens the path of the clock pulse G through the gate circuit H through the gate circuit H to the GRS generator input, thereby releasing the control signals over. CCD activity. Stopping the clock pulses entering the GRS generator synchronizes the operation of the GRS control pulse generator for the CCD circuit and transmits the contents of the individual elements of the CCDs register to take it over by the SO reprocessing block, e.g., by a microprocessor.

The invention can be used in electronic device applications where a synchronous signal transmission from integrated CCD circuits to a signal processing and evaluation device, e.g., a microcomputer, is required.

Claims (1)

256073 SUBJECT Wiring for asynchronous transmission consisting of a clock pulse generator coupled to a control signal generator coupled to a charge-coupled component - CCD, the output of which is coupled to a block for processing the output signal of a wired component, characterized in that the gate circuit input (H) is coupled to the inventive signal generator (G) of the new signal, and the gate circuit output (H) is coupled to the control signal generator (GRS), wherein the gate circuit controller (H) is coupled to the control signal generator (G). the output of the communication circuit (K), which one input is connected to the control signal generator (GRS) and its second output and the output is connected to the output signal processing unit (SO). 1 sheet of drawings