CN85101811A - The method and apparatus of sampling processing vision signal - Google Patents
The method and apparatus of sampling processing vision signal Download PDFInfo
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- CN85101811A CN85101811A CN 85101811 CN85101811A CN85101811A CN 85101811 A CN85101811 A CN 85101811A CN 85101811 CN85101811 CN 85101811 CN 85101811 A CN85101811 A CN 85101811A CN 85101811 A CN85101811 A CN 85101811A
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Abstract
The method and apparatus of one sampling and processing vision signal.The time base of described vision signal fluctuates with the sampling clock pulse.It is synchronous that the oscillator of generation sampling clock pulse and the synchronizing information of vision signal are carried out instantaneous phase.This synchronizing information is isolated from vision signal by a separator, and oscillator once starts or the failure of oscillations is controlled according to this synchronizing information at least.
Description
Background of invention
The invention relates to sampling, quantize and handle the method and the equipment thereof of a vision signal, particularly the distortion level of picture quality is reduced to minimum method and apparatus with quantification manner.
We have known the equipment that has many kinds to handle vision signal.For example, the equipment that vision signal is transferred to digital signal; Memory is also handled the equipment of one or a frame video signal; Use the device of row memory storage to signal filtering or compensation; The moving equipment of first-harmonic when eliminating by buffer storage; To the vision signal time compression and be conveyed into equipment of a time-division multiplex system or the like.In these known devices, all must use the sampling clock pulse that each sampled value is handled according to the order of sequence when sampling and quantitation video signal.
In order to produce the sampling clock pulse, the simplest known method is to use asynchronous and independent vein dashes.Yet such method can produce some problems in the said equipment.For example in the equipment that uses buffer storage, because asynchronous between vision signal and the sampling clock pulse, during vision signal is handled, the fluctuation of base when the quantization error of Shi Ji just can cause, and in the equipment of time compression and extending video signal, this quantization error will be lowered extended quality down to the image that produces from vision signal is handled.Furtherly,, must provide a sufficiently high sampling clock pulse frequency, but because the restriction of equipment work speed does not reach such frequency because vision signal is a broadband signal.Therefore the sampling clock frequency approaches the vision signal band so that produce parasitic component.This parasitic component will show as network noise when image reduction.Therefore before handling vision signal, must limit the vision signal band fully, sharp.Yet rapid restricted band can be aggravated delay distortion, and the result produces the wave distortion as ring etc.
Another kind method is to use the automatic frequency control circuit (hereinafter to be referred as the AFC circuit) of everybody the generation sampling clock pulse known as shown in Figure 1.With reference to Fig. 1, numeral 1 and 2 is represented the input of vision signal and the output of sampling clock pulse respectively.Horizontal-drive signal is separated and is passed to an input of phase comparator 4 by horizontal-drive signal separator 3 from the vision signal of input.The output of phase comparator is delivered to voltage-controlled oscillator 6(hereinafter to be referred as VCO via phase compensator 5).The output signal of VCO is by frequency divider 7 frequency divisions.Frequency divider produces an output signal identical with the incoming video signal horizontal frequency, and phase comparator 4 carries out bit comparison mutually with this with horizontal-drive signal.Be provided to VOC6 corresponding to the error voltage output signal of the phase difference of two signals and control voltage as it.Aforesaid AFC circuit is by output 2 outputs and the synchronous sampling clock pulse of incoming video signal.These existent method are based on FEEDBACK CONTROL, and there are some problems equally in it.For example owing to circuit is done the phase fluctuation that there is the sampling clock pulse in sorrow.If it is big that the branch frequency of frequency divider 7 becomes, just that the phase difference between sampling clock pulse and the horizontal-drive signal also becomes is big.Furtherly, if first-harmonic is moving sometimes for input frequency signal, just if the AFC circuit produces the response speed of following error raising AFC circuit so that improve with kinetic force, it equally also has a high response to the noise that comprises in the incoming video signal.The AFC circuit becomes unstable like this.Equally, become big if the time first-harmonic of incoming video signal is moving, the AFC circuit can depart from locking range so that lost efficacy.
The invention summary
The purpose of this invention is to provide a kind of method and apparatus that produces vision signal, the vision signal that this method and apparatus provides might suppress this vision signal because of the base deterioration of image quality that quantizes to cause at any time.
Another object of the present invention provides a kind of moving method and apparatus of first-harmonic when eliminating vision signal.
In order to achieve the above object, in brief, the present invention produces a sampling clock pulse in the oscillation output signal of oscillator, and this oscillation output signal can be synchronous with the synchronizing information instantaneous phase of incoming video signal.Further characteristics of the present invention are at vertical blanking period, the frequency of oscillation of oscillator is stablized by the feedback loop that comprises a phase comparator, phase comparator carries out bit comparison mutually with reference signal or its suitable fractional frequency signal that oscillation output signal or its suitable fractional frequency signal and one have fixed frequency, thereby makes the frequency of oscillation of VCO oscillator be subjected to controlling from the phase error signal that phase comparator obtains.
Brief description
Fig. 1 is the block diagram that produces the AFC circuit of sampling clock pulse in the prior art.
Fig. 2 is the block diagram that produces the sampling clock pulsing unit in the embodiment of the present invention.
The wave mode of signal in Fig. 3 key diagram 2.
Fig. 4 is the block diagram that makes the processing video signal equipment of a comb filter according to embodiment of the present invention.
Fig. 5 is the line map of oscillator among Fig. 2.
Fig. 6 is the block diagram that another program produces the sampling clock pulsing unit according to the present invention.
The wave mode of signal in Fig. 7 key diagram 6.
Fig. 8 is the block diagram of the moving equipment of first-harmonic when revising vision signal in specializing according to the present invention.
Fig. 9 is the block diagram of the moving equipment of first-harmonic when another program uses the outer synchronous signal correction according to the present invention.
Preferable embodiment is described
Referring to Fig. 2, numeral 10 and 20 is represented an input of vision signal and an output of sampling clock pulse respectively.Synchronizing signal separator 11 is isolated synchronizing signal from incoming video signal.The waveform of vision signal ， And shown in Fig. 3 (a) is comprising synchronizing signal S.It is parts of sampling clock generator 100 that this synchronizing signal is sent to separator 12 these separators.Horizontal-drive signal separator 12 is isolated the synchronizing signal relevant with horizontal scan line from the output signal of separator 11, and provides the output of a waveform shown in Fig. 3 (b) to one-shot multivibrator (hereinafter to be referred as M.M.).The output signal of the separated device 12 of M.M.13 triggers, and provides a waveform to have the start pulse of fixed width " τ " shown in Fig. 3 (C) to oscillator 14.Oscillator 14 starts or stops vibration according to the start pulse of M.M.13, it can hold the M.M. formula oscillator integrated circuit of E to constitute by having a startup, Texas Instr Ltd. (Texas Instruments, Inc) SN74 S 124 M of Sheng Chaning for example.Waveform from Fig. 3 (d) can obviously be seen, when the start pulse that is input to start end E is high potential (hereinafter to be referred as " H "), the output signal of oscillator be electronegative potential (hereinafter to be referred as " L ") when start pulse is " L ", the just defeated continuous vibration output of oscillator pulse.
The output signal of oscillator 14 is provided to clock counter 15, and its start pulse according to M.M.13 begins to calculate vibration output umber of pulse and exporting as the pulse of wave mode shown in Fig. 3 (e) in the set time T.This output pulse signal is transferred into output 20 as the sampling clock pulse.Start pulse width " τ " and time " T " are suitably determined to be positioned within the horizontal blanking cycle of input rule frequency signal so that the starting point of sampling clock pulse and terminal point are seen the A of waveform (a) and B.The essential so sampling clock pulse that also can fully handle incoming video signal has just produced.
Can further see by above-mentioned explanation, because the sampling clock pulse that produces and the instantaneous homophase of synchronizing signal of incoming video signal, so the influence that first-harmonic moves when first-harmonic Dong ， And and the sampling clock pulse that obtains can not be subjected to when the sample quantization result can not occur.And the phase place of sampling clock pulse is placed within each horizontal sweep draws.Therefore, even because sample frequency produces some error component, cause network noise, because the phase place of sampling clock pulse all is fixed in horizontal scan period each time, thereby the interference of error component has been reduced apparently.Simultaneously, if do not use synchronizing signal (b), also can use the synchronizing signal of another and synchronizing signal homophase, its waveform is shown in the S of Fig. 3 waveform (b ').In such cases, M.M.13 is cancelled, and the output signal of separator 12 is directly delivered to oscillator 14 and clock calculation device 15.
Next step will describe the digital comb filter that uses above-mentioned sampling clock generator.Referring to Fig. 4, numeral 30 and 40 is represented the input of vision signal respectively and is handled the output of the comb filter of vision signal.100 is above-mentioned sampling clock generator.Low pass filter 31(is hereinafter to be referred as LPF) limit the bandwidth of the incoming video signal that is sent to input 30 so that reduce the generation of parasitic component.The output signal of LPF31 by analog to digital converter 32(hereinafter to be referred as A/D) convert digital signal to.The output signal of LPF31 is sent to separator 11 so that separate synchronizing signal simultaneously.Sampling clock generator 100 uses this signal output sampling clock pulse as mentioned above then.Line storage 33 can be made of shift register, with the output signal of storage A/D converter 32 and use just reading of data sequentially of sampling clock pulse.The capacity of line storage 33 can decide according to digitized vision signal amount in the time T shown in Figure 3.And because generator 100 is the same a starting point A generation sampled clock signal from each horizontal scanning period in time T, even first-harmonic was moving when therefore incoming video signal existed, also can obtain stable lagging from line storage 33 in the output signal of line-scanning period.
Row is stored as the output signal of the delay output signal of mould 33 and A/D converter 32 by digital adder 34 additions, its output signal by digital to analog converter 35(hereinafter to be referred as D/A) convert analog signal to.Because except in time T (being in the horizontal blanking interval), generator 100 does not produce the sampling clock pulse, the output signal of D/A converter 35 does not comprise horizontal blanking signal and horizontal-drive signal.Therefore synchronizing signal adder 36 is the synchronizing signal of separator 11 and the output signal addition of D/A converter 35, so that this one is sent to output 40 by the suitable vision signal after the comb filter processing.Comb filter in this embodiment has sharply reduced parasitic disturbances.Its result, it can reduce the cut-off characteristics of LPF31, so that reduced because the wave distortion of the vision signal that the sluggish distortion of LPF31 causes.
Fig. 5 is the line map of oscillator 14 in Fig. 2 generator 100.Referring to Fig. 5, numeral 16,17,18 and 19 is represented input respectively, output, power end and phase inverter.Kao Bizi (Colpitts) oscillator is by transistor Q
2, capacitor C
1And C
2, and inductance L is formed.When the start pulse of M.M.13 shown in Figure 2 is sent to input 16, in start pulse " H " state, transistor Q
1Not conducting or " OFF " and the failure of oscillations.Along with start pulse transfers " L " to by " H ", transistor Q
1Conducting or " ON ", the oscillator starting oscillation all can be from transistor Q during " L " of start pulse
3Obtain oscillation output signal.Transistor Q
3Output signal be sent to output 17 after by inverter 19 shapings, and offer clock counter shown in Figure 2 15.
The frequency that can find sampling clock pulse Fig. 2 and the embodiment shown in Figure 5 from top description is determined by the frequency of oscillation of oscillator 14.Yet frequency of oscillation is along with the variation of supply voltage, and the element time is aging and change in the variation of ambient temperature or the circuit.Another embodiment shown in Figure 6 can overcome these and change, and stably produces the sampling clock pulse with stable and fixed frequency.Referring to Fig. 6, numeral 100 ' represented another sampling clock pulse generator, with the identical reference number of same section use shown in Figure 2.Oscillator 14 is voltage-controlled oscillators, its integrated circuit of once mentioning above can using (SN74S124M), and this integrated circuit also has a voltage controling input end (V).Numeral 50 to 59 is represented AND gate (AND), vertical synchronizing signal separator, M respectively
0, M
0, latch circuit, quartz (controlled) oscillator, l/n frequency divider, phase comparator, gate circuit, phase compensator and 1/m frequency divider.
Fig. 7 has shown the oscillogram of sampling clock pulse generator 100 ' (a) to (i) each point.Waveform (a) is for being sent to the vision signal of input 10, wherein S
1And S
2Be separator 11 isolated synchronizing signals.Waveform (b) and (c) be respectively separator 12 and 51 isolated horizontal-drive signal and vertical synchronizing signals.M.M.52 is triggered by vertical synchronizing signal, and produces the output signal with fixed pulse width To corresponding to vertical blanking period, and its waveform is shown in (d).This output signal is sent to latch circuit 53, and synchronous with the back edge of the output signal of separator 12.Latch circuit is in time T
1In, having the output signal of " L " state from the back along beginning to produce one, its wave mode is shown in (e).The output signal of separator 12 is by the output signal of latch circuit 3 and 50 controls of AND door (with door).M.M.13 is triggered by the output signal with door 50, and produces the start pulse of wave mode shown in (g).Consequently in time T corresponding to vertical blanking interval
1In do not produce start pulse.
Start pulse is sent to the start end E of oscillator 14, and produces the oscillation output signal synchronous with start pulse from oscillator 14 as mentioned above.The part that has oblique line in the mode chart (h) has shown the cycle of oscillation of oscillator.(h) can obviously see by mode chart, at T
1During this time, the start pulse that oscillator 14 is indicated by X in the oscillogram (g) triggers and vibration continuously.
According to this embodiment, oscillator 14 is in time T
1In control by phased lock loop circuit (hereinafter to be referred as the PLL circuit), so to vibrate be stable.Both the output signal by using quartz (controlled) oscillator 54 had been as the reference signal with stabilized frequency, and constituted PLL with circuit element 55 to 59 and oscillator 14, and the output signal of oscillator 14 is phase locked with reference signal.
The output signal of quartz (controlled) oscillator is by l/n frequency divider 55 frequency divisions, and its output signal is transported to an end of phase comparator 56.Phase comparator 56 also receives the output signal of l/m frequency divider 59, the output signal frequency division of 59 pairs of oscillators 14 of frequency divider.1/m frequency divider 59 is resetted by the start pulse of M.M.13.Phase comparator 56 provides phase error signal according to the phase difference of two fractional frequency signals.By the gate circuit 57 of the output signal of latch circuit 53 control in time T
1The interior phase error signal that allows passes through.Consequently phase error signal is only in time T
1In be provided to phase compensator 58, and in all the other times, error signal is kept by the phase compensation road.Phase compensator can be made of integrated circuit etc.Phase error signal is filtered gentle compensation fully so that stablize the characteristic of PLL circuit.The output signal of phase compensator 58 is transported to the voltage controling input end (V) of oscillator 14.
Use above-mentioned PLL FEEDBACK CONTROL circuit, the oscillation output signal of oscillator 14 can keep Phase synchronization with the stable contrast signal that quartz (controlled) oscillator 54 produces.Its frequency of oscillation 50 is shown in following formula:
fo＝m/n·f
1（1）
F wherein
1It is the frequency of oscillation of reference signal.Frequency of oscillation fo can freely determine by frequency dividing ratio m and n and frequency f 1, and with set point without any skew.Because the frequency values of reference signal is fixed, therefore might reduce and reference signal between differ, Here it is makes frequency division amount m only make in the one-period of oscillation output signal the maximum that is of phase difference in the phase locking near 1 ， And.And thereby might obtain enough response speeds and phase fluctuation can not take place.Even some phase fluctuations take place, this also is a very little amount.And because the phase place of oscillation output signal is set with the synchronizing signal of incoming video signal synchronous by moment; Therefore the influence of phase fluctuation has been reduced sharp.The oscillation output signal of oscillator 14 is sent to clock counter 15 with method same as described above.Just obtained handling the sampling clock pulse of each horizontal scanning line of incoming video signal like this at output 20.And in this case, as oscillogram 7(i) shown in, can be in time T
1In the sampling clock pulse is not provided.
Used conventional levels and vertical synchronizing signal as synchronizing signal in the above-described embodiment.Yet also the synchronizing signal of available other form is implemented the present invention, for example horizontal sync information is assigned on per two row horizontal scanning lines, and this can be used for high definition video signal; And with two horizontal sync information signals, one of them is as luminance signal, and another is dispensed on per two row horizontal scanning lines as carrier chrominance signal, and this can be used for the 8mm television camera.
Next step will narrate its moving equipment of first-harmonic when being used for correcting video signal of another embodiment of the present invention.In the equipment of such record, a playback information on tape of for example video tape recorder (hereinafter to be referred as VTR), or in the such optical disk system of similar CD player (hereinafter to be referred as VDP) in the equipment of playback information, first-harmonic was moving when the vision signal of playback all existed.First-harmonic moves and cause shake and distortion in the image of resetting when this.Embodiment shown in Figure 8 can be removed this fluctuation, wherein 80 and 89 respectively expression when existing the moving video signal input terminal of first-harmonic and proofread and correct after VT.Numeral 81 expression A/D converters, 82 represent a for example such memory of RAM.Synchronizing signal separator 85 is separated synchronizing signal and it is delivered to and writes clock generator 200 from incoming video signal, write clock generator 200 produce first-harmonic when having moving write clock pulse, itself and the generation simultaneously of one of synchronizing signal.Write address controller 86 sends the write address instruction according to writing clock pulse.Like this, the moving vision signal of first-harmonic is converted and writes to the synchronous order digital signal of clock pulse by A/D converter 81 when having, and instruction is written into memory 82 and this order digital signal is according to write address.The similar of writing clock generator 200 in sampling clock generator 100 shown in Figure 6 ', in its block diagram numeral 112 to 114 and 151 to 159 corresponding to 12 among Fig. 6 to 14 and 51 to 59.Numeral 160 expression m/n frequency dividers.
In sum, oscillator 114 produces according to formula (1) and has the clock pulse of writing of frequency f o.This writes the characteristics that clock pulse has sampling clock pulse in the embodiment shown in Figure 6.Write address controller 86 is received the start pulse that M.M.13 produces, and receives simultaneously and write clock pulse.Write address controller 86 can be made up of counter etc., triggers beginning calculated description write clock pulse by the start pulse that produces in each horizontal scanning period, and in time T shown in Fig. 3 oscillogram (b), according to the counting order writing address signal is delivered to memory 82.Then this address signal is played start pulse and is upgraded one after another, so that with the output signal of A/D converter 81 write memory 82 sequentially.
Simultaneously the reference signal that is produced by quartz (controlled) oscillator 154 is by m/n frequency divider 160 frequency divisions, and its output is provided to and reads address control unit 87 and D/A converter 83 as reading clock pulse.Read the frequency f of clock pulse
RDetermine by following formula:
f
R＝m/n·f
l（2）
Can find out from formula (1) and (2), read the frequency f of clock pulse
RCan be set to the frequency f that equals to write clock pulse
O
Reference sync signal generator 88 is received the reading clock pulse, with its suitable frequency division and produce one with the reference sync signal CS of the synchronizing signal same format of incoming video signal, one with play identical start pulse HS of artery time shown in Fig. 3 oscillogram (C), and reference vertical synchronizing signal VS.Reading address controller 87 can be made up of counter etc., is triggered to begin to calculate by start pulse HS and reads clock pulse, and provide a reading address signal according to the counting order for memory 82 at T in the time.This reading address signal is upgraded one after another by start pulse HS, so that the vision signal of storage is sequentially read from memory 82 and provided to D/A converter 83.
Can find that from above the output signal of D/A converter 83 does not have horizontal blanking signal and synchronizing signal.Therefore, synchronizing signal adder 84 is added to reference sync signal Cs on the output signal of D/A converter.Vertical synchronizing signal VS is sent to the reference signal of end points 90 as a servo circuit.This servo circuit is not shown among Fig. 8.Because frequency f o and f
RIdentical owing to the control of PLL circuit, so moving being removed of time first-harmonic of incoming video signal.If exist to produce the time base rapid fluctuations of distortion, writing clock pulse can be instantaneous synchronously with the synchronizing signal of incoming video signal, and produces and can accurately trail the moving stable clock pulse of writing of first-harmonic when various.
In the above-described embodiment, generator 88 produces reference sync signal Cs.Yet also can use as shown in Figure 9 an automatic phase controller (hereinafter to be referred as APC), so that make reference sync signal and an external reference synchronizing signal synchronous.Referring to Fig. 9, generator 88 produces signal CS, VS and HS.Input 91 receives the external reference synchronizing signal.The vertical synchronizing signal of vertical synchronizing signal separator 92 separate external reference sync signals.Phase comparator 93 carries out bit comparison mutually with vertical synchronizing signal with the signal VS that generator 88 produces, and produces an error signal according to the phase difference between them.This error signal is delivered to a control end of oscillator 95 by phase compensator 94.Oscillator 95 produces one and has frequency f
lReference signal.
Consequently the internal reference vertical synchronizing signal VS of reference sync signal generator 88 is phase locked the external reference vertical synchronizing signal.Owing to use oscillator 95 to replace quartz (controlled) oscillator shown in Figure 8 154, moving equipment of timing first-harmonic and external reference vertical synchronizing signal are kept synchronously like this.
According to the present invention, by making sampling clock pulse and vision signal moment synchronous, thereby might provide one not have frequency shift (FS), and be used to sample and handle the sampling clock pulse of vision signal.Because vision signal is quantized, thereby first-harmonic is moving when having avoided, and reduces to minimum to the infringement of picture quality parasitic disturbances etc.Even first-harmonic was moving when vision signal itself produced, the present invention also can stably produce the sampling clock pulse that can accurately trail this fluctuation and not have frequency shift (FS), and first-harmonic is moving when eliminating under the situation of not damaging image.
When we illustrate according to the present invention and describe multiple device, be appreciated that, same device is not completely restricted, it may be subjected to till now in the technology the many known distortion or the influence of improvement, therefore we do not wish to be limited by details shown and that describe, and all similar distortion and improvement that hope is comprised by following claims scope.
Claims (21)
1, a sampling and processing comprise the method for the vision signal of synchronizing information on an attached base, and its step comprises:
Synchronizing information is separated from vision signal;
According to separating synchronizing information, the method for the vibration by the control generator oscillation output signal produces the sampling clock pulse in the mode of oscillator oscillation output signal; And
With the sampling clock pulse that produces the time base on to video signal sampling.
2, in the method for claim 1, the step that produces the sampling clock pulse comprises a starting that produces according to the separation synchronizing information and the oscillator signal that stops this oscillator at least, so that make the sampling clock pulse of generation and the synchronizing information Phase synchronization of separating.
3, in the method for claim 2, separate synchronizing information and be meant horizontal synchronization pulse in each horizontal scan line of vision signal, the sampling clock pulse of generation and each horizontal scan line of vision signal are phase locked.
4, in the method for claim 1, its step also comprises:
Generation has the reference signal of predetermined frequency;
Detect the vertical blanking cycle to small part of vision signal;
At least carry out bit comparison mutually with the proportional signal of reference signal at least with the proportional signal of oscillation output signal and another with one, and provide-indicate the phase error output signal of phase difference between this two signal; And
During vertically disappearing of detection is steady, according to the phase error output signal, the frequency of oscillation of control generator.
5, in the method for claim 4, at least with the proportional signal of oscillation output signal be one of oscillation output signal ， And have the expression oscillation output signal be by frequency division; And and
At least with one of proportional signal of reference signal, and the signal of representing this reference signal is by the preset proportion frequency division.
6, in the method for claim 5, being a fractional frequency signal with the proportional signal of oscillation output signal at least, is a fractional frequency signal with the proportional signal of reference signal at least.
7, the equipment of sampling and processing vision signal, this vision signal contains the synchronizing signal based on time-base signal, and this equipment comprises:
Separation equipment, it isolates synchronizing information and proposes the output signal of this synchronizing information of expression from vision signal;
Oscillator device, the output signal of its corresponding separation equipment, mode with its oscillation output signal provides the sampling clock pulse, and the oscillation output signal of oscillator device is controlled according to the output signal of separation equipment, so that make output signal moment of oscillation output signal and separation equipment synchronous; And
Sample devices, the sampling clock pulse that its use to produce, the time vision signal is sampled on the base.
8, in the equipment of claim 7, oscillator device with its starting and failure of oscillations output signal at least the two one of respond the output signal of separation equipment.
9, in the equipment of claim 8, synchronizing signal is the horizontal-drive signal in each horizontal scanning line of vision signal, separation equipment provides the output signal of the horizontal-drive signal of an expression separation, its vibration of oscillator device response separation of level synchronizing signal output beginning is so that make the horizontal-drive signal Phase synchronization of each horizontal scan line of the sampling clock pulse of generation and vision signal.
10, in the equipment of claim 7, oscillator device comprises that one has the oscillator that starts input number, so that the output signal of response separation equipment, trigger oscillation output signal, and the oscillation output signal of clock count equipment oscillator and the output signal of separation equipment produce the sampling clock pulse and export as it.
11, in the equipment of claim 7, also comprise:
Reference signal generation equipment, its generation has the reference signal of predetermined frequency;
Checkout equipment, it detects vision signal at least a portion vertical blanking cycle and output signal indication phase place compare facilities is provided, its with one at least with the proportional signal of the oscillation output signal of oscillator device, at least compare with the proportional signal of reference signal of reference signal generation equipment with another, and provide an expression, the phase error signal of two signal phase differences; And
Control appliance, the phase error signal of its response phase compare facilities and the output signal of checkout equipment are with the frequency of oscillation of control oscillator device.
12, in the equipment of claim 11, control appliance is in detected vertical blanking period, and the output signal of response detection equipment is controlled the frequency of oscillation of oscillator device.
13, in the equipment of claim 11, also comprise first band spitting equipment, it is by the oscillation output signal frequency division of a preset proportion with oscillator device, and provide one with the proportional frequency division output signal of oscillation output signal, second band spitting equipment, its by a preset proportion with the reference signal frequency division, and provide one with the proportional frequency division output signal of reference signal, the phase place compare facilities carries out the phase bit comparison with the frequency division output signal of first and second band spitting equipments.
14, in the equipment of claim 7, sample devices comprises the A/D conversion equipment, it converts vision signal to digital video signal and the output signal of this signal of expression is provided, memory device, output signal with storage A/D conversion equipment, and read storage and export, numeral phase oil (gas) filling device, it is with the output signal addition of A/D conversion equipment and memory device, and output signal after its addition is provided, and the D/A conversion equipment, it converts the output signal of digital phase oil (gas) filling device to analog signal, the A/D conversion equipment, memory device and D/A conversion equipment are controlled its operation according to the sampling clock pulse that produces.
15, in the equipment of claim 14, also comprise synchronizing signal equipment, it is the output of D/A conversion equipment and the output addition of separation equipment, and the output signal of its addition result of expression is provided.
16, the moving equipment of first-harmonic during correcting video signal, this vision signal contains synchronizing information on time-base signal, and this equipment comprises:
The A/D conversion equipment, it is to convert vision signal to digitized video, and the output signal of its transformation result of expression is provided;
Memory device with the output signal of storage A/D conversion equipment, and is read the output signal of the A/D conversion equipment of its storage;
The write address control appliance is with writing in the control store equipment;
Read the address control appliance, with reading of control store equipment;
The D/A conversion equipment is converted to analog signal with the storage output signal that will read from memory device;
Separation equipment so that synchronizing information is separated, and provides the output signal of its separating resulting of expression from vision signal;
Oscillator device, with output signal according to separation equipment, form with oscillation output signal provides the sampling clock pulse, and the oscillation output signal of oscillator device is controlled according to the output signal of separation equipment, so that make the output signal of oscillation output signal and separation equipment keep instantaneous phase synchronous;
Reference signal generation equipment has the reference signal of predetermined frequency to produce one;
Checkout equipment detecting vision signal at least a portion vertical blanking signal, and provides the output signal of its testing result of expression;
The phase place compare facilities, its with one at least with the proportional signal of the oscillation output signal of oscillator device, at least compare with the proportional signal of reference signal of reference signal generation equipment with one, and the phase error signal of phase difference between an expression two signals is provided; And
Control appliance, it is in the output signal of checkout equipment in the phase, phase error signal according to the phase place compare facilities comes the frequency of oscillation of oscillator device is controlled, A/D conversion equipment and write address control appliance according to sampling clock pulse control its operation, read address control appliance and D/A conversion equipment according at least with its operation of the proportional signal controlling of reference signal.
17, in the equipment of claim 16, control appliance is according to the output signal of detection equipment, the frequency of oscillation of the vertical blanking period inner control oscillator device that goes out in detection.
18, in the equipment of claim 16, also comprise first band spitting equipment, it is by the oscillation output signal frequency division of a preset proportion with oscillator device, and provide one with the proportional frequency division output signal of oscillation output signal, second band spitting equipment, it by a preset proportion with the reference signal frequency division, and provide one with the proportional frequency division output signal of reference signal, the phase place compare facilities, its frequency division output signal with first and second band spitting equipments is carried out the phase bit comparison.
19, in the equipment of claim 16, also comprise synchronizing signal generation equipment, its is according to producing synchronizing signal, oil (gas) filling device mutually with the proportional signal of reference signal at least, it is the synchronizing signal of synchronizing signal generation equipment and the output signal addition of D/A conversion equipment, and the output signal of its addition result of expression is provided.
20, in the equipment of claim 19, reference signal generation equipment produces a corresponding reference signal according to an external signal.
21, in the equipment of claim 16, separation equipment separates horizontal-drive signal from vision signal, and to oscillator device provide one the expression its separating resulting output signal, and second separation equipment separates vertical synchronizing signal from vision signal, and the output signal of its separating resulting of expression is provided to detection equipment.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN85101811A CN85101811B (en) | 1985-04-01 | 1985-04-01 | Method and apparatus for sampling video signal |
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|---|---|---|---|
| CN85101811A CN85101811B (en) | 1985-04-01 | 1985-04-01 | Method and apparatus for sampling video signal |
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| CN85101811A Expired CN85101811B (en) | 1985-04-01 | 1985-04-01 | Method and apparatus for sampling video signal |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101388644B (en) * | 2007-08-28 | 2012-07-04 | 精工电子有限公司 | Variable frequency oscillating circuit |
| CN104092461A (en) * | 2014-07-03 | 2014-10-08 | 广州市易轩生物科技有限公司 | Coil synchronous alternating-current driving circuit |
| CN106791839A (en) * | 2016-12-19 | 2017-05-31 | 中国航空工业集团公司洛阳电光设备研究所 | It is a kind of to CCIR or EIA standard analog video digitized sampling method and devices |
| CN115001498A (en) * | 2019-11-21 | 2022-09-02 | 珠海极海半导体有限公司 | Analog-digital converter |
-
1985
- 1985-04-01 CN CN85101811A patent/CN85101811B/en not_active Expired
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101388644B (en) * | 2007-08-28 | 2012-07-04 | 精工电子有限公司 | Variable frequency oscillating circuit |
| CN104092461A (en) * | 2014-07-03 | 2014-10-08 | 广州市易轩生物科技有限公司 | Coil synchronous alternating-current driving circuit |
| CN104092461B (en) * | 2014-07-03 | 2018-01-23 | 广州市易轩生物科技有限公司 | Coil synchronous AC drive circuit |
| CN106791839A (en) * | 2016-12-19 | 2017-05-31 | 中国航空工业集团公司洛阳电光设备研究所 | It is a kind of to CCIR or EIA standard analog video digitized sampling method and devices |
| CN106791839B (en) * | 2016-12-19 | 2020-03-27 | 中国航空工业集团公司洛阳电光设备研究所 | Method and device for digitally sampling CCIR (China center IR) or EIA (electronic article Association) standard analog video |
| CN115001498A (en) * | 2019-11-21 | 2022-09-02 | 珠海极海半导体有限公司 | Analog-digital converter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN85101811B (en) | 1988-04-20 |
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