CN2814816Y - Optic net card for whole optical net 650nm information transmission system - Google Patents
Optic net card for whole optical net 650nm information transmission system Download PDFInfo
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- CN2814816Y CN2814816Y CNU2005200692634U CN200520069263U CN2814816Y CN 2814816 Y CN2814816 Y CN 2814816Y CN U2005200692634 U CNU2005200692634 U CN U2005200692634U CN 200520069263 U CN200520069263 U CN 200520069263U CN 2814816 Y CN2814816 Y CN 2814816Y
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- ip100a
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Abstract
The utility model relates to an optical network card of an all-optical network 650 nm information transmission system, which relates to network equipment, particularly customer terminal equipment of an optical network, which is mainly composed of a PCI interface, a voltage converting circuit, an optical fiber module interface with positive 3.3V supply voltage, an EEPROM memory, an indicator light circuit used for indicating data reception and transmission, 25MHz crystal oscillating circuit for providing a clock source for a master control chip and an IP100A master control chip, wherein the bus width of the PCI interface is 32 bit. Different photon networks can be widely interconnected by the utility model; the utility model provides a new generation short-distance high-broadband network transmission system which can meet the technical requirements and reduce the cost for a high-speed access network to realize 'optical fiber on a tabletop ' of all optical transmission; the utility model has important applicable value. The utility model is used on a computer terminal for interconnecting an Ethernet net by a plastic optical fiber.
Description
Technical field
The utility model relates to a kind of network equipment, especially a kind of subscriber terminal equipment of optical-fiber network, " last kilometer " subscriber terminal equipment that just is commonly called as usually.
Background technology
The silica fiber network information on the existing backbone must be through light/electricity, electricity/light conversion when access user terminal, and this changing turns over journey and not only influence transmission speed, and causes signal attenuation, information distortion, is subject to external interference, and the information that also is prone to is stolen.
In order to change the above-mentioned defective in the existing information transmission, a kind of all-optical network just under study for action, all-optical network becomes the first-selection of (ultrahigh speed) broadband network at a high speed of future generation with its good transparency, wavelength routing characteristic, compatibility and extensibility.
The utility model content
The purpose of this utility model provides a kind of use at terminal for all-optical network exactly, utilizes the light network interface card of all optical network 650nm information transmission system that plastic fiber and Ethernet net interconnect.
The utility model mainly is 32 pci interface by highway width, voltage conversion circuit, supply power voltage is+3.3 optic module interface, eeprom memory, the indicator light circuit that designation data receives and sends, for providing the 25MHz crystal oscillating circuit in clock source and IP100A main control chip, main control chip forms, pci interface respectively with the optic module interface, voltage conversion circuit connects, eeprom memory respectively with pci interface, the IP100A main control chip connects, the IP100A main control chip also is connected with crystal oscillating circuit, indicator light circuit respectively with pci interface, the IP100A main control chip connects.
Voltage conversion circuit comprises+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentaries on classics+2.5V voltage supply circuit.
+ 5V voltage output end and+the 3.3V voltage output end is provided with filtering analog power circuit and digital power circuit respectively.
Above-mentioned power-supply system+the 5V power supply takes from pci bus, gone out+3.3V by this power conversion then, and go out+the 2.5V power supply, after filtering,, be connected on the respective pins of main control chip by+3.3V power conversion more respectively as analog power and digital power.
The pci bus width is 32, is that the utility model is the interface with computer data exchange, and of the present utility model+5V power supply is taken from the pci bus+5V voltage.
Also be provided with the BOOTROM memory that is connected with main control chip in the light network interface card, the BOOTROM memory is connected+the 3.3V output voltage on.The non-volatile EEPROM 93C46 of external serial stores relevant information, for example node address (MAC Address), system identifier, default setting or the like.When system reset, main control chip will read relevant information and deposit in the relevant register from EEPROM.BOOTROM is mainly used in the non-disk workstation, and when main control chip resetted, its driver was loaded among the BOOTROM.In the time wouldn't using, do not welded yet.
25MHz crystal oscillating circuit of the present utility model is connected on the pin 31 and pin 32 of IP100A main control chip.Input XTAL
1Be connected on the pin 32 of IP100A main control chip output XTAL
2Be connected on the pin 31 of IP100A main control chip.For main control chip provides the clock source, be the crystal oscillator of external 25MHz, and be equipped with corresponding electric capacity.External crystal oscillator and internal circuit form oscillation circuit, provide clock to main control chip.
The power supply circuits of above-mentioned optic module interface through filter circuit and pci interface+5V supply voltage output is connected, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface; The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IPI00A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection; The pin 3,7,8 of BOOTROM memory and pci interface+3.3V voltage source output is connected, its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 is connected with the pin 18 of IP100A main control chip, and pin 6 is connected with the pin 17 of IP100A main control chip; The indicator light circuit of designation data reception and transmission comprises a LED light-emitting diode and resistance string back circuit composition also earlier, two LED LEDs
1, LED
2Be connected in parallel on respectively pci interface+3.3V supply voltage output, with LED
1The resistance R of series connection
1Be connected on the pin 21 of IP100A main control chip, with LED
2The resistance R of series connection
2Be connected on the pin 16 of IP100A main control chip.
The utility model IP100A main control chip is the control centre of whole system, pci interface is the interface of light network interface card and computer data exchange, the light network interface card+the 5V power supply is taken from the pci bus+5V voltage, owing to used+and the light modular converter of 5V power supply, the level of its output and reception is 0~5V; And the power supply of master controller is+2.5V/+3.3V, so with voltage transitions is the signal level of 0~3V, the non-volatile EEPROM 93C46 of the external serial of the utility model stores relevant information, for example node address (MAC Address), system identifier, default setting or the like.When system reset, main control chip will read relevant information and deposit in the relevant register from EEPROM, BOOTROM is mainly used in the non-disk workstation, when main control chip resets, its driver is loaded among the BOOTROM, crystal oscillating circuit provides the clock source for the IPI00A main control chip, + 5V power supply is taken from pci bus, go out+3.3V by this power conversion then, go out+the 2.5V power supply by+3.3V power conversion again, after filtering,, be connected on the respective pins of main control chip respectively as analog power and digital power, take from the PCI+the 5V power supply through after the filtering as the power supply of optic module.To convert serial data to from the parallel data of PCI, and directly transmit outward, also the light signal that comes from plastic fiber can be changed into the manageable parallel signal of computer, deliver Computer Processing by pci bus with the form of light signal.
The utility model is the Primary Component in the all-optical network, by it can wide area ground the different photonic network of interconnection, for high-speed access network is realized " fiber to the desk " full optical transmission, provide a kind of and can satisfy specification requirement, the short distance of new generation that can reduce cost again, high broadband network transmission system have important use and are worth.The utility model uses at terminal, utilizes plastic fiber and Ethernet net to interconnect.It has the various characteristics of general network interface card, and the good characteristic of performance PIC bus also adopts the working method of bus master.Follow (ACPI) characteristic in the ACPI, by the provide support power management function of system of hardware and operating system.The 1/O interface is 650nm plastic fiber (POF) optical interface.Can be widely used in fields such as information network wiring, industrial-controlled general line, car (machine, warship) year communication wires, military security system wiring.
IP100A main control chip of the present utility model is a monolithic, full duplex, 10M/100M self adaptation ether MAC+PHY, meet the IEEE802.3 agreement, adapt to 100BASE-TX/100BASE-FX/10BASE-T, and have 32 pci interfaces, this chip has 128 pin PQFP encapsulation.
Description of drawings
Fig. 1 always schemes for the light network interface card;
Fig. 2 is one of circuit theory diagrams of the present utility model;
Fig. 3 is two of circuit theory diagrams of the present utility model.
Specific embodiment
Voltage conversion circuit comprises+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentariess on classics+2.5V voltage supply circuit, at+5V voltage output end and+3.3V voltage output end filtering analog power circuit and digital power circuit are set respectively.
The IP100A main control chip is a monolithic, full duplex, 10M/100M self adaptation ether MAC+PHY, meets the IEEE802.3 agreement, adapts to 100BASE-TX/100BASE-FX/10BASE-T, and has 32 pci interfaces, and this chip has 128 pin PQFP encapsulation.
The power supply circuits of optic module interface through filter circuit and pci interface+5V supply voltage output is connected, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface.
The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IP100A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection.
The pin 3,7,8 of BOOTROM memory and pci interface+3.3V voltage source output is connected, its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 is connected with the pin 18 of IP100A main control chip, and pin 6 is connected with the pin 17 of IP100A main control chip.
The indicator light circuit of designation data reception and transmission comprises a LED light-emitting diode and resistance string back circuit composition also earlier, two LED LEDs
1, LED
2Be connected in parallel on respectively pci interface+3.3V supply voltage output, with LED
1The resistance R of series connection
1Be connected on the pin 21 of IP100A main control chip, with LED
2The resistance R of series connection
2Be connected on the pin 16 of IP100A main control chip.
25MHz crystal oscillating circuit input XTAL
1Be connected on the pin 32 of IP100A main control chip output XTAL
2Be connected on the pin 31 of IP100A main control chip.
Claims (8)
1, the light network interface card of all optical network 650nm information transmission system, it is characterized in that mainly being 32 pci interface by highway width, voltage conversion circuit, supply power voltage is+3.3 optic module interface, eeprom memory, the indicator light circuit that designation data receives and sends, for providing the 25MHz crystal oscillating circuit in clock source and IP100A main control chip, main control chip forms, pci interface respectively with the optic module interface, voltage conversion circuit connects, eeprom memory respectively with pci interface, the IP100A main control chip connects, the IP100A main control chip also is connected with crystal oscillating circuit, indicator light circuit respectively with pci interface, the IP100A main control chip connects.
2, according to the light network interface card of the described all optical network 650nm of claim 1 information transmission system, it is characterized in that voltage conversion circuit comprise+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentaries on classics+2.5V voltage supply circuit.
3, according to the light network interface card of the described all optical network 650nm of claim 2 information transmission system, it is characterized in that+5V voltage output end and+the 3.3V voltage output end is provided with filtering analog power circuit and digital power circuit respectively.
4, according to the light network interface card of the described all optical network 650nm of claim 1 information transmission system, it is characterized in that also being provided with in the light network interface card BOOTROM memory that is connected with main control chip, the BOOTROM memory is connected+the 3.3V output voltage on.
5,, it is characterized in that the 25MHz crystal oscillating circuit is connected on the pin 31 and pin 32 of IP100A main control chip according to the light network interface card of the described all optical network 650nm of claim 1 information transmission system.
6,, it is characterized in that 25MHz crystal oscillating circuit input XTAL according to the light network interface card of the described all optical network 650nm of claim 5 information transmission system
1Be connected on the pin 32 of IP100A main control chip output XTAL
2Be connected on the pin 31 of IP100A main control chip.
7, according to the light network interface card of the described all optical network 650nm of claim 1 information transmission system, the power supply circuits that it is characterized in that the optic module interface through filter circuit and pci interface+5V supply voltage output is connected, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface; The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IP100A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection; The pin 3,7,8 of BOOTROM memory and pci interface+3.3V voltage source output is connected, its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 is connected with the pin 18 of IP100A main control chip, and pin 6 is connected with the pin 17 of IP100A main control chip; The indicator light circuit of designation data reception and transmission comprises a LED light-emitting diode and resistance string back circuit composition also earlier, two LED LEDs
1, LED
2Be connected in parallel on respectively pci interface+3.3V supply voltage output, with LED
1The resistance R of series connection
1Be connected on the pin 21 of IP100A main control chip, with LED
2The resistance R of series connection
2Be connected on the pin 16 of IP100A main control chip.
8, according to the light network interface card of the described all optical network 650nm of claim 7 information transmission system, it is characterized in that the IP100A main control chip is a monolithic, full duplex, 10M/100M self adaptation ether MAC+PHY, meet the IEEE802.3 agreement, adapt to 100BASE-TX/100BASE-FX/10BASE-T, and having 32 pci interfaces, this chip has 128 pin PQFP encapsulation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU2005200692634U CN2814816Y (en) | 2005-02-24 | 2005-02-24 | Optic net card for whole optical net 650nm information transmission system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU2005200692634U CN2814816Y (en) | 2005-02-24 | 2005-02-24 | Optic net card for whole optical net 650nm information transmission system |
Publications (1)
Publication Number | Publication Date |
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CN2814816Y true CN2814816Y (en) | 2006-09-06 |
Family
ID=36949902
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CNU2005200692634U Expired - Fee Related CN2814816Y (en) | 2005-02-24 | 2005-02-24 | Optic net card for whole optical net 650nm information transmission system |
Country Status (1)
Country | Link |
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CN (1) | CN2814816Y (en) |
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2005
- 2005-02-24 CN CNU2005200692634U patent/CN2814816Y/en not_active Expired - Fee Related
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |