CN1901455A - Light net card for full light net 650 nm information transmission system - Google Patents
Light net card for full light net 650 nm information transmission system Download PDFInfo
- Publication number
- CN1901455A CN1901455A CNA2005100411777A CN200510041177A CN1901455A CN 1901455 A CN1901455 A CN 1901455A CN A2005100411777 A CNA2005100411777 A CN A2005100411777A CN 200510041177 A CN200510041177 A CN 200510041177A CN 1901455 A CN1901455 A CN 1901455A
- Authority
- CN
- China
- Prior art keywords
- pin
- control chip
- main control
- circuit
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Small-Scale Networks (AREA)
Abstract
The optical network card for a total optical network 650nm information transmission system relates to a network device, especially to a user terminal device of an optical network composed of a PCI interface with 32 bit bus width, a voltage conversion circuit, a fiber module interface with +3.3 supply voltage, EEPROM storage, an instruction lamp circuit indicating receiving and transmission of data, a 25MHz crystal oscillation circuit providing clock source to the primary control chip and an IP100A primary control chip, in which, different photon networks can be widely interconnected with the help of the device.
Description
Technical field
The present invention relates to a kind of network equipment, especially a kind of subscriber terminal equipment of optical-fiber network, " last kilometer " subscriber terminal equipment that just is commonly called as usually.
Background technology
The silica fiber network information on the existing backbone must be through light/electricity, electricity/light conversion when access user terminal, and this changing turns over journey and not only influence transmission speed, and causes signal attenuation, information distortion, is subject to external interference, and the information that also is prone to is stolen.
In order to change the above-mentioned defective in the existing information transmission, a kind of all-optical network just under study for action, all-optical network becomes the first-selection of (ultrahigh speed) broadband network at a high speed of future generation with its good transparency, wavelength routing characteristic, compatibility and extensibility.
Summary of the invention
Purpose of the present invention provides a kind of use at terminal for all-optical network exactly, utilizes the light network interface card of all optical network 650nm information transmission system that plastic fiber and Ethernet net interconnect.
The present invention main mainly by IP100A main control chip, the highway width that is connected with the IP100A main control chip for 32 pci interface circuit, voltage conversion circuit, supply power voltage for the indicator light circuit of+3.3 optic module interface circuit, eeprom memory, designation data reception and transmission, form for main control chip provides the 25MHz crystal oscillating circuit in clock source.
Voltage conversion circuit comprises+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentaries on classics+2.5V voltage supply circuit.
+ 5V voltage output end and+the 3.3V voltage output end is provided with filtering analog power circuit and digital power circuit respectively.
Above-mentioned power-supply system+the 5V power supply takes from pci bus, gone out+3.3V by this power conversion then, and go out+the 2.5V power supply, after filtering,, be connected on the respective pins of main control chip by+3.3V power conversion more respectively as analog power and digital power.
The pci bus width is 32, is that the present invention is the interface with computer data exchange, and of the present invention+5V power supply is taken from the pci bus+5V voltage.
Also be provided with the BOOTROM memory that is connected with main control chip in the light network interface card, the BOOTROM memory is connected+the 3.3V output voltage on.The non-volatile EEPROM 93C46 of external serial stores relevant information, for example node address (MAC Address), system identifier, default setting or the like.When system reset, main control chip will read relevant information and deposit in the relevant register from EEPROM.BOOTROM is mainly used in the non-disk workstation, and when main control chip resetted, its driver was loaded among the BOOTROM.In the time wouldn't using, do not welded yet.
25MHz crystal oscillating circuit of the present invention is connected on the pin 31 and pin 32 of IP100A main control chip.Input XTAL
1Be connected on the pin 32 of IP100A main control chip output XTAL
2Be connected on the pin 31 of IP100A main control chip.For main control chip provides the clock source, be the crystal oscillator of external 25MHz, and be equipped with corresponding electric capacity.External crystal oscillator and internal circuit form oscillation circuit, provide clock to main control chip.
The power supply circuits of above-mentioned optic module interface through filter circuit and pci interface+5V supply voltage output is connected, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface; The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IP100A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection; The pin 3,7,8 of BOOTROM memory and pci interface+3.3V voltage source output is connected, its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 is connected with the pin 18 of IP100A main control chip, and pin 6 is connected with the pin 17 of IP100A main control chip; The indicator light circuit of designation data reception and transmission comprises a LED light-emitting diode and resistance string back circuit composition also earlier, two LED LEDs
1, LED
2Be connected in parallel on respectively pci interface+3.3V supply voltage output, with LED
1The resistance R of series connection
1Be connected on the pin 21 of IP100A main control chip, with LED
2The resistance R of series connection
2Be connected on the pin 16 of IP100A main control chip.
IP100A main control chip of the present invention is the control centre of whole system, pci interface is the interface of light network interface card and computer data exchange, the light network interface card+the 5V power supply is taken from the pci bus+5V voltage, owing to used+the light modular converter of 5V power supply, the level of its output and reception is 0～5V; And the power supply of master controller is+2.5V/+3.3V, so be the signal level of 0～3V with voltage transitions, the non-volatile EEPROM 93C46 of the external serial of the present invention stores relevant information, for example node address (MAC Address), system identifier, default setting or the like.When system reset, main control chip will read relevant information and deposit in the relevant register from EEPROM, BOOTROM is mainly used in the non-disk workstation, when main control chip resets, its driver is loaded among the BOOTROM, crystal oscillating circuit provides the clock source for the IP100A main control chip, + 5V power supply is taken from pci bus, go out+3.3V by this power conversion then, go out+the 2.5V power supply by+3.3V power conversion again, after filtering,, be connected on the respective pins of main control chip respectively as analog power and digital power, take from the PCI+the 5V power supply through after the filtering as the power supply of optic module.To convert serial data to from the parallel data of PCI, and directly transmit outward, also the light signal that comes from plastic fiber can be changed into the manageable parallel signal of computer, deliver Computer Processing by pci bus with the form of light signal.
The present invention is the Primary Component in the all-optical network, by it can wide area ground the different photonic network of interconnection, for high-speed access network is realized " fiber to the desk " full optical transmission, provide a kind of and can satisfy specification requirement, the short distance of new generation that can reduce cost again, high broadband network transmission system have important use and are worth.The present invention uses at terminal, utilizes plastic fiber and Ethernet net to interconnect.It has the various characteristics of general network interface card, and the good characteristic of performance PIC bus also adopts the working method of bus master.Follow (ACPI) characteristic in the ACPI, by the provide support power management function of system of hardware and operating system.1/0 interface is 650nm plastic fiber (POF) optical interface.Can be widely used in fields such as information network wiring, industrial-controlled general line, car (machine, warship) year communication wires, military security system wiring.
IP100A main control chip of the present invention is a monolithic, full duplex, 10M/100M self adaptation ether MAC+PHY, meet the IEEE802.3 agreement, adapt to 100BASE-TX/100BASE-FX/10BASE-T, and have 32 pci interfaces, this chip has 128 pin PQFP encapsulation.
Description of drawings
Fig. 1 is one of circuit theory diagrams of the present invention;
Fig. 2 is two of circuit theory diagrams of the present invention;
Fig. 3 is three of circuit theory diagrams of the present invention.
Specific embodiment
Voltage conversion circuit comprises+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentariess on classics+2.5V voltage supply circuit, at+5V voltage output end and+3.3V voltage output end filtering analog power circuit and digital power circuit are set respectively.
The IP100A main control chip is a monolithic, full duplex, 10M/100M self adaptation ether MAC+PHY, meets the IEEE802.3 agreement, adapts to 100BASE-TX/100BASE-FX/10BASE-T, and has 32 pci interfaces, and this chip has 128 pin PQFP encapsulation.
The power supply circuits of optic module interface through filter circuit and pci interface+5V supply voltage output is connected, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface.
The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IP100A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection.
The pin 3,7,8 of BOOTROM memory and pci interface+3.3V voltage source output is connected, its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 is connected with the pin 18 of IP100A main control chip, and pin 6 is connected with the pin 17 of IP100A main control chip.
The indicator light circuit of designation data reception and transmission comprises a LED light-emitting diode and resistance string back circuit composition also earlier, two LED LEDs
1, LED
2Be connected in parallel on respectively pci interface+3.3V supply voltage output, with LED
1The resistance R of series connection
1Be connected on the pin 21 of IP100A main control chip, with LED
2The resistance R of series connection
2Be connected on the pin 16 of IP100A main control chip.
25MHz crystal oscillating circuit input XTAL
1Be connected on the pin 32 of IP100A main control chip output XTAL
2Be connected on the pin 31 of IP100A main control chip.
Claims (8)
1, the light network interface card of all optical network 650nm information transmission system, it is characterized in that mainly by IP100A main control chip, the highway width that is connected with the IP100A main control chip for 32 pci interface circuit, voltage conversion circuit, supply power voltage for the indicator light circuit of+3.3 optic module interface circuit, eeprom memory, designation data reception and transmission, form for main control chip provides the 25MHz crystal oscillating circuit in clock source.
2, according to the light network interface card of the described all optical network 650nm of claim 1 information transmission system, it is characterized in that voltage conversion circuit comprise+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentaries on classics+2.5V voltage supply circuit.
3, according to the light network interface card of the described all optical network 650nm of claim 2 information transmission system, it is characterized in that+5V voltage output end and+the 3.3V voltage output end is provided with filtering analog power circuit and digital power circuit respectively.
4, according to the light network interface card of the described all optical network 650nm of claim 1 information transmission system, it is characterized in that also being provided with in the light network interface card BOOTROM memory that is connected with main control chip, the BOOTROM memory is connected+the 3.3V output voltage on.
5,, it is characterized in that the 25MHz crystal oscillating circuit is connected on the pin 31 and pin 32 of IP100A main control chip according to the light network interface card of the described all optical network 650nm of claim 1 information transmission system.
6, according to the light network interface card of the described all optical network 650nm of claim 5 information transmission system, it is characterized in that 25MHz crystal oscillating circuit input XTAL1 is connected on the pin 32 of IP100A main control chip, output XTAL2 is connected on the pin 31 of IP100A main control chip.
7, according to the light network interface card of the described all optical network 650nm of claim 1 information transmission system, the power supply circuits that it is characterized in that the optic module interface through filter circuit and pci interface+5V supply voltage output is connected, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface; The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IP100A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection; The pin 3,7,8 of BOOTROM memory and pci interface+3.3V voltage source output is connected, its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 is connected with the pin 18 of IP100A main control chip, and pin 6 is connected with the pin 17 of IP100A main control chip; The indicator light circuit of designation data reception and transmission comprises a LED light-emitting diode and resistance string back circuit composition also earlier, two LED LEDs
1, LED
2Be connected in parallel on respectively pci interface+3.3V supply voltage output, with LED
1The resistance R of series connection
1Be connected on the pin 21 of IP100A main control chip, with LED
2The resistance R of series connection
2Be connected on the pin 16 of IP100A main control chip.
8, according to the light network interface card of the described all optical network 650nm of claim 7 information transmission system, it is characterized in that the IP100A main control chip is a monolithic, full duplex, 10M/100M self adaptation ether MAC+PHY, meet the IEEE802.3 agreement, adapt to 100BASE-TX/100BASE-FX/10BASE-T, and having 32 pci interfaces, this chip has 128 pin PQFP encapsulation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2005100411777A CN1901455A (en) | 2005-07-20 | 2005-07-20 | Light net card for full light net 650 nm information transmission system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2005100411777A CN1901455A (en) | 2005-07-20 | 2005-07-20 | Light net card for full light net 650 nm information transmission system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1901455A true CN1901455A (en) | 2007-01-24 |
Family
ID=37657208
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2005100411777A Pending CN1901455A (en) | 2005-07-20 | 2005-07-20 | Light net card for full light net 650 nm information transmission system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1901455A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111371658A (en) * | 2020-02-21 | 2020-07-03 | 深圳市海弘装备技术有限公司 | EtherCAT bus control system |
-
2005
- 2005-07-20 CN CNA2005100411777A patent/CN1901455A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111371658A (en) * | 2020-02-21 | 2020-07-03 | 深圳市海弘装备技术有限公司 | EtherCAT bus control system |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20060075175A1 (en) | Method and system for configuring high-speed serial links between components of a network device | |
| CN205305048U (en) | Giga light network switch | |
| CN205304857U (en) | 10, 000, 000, 000 light network switch | |
| CN1901455A (en) | Light net card for full light net 650 nm information transmission system | |
| CN2814816Y (en) | Optic net card for whole optical net 650nm information transmission system | |
| CN2807626Y (en) | Optical network interface card of all-optical network 650nm information transmission system | |
| CN2785272Y (en) | Optical network card for optical network 650nm information system | |
| CN1812329A (en) | Optical exchanger for 650nm plastic optical fiber transmission system | |
| CN2852233Y (en) | Optical network card for 650nm plastic optical fibre transmission system | |
| CN2766461Y (en) | Photoelectric transceiver for information transmission system | |
| CN100345014C (en) | 650nm plastic optical fiber transmission system | |
| CN1897533A (en) | Light-network card of light network 650nm information system | |
| CN103716258A (en) | High-density line card, switching device, cluster system and electric signal type configuration method | |
| CN100365539C (en) | Optical net card for 650 nm plastic fibre-optical transmission system | |
| CN201127103Y (en) | Double-light-mouth switch module | |
| CN1901424A (en) | Photoelectric transceiver of information transmission system | |
| CN2814817Y (en) | Optical exchanger for whole optical net 650nm information transmission system | |
| CN2826844Y (en) | Photoelectric transceiver of information transmission system | |
| CN2857340Y (en) | Photoelectric converter of 650nm plastic fiber glass transmission system | |
| CN2872388Y (en) | Optical-fiber receiver-transmitter | |
| CN2766459Y (en) | All-optical network 650nm information transmission system | |
| CN1412974A (en) | Method for implementing Ethernet exchange piling | |
| CN1219261C (en) | Method and apparatus for plugging optical transcreceiving module internal E2 PROM for read broadband network device | |
| CN2891550Y (en) | Optical exchanger for 650nm plastic optical fiber transmission system | |
| CN2807623Y (en) | Wavelength converter of all-optical network 650nm information transmission system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |