CN2852233Y - Optical network card for 650nm plastic optical fibre transmission system - Google Patents
Optical network card for 650nm plastic optical fibre transmission system Download PDFInfo
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- CN2852233Y CN2852233Y CNU2005201398440U CN200520139844U CN2852233Y CN 2852233 Y CN2852233 Y CN 2852233Y CN U2005201398440 U CNU2005201398440 U CN U2005201398440U CN 200520139844 U CN200520139844 U CN 200520139844U CN 2852233 Y CN2852233 Y CN 2852233Y
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- ip100a
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Abstract
The utility model relates to an optical network card of a 650 nm plastic optical fiber transmission system, which relates to network equipment, particularly customer terminal equipment of an optical network, which is mainly composed of a PCI interface, a voltage converting circuit, an optical fiber module interface with positive 3.3V supply voltage, an EEPROM memory, an indicator light circuit used for indicating data reception and transmission, 25MHz crystal oscillating circuit for providing a clock source for a master control chip and an IP100A master control chip, wherein the bus width of the PCI interface is 32 bit. Different photon networks can be widely interconnected by the utility model; the utility model provides a new generation short-distance high-broadband network transmission system which can meet the technical requirements and reduce the cost, for a high-speed access network to realize 'optical fiber on a tabletop ' of all optical transmission; the utility model has important applicable value. The utility model uses a computer terminal for interconnecting an Ethernet net by a plastic optical fiber.
Description
Technical field
The utility model relates to a kind of network equipment, especially a kind of subscriber terminal equipment of optical-fiber network, " last kilometer " subscriber terminal equipment that just is commonly called as usually.
Background technology
The silica fibre network information on the existing backbone must be through light/electricity, electricity/light conversion when access user terminal, and this changing turns over journey and not only influence transmission speed, and causes signal attenuation, information distortion, is subject to external interference, and the information that also is prone to is stolen.
In order to change the above-mentioned defective in the existing information transmission, a kind of all-optical network just under study for action, all-optical network becomes the first-selection of (hypervelocity) broadband network at a high speed of future generation with its good transparency, wavelength routing characteristic, compatibility and extensibility.
The utility model content
The purpose of this utility model provides a kind of use at terminal for all-optical network exactly, utilizes the light network interface card of the 650nm plastic optical fiber transmission system that plastic optical fiber and Internet net interconnect.
The indicator light circuit that the utility model is mainly received and sends for+3.3 optic module interface circuit, eeprom memory, designation data for 32 pci interface circuit, voltage conversion circuit, supply voltage by IP100A main control chip, the highway width that is connected with the IP100A main control chip,, main control chip forms for providing the 25MHz crystal oscillating circuit in clock source.
Main control chip is ethernet medium access controller chip I P100A.IP100A is a low-power consumption, high performance CMOS chip, it has the whole physical layer function that meet the IEEE802.3u standard, mainly comprises core cells such as transmitting-receiving dma logic control circuit, the transmitting-receiving first-in first-out memory block that is respectively the 2K byte, medium Access Control module.
The utility model is in 32 pci bus slots, is used to receive and dispatch different information frames, to realize the integrated circuit card of data communication.The utility model is a building block in the plastic optical fiber system integration all-optical network, be used for terminal is connected to all optical network system, and the rate of information throughout of acquisition 100Mbps, and can realize the intercommunication of plastic optical fiber all optical network system and common information net, thereby carry out the optical communication of omnidistance all optical network.
Voltage conversion circuit comprises+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentaries on classics+2.5V voltage supply circuit.
+ 5V voltage output end and+the 3.3V voltage output end is provided with filtering analog power circuit and digital power circuit respectively.
Above-mentioned power-supply system+the 5V power supply takes from pci bus, gone out+3.3V by this power conversion then, and go out+the 2.5V power supply, after filtering,, be connected on the respective pins of main control chip by+3.3V power conversion more respectively as analog power and digital power.
The pci bus width is 32, is that the utility model is the interface with computer data exchange, and of the present utility model+5V power supply is taken from the pci bus+5V voltage.
Also be provided with the BOOTROM storer that is connected with main control chip in the light network interface card, the BOOTROM storer is connected+the 3.3V output voltage on.The non-volatile EEPROM 93C46 of external serial stores relevant information, for example node address (MAC Address), system identifier, default setting or the like.When system reset, main control chip will read relevant information and deposit in the relevant register from EEPROM.BOOTROM is mainly used in the non-disk workstation, and when main control chip resetted, its driver was loaded among the BOOTROM.In the time wouldn't using, do not welded yet.
25MHz crystal oscillating circuit of the present utility model is connected on the pin 31 and pin 32 of IP100A main control chip.Input end XTAL1 is connected on the pin 32 of IP100A main control chip, and output terminal XTAL2 is connected on the pin 31 of IP100A main control chip.For main control chip provides the clock source, be the crystal oscillator of external 25MHz, and be equipped with corresponding electric capacity.External crystal oscillator and internal circuit form oscillation circuit, provide clock to main control chip.
The feed circuit of above-mentioned optic module interface through filtering circuit and pci interface+5V supply voltage output terminal is connected, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface; The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IP100A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection; The pin 3,7,8 of BOOTROM storer and pci interface+3.3V voltage source output terminal is connected, its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 is connected with the pin 18 of IP100A main control chip, and pin 6 is connected with the pin 17 of IP100A main control chip; The indicator light circuit of designation data reception and transmission comprises a LED light emitting diode and resistance string back circuit composition also earlier, two LED LEDs 1, LED2 are connected in parallel on pci interface+3.3V supply voltage output terminal respectively, the resistance R 1 of connecting with LED 1 is connected on the pin 21 of IP100A main control chip, and the resistance R 2 of connecting with LED 2 is connected on the pin 16 of IP100A main control chip.
The utility model IP100A main control chip is the control center of total system, pci interface is the interface of light network interface card and computer data exchange, the light network interface card+the 5V power supply is taken from the pci bus+5V voltage, owing to used+and the light modular converter of 5V power supply, the level of its output and reception is 0～5V; And the power supply of master controller is+2.5V/+3.3V, so with voltage transitions is the signal level of 0～3V, the non-volatile EEPROM 93C46 of the external serial of the utility model stores relevant information, for example node address (MAC Address), system identifier, default setting or the like.When system reset, main control chip will read relevant information and deposit in the relevant register from EEPROM, BOOTROM is mainly used in the non-disk workstation, when main control chip resets, its driver is loaded among the BOOTROM, crystal oscillating circuit provides the clock source for the IP100A main control chip, + 5V power supply is taken from pci bus, go out+3.3V by this power conversion then, go out+the 2.5V power supply by+3.3V power conversion again, after filtering,, be connected on the respective pins of main control chip respectively as analog power and digital power, take from the PCI+the 5V power supply through after the filtering as the power supply of optic module.To convert serial data to from the parallel data of PCI, and directly transmit outward, also the light signal that comes from plastic optical fiber can be changed into the manageable parallel signal of computing machine, deliver Computer Processing by pci bus with the form of light signal.
The utility model is the Primary Component in the all-optical network, by it can wide area ground the different photonic network of interconnection, for high-speed access network is realized " fiber to the desk " full light transmission, provide a kind of and can satisfy technical requirement, the short distance of new generation that can reduce cost again, high broadband network transmission system have important use and are worth.The utility model uses at terminal, utilizes plastic optical fiber and Ethernet net to interconnect.It has the various characteristics of general network interface card, and the good characteristic of performance PIC bus also adopts the working method of bus master.Follow (ACPI) characteristic in the ACPI, by the provide support power management function of system of hardware and operating system.1/0 interface is 650nm plastic optical fiber (POF) optical interface.Can be widely used in fields such as information network wiring, industrial-controlled general line, car (machine, warship) year communication wires, military security system wiring.
IP100A main control chip of the present utility model is a monolithic, full duplex, 10M/100M self-adaptation ether MAC+PHY, meet the IEEE802.3 agreement, adapt to 100BASE-TX/100BASE-FX/10BASE-T, and have 32 pci interfaces, this chip has 128 pin PQFP encapsulation.
Description of drawings
Fig. 1 is a structured flowchart of the present utility model.
Fig. 2 is one of circuit theory diagrams of the present utility model;
Fig. 3 is two of circuit theory diagrams of the present utility model;
Fig. 4 is three of circuit theory diagrams of the present utility model;
Fig. 5 is four of circuit theory diagrams of the present utility model.
Specific embodiment
As shown in Figure 1, the course of work of the present utility model is summarized as follows:
Network interface card is received the data that bus transfer is come, the target MAC (Media Access Control) address that monolithic program elder generation receiving data frames head in the network interface card comprises, receiving mode according to the NIC driver setting on the main frame judges whether to be received, judge that this reception just produces look-at-me notice CPU after reception, CPU obtains look-at-me and produces interruption, operating system just receives this frame data according to the network interface card interrupt routine call by location driver that is provided with in the NIC driver, think should not receive just abandon no matter, so just distinguished, thereby the data on the network be sent to the terminal that pass to without address user.The transmission principle of data is basic identical in receiving, and when sending Frame, has comprised the destination address that will deliver to simultaneously, is published on the Ethernet through network interface card, has only with the identical terminal user of destination address just can receive Frame.
The each several part function:
1、TxFIFO
IP100A provides the space of the 2K bytes of memory between MAC and data transmit buffer, when the TxDMA logical circuit determines that TxFIFO has enough spaces, just the data that send are delivered among the TxFIFO, the transmission threshold registers can determine when automatically the data among the TxFIFO are sent.
2, TxDMA logic
IP100A supports focusing on of multiframe, multistage (multi-fragment) data, the TxDMA logic is responsible for these data are delivered to TxFIFO, TxDMA also monitors the size of the remaining space among the TxFIFO simultaneously in addition, and can determine when propose the transmission request to the TxDMA logic in view of the above.
3、RxFIFO
IP100A provides the space of the 2K bytes of memory between MAC and Data Receiving buffer, according to the size of RxDMA threshold value and remaining space, determines that the frame data that receive how many bytes are put into RxFIFO, and then, the RxDMA logic can allow to begin data and transmit.
4, RxDMA logic
IP100A supports the dispersion treatment of multiframe, multistage (multi-fragment) data, and the descriptor that characterizes frame data is set up linking relationship by main frame in system storage.The RxDMA logic is responsible for these data are delivered to the mainframe memory from RxFIFO., TxDMA also monitors the size of the remaining space among the RxFIFO simultaneously in addition, and after the data that received some bytes, the Frame of reception is " visible ".
5, EEPEOM interface
The serial EEPROM of IP100A outside is used for value of setting of memory node address, system identifier, default configuration item etc., as an initialized part after the system reset, IP100A can read initialization information by interface circuit from EEPROM, deliver to the control register of main frame.In addition, IP100A supports to read and write data to serial EEPROM chip 93LC46 and 93LC56 etc.By the level setting of EEOP pin, can select outside EEPROM.
6, pci interface
The relevant agreement and the various signal of the operation of pci interface bus can guarantee that IP100A moves on pci bus.Pci bus is also to the visit to each register in the IP100A of the management of DMA interface and main frame.The pci bus interface module can be accepted the operation requests of TxDMA logical circuit and RxDMA logical circuit arbitrarily.In addition, pci interface also is in charge of the interruption generation to main frame.
7, optical fiber transmitting-receiving interface and duty indicating circuit
Optical fiber transceiver module TODX2402 with TOSHIBA company is main the composition, constitute the data I/O passage on the Physical layer, bi-directional data is connected to the RXN/RXP of medium conversion chip IP100A, TXN/TXP, on 4 I/O pin, the independent transmitting-receiving exchange that realizes light signal.
The duty of transceiver channel, indicated in real time respectively by two LED: when optical fiber inserted, pilot lamp was lighted; When data transmit-receive, pilot lamp is glittering.
8, feed circuit
Voltage conversion circuit comprises: the DC-DC translation circuit of+5V DC voltage commentaries on classics+3.3V DC voltage.Conversion goes out+and 3.3V mainly is a usefulness of supplying with various chips and fiber optic interface circuits on the network interface card.
Voltage conversion circuit of the present utility model comprises+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentariess on classics+2.5V voltage supply circuit, at+5V voltage output end and+3.3V voltage output end filtering analog power circuit and digital power circuit are set respectively.
The IP100A main control chip is a monolithic, full duplex, 10M/100M self-adaptation ether MAC+PHY, meets the IEEE802.3 agreement, adapts to 100BASE-TX/100BASE-FX/10BASE-T, and has 32 pci interfaces, and this chip has 128 pin PQFP encapsulation.
The feed circuit of optic module interface through filtering circuit and pci interface+5V supply voltage output terminal is connected, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface.
The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IP100A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection.
The pin 3,7,8 of BOOTROM storer and pci interface+3.3V voltage source output terminal is connected, its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 is connected with the pin 18 of IP100A main control chip, and pin 6 is connected with the pin 17 of IP100A main control chip.
The indicator light circuit of designation data reception and transmission comprises a LED light emitting diode and resistance string back circuit composition also earlier, two LED LEDs
1, LED
2Be connected in parallel on respectively pci interface+3.3V supply voltage output terminal, with LED
1The resistance R of series connection
1Be connected on the pin 21 of IP100A main control chip, with LED
2The resistance R of series connection
2Be connected on the pin 16 of IP100A main control chip.
25MHz crystal oscillating circuit input end XTAL
1Be connected on the pin 32 of IP100A main control chip output terminal XTAL
2Be connected on the pin 31 of IP100A main control chip.
Claims (8)
1, the light network interface card of 650nm plastic optical fiber transmission system, it is characterized in that mainly by IP100A main control chip, the highway width that is connected with the IP100A main control chip for 32 pci interface circuit, voltage conversion circuit, supply voltage for the indicator light circuit of+3.3 optic module interface circuit, eeprom memory, designation data reception and transmission, form for main control chip provides the 25MHz crystal oscillating circuit in clock source.
2, according to the light network interface card of the described 650nm plastic optical fiber of claim 1 transmission system, it is characterized in that voltage conversion circuit comprise+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentaries on classics+2.5V voltage supply circuit.
3, according to the light network interface card of the described 650nm plastic optical fiber of claim 2 transmission system, it is characterized in that+5V voltage output end and+the 3.3V voltage output end is provided with filtering analog power circuit and digital power circuit respectively.
4, according to the light network interface card of the described 650nm plastic optical fiber of claim 1 transmission system, it is characterized in that also being provided with in the light network interface card BOOTROM storer that is connected with main control chip, the BOOTROM storer is connected+the 3.3V output voltage on.
5,, it is characterized in that the 25MHz crystal oscillating circuit is connected on the pin 31 and pin 32 of IP100A main control chip according to the light network interface card of the described 650nm plastic optical fiber of claim 1 transmission system.
6,, it is characterized in that 25MHz crystal oscillating circuit input end XTAL according to the light network interface card of the described 650nm plastic optical fiber of claim 5 transmission system
1Be connected on the pin 32 of IP100A main control chip output terminal XTAL
2Be connected on the pin 31 of IP100A main control chip.
7, according to the light network interface card of the described 650nm plastic optical fiber of claim 1 transmission system, the feed circuit that it is characterized in that the optic module interface through filtering circuit and pci interface+5V supply voltage output terminal is connected, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface; The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IP100A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection; The pin 3,7,8 of BOOTROM storer and pci interface+3.3V voltage source output terminal is connected, its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 is connected with the pin 18 of IP100A main control chip, and pin 6 is connected with the pin 17 of IP100A main control chip; The indicator light circuit of designation data reception and transmission comprises a LED light emitting diode and resistance string back circuit composition also earlier, two LED LEDs
1, LED
2Be connected in parallel on respectively pci interface+3.3V supply voltage output terminal, with LED
1The resistance R of series connection
1Be connected on the pin 21 of IP100A main control chip, with LED
2The resistance R of series connection
2Be connected on the pin 16 of IP100A main control chip.
8, according to the light network interface card of the described 650nm plastic optical fiber of claim 7 transmission system, it is characterized in that the IP100A main control chip is a monolithic, full duplex, 10M/100M self-adaptation ether MAC+PHY, meet the IEEE802.3 agreement, adapt to 100BASE-TX/100BASE-FX/10BASE-T, and having 32 pci interfaces, this chip has 128 pin PQFP encapsulation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2005201398440U CN2852233Y (en) | 2005-12-16 | 2005-12-16 | Optical network card for 650nm plastic optical fibre transmission system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2005201398440U CN2852233Y (en) | 2005-12-16 | 2005-12-16 | Optical network card for 650nm plastic optical fibre transmission system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2852233Y true CN2852233Y (en) | 2006-12-27 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2005201398440U Expired - Lifetime CN2852233Y (en) | 2005-12-16 | 2005-12-16 | Optical network card for 650nm plastic optical fibre transmission system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2852233Y (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100365539C (en) * | 2005-12-16 | 2008-01-30 | 乔桂兰 | Optical net card for 650 nm plastic fibre-optical transmission system |
| WO2011120422A1 (en) * | 2010-03-29 | 2011-10-06 | 华为技术有限公司 | Processing method and universal serial bus network card for passive optical network |
-
2005
- 2005-12-16 CN CNU2005201398440U patent/CN2852233Y/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100365539C (en) * | 2005-12-16 | 2008-01-30 | 乔桂兰 | Optical net card for 650 nm plastic fibre-optical transmission system |
| WO2011120422A1 (en) * | 2010-03-29 | 2011-10-06 | 华为技术有限公司 | Processing method and universal serial bus network card for passive optical network |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Effective date of abandoning: 20080130 |
|
| C25 | Abandonment of patent right or utility model to avoid double patenting |