CN2785272Y - Optical network card for optical network 650nm information system - Google Patents

Optical network card for optical network 650nm information system Download PDF

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Publication number
CN2785272Y
CN2785272Y CNU2004200545876U CN200420054587U CN2785272Y CN 2785272 Y CN2785272 Y CN 2785272Y CN U2004200545876 U CNU2004200545876 U CN U2004200545876U CN 200420054587 U CN200420054587 U CN 200420054587U CN 2785272 Y CN2785272 Y CN 2785272Y
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CN
China
Prior art keywords
pin
main control
control chip
circuit
ip100a
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Expired - Fee Related
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CNU2004200545876U
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Chinese (zh)
Inventor
乔桂兰
徐蓉艳
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Xi'an Feixun Photoelectronics Co., Ltd.
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HUASHAN PHOTOELECTRIC CO Ltd JIANGSU
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Priority to CNU2004200545876U priority Critical patent/CN2785272Y/en
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Publication of CN2785272Y publication Critical patent/CN2785272Y/en
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Abstract

The utility model relates to an optical network card for 650 nm plastic optical fiber transmission systems, which relates to a network device, particularly the subscriber terminal equipment of an optical network. The utility model is mainly composed of a PCI interface with a bus width of 32 byte, which can output +5v power supply, a voltage converting circuit, a fiber module interface, an EEPROM memory, a BOOTROM memory, an indicator light circuit for indicating data receiving and transmission, a 25MHz crystal circuit for providing a clock source for a main control chip and an IP100A main control chip. The utility model can be used for realizing interconnection with different photon networks in wide area, realizes full optical transmission of fiber to tabletop for a high-speed access network, provides a network transmission system which has the advantages of cost reduction, new generation, short distance and high broadband and can meet the specification of technology requirements. The utility model has important application value. The utility model is used in the computer terminal and can carry out interconnection with the Internet network by utilizing a plastic optical fiber.

Description

The light network interface card of all optical network 650nm information system
Technical field
The utility model relates to a kind of network equipment, especially a kind of subscriber terminal equipment of optical-fiber network, " last kilometer " subscriber terminal equipment that just is commonly called as usually.
Background technology
The silica fiber network information on the existing backbone must be through light/electricity, electricity/light conversion when access user terminal, and this changing turns over journey and not only influence transmission speed, and causes signal attenuation, information distortion, is subject to external interference, and the information that also is prone to is stolen.
In order to change the above-mentioned defective in the existing information transmission, a kind of all-optical network just under study for action, all-optical network becomes the first-selection of (ultrahigh speed) broadband network at a high speed of future generation with its good transparency, wavelength routing characteristic, compatibility and extensibility.
The utility model content
The purpose of this utility model provides a kind of use at terminal for all-optical network exactly, utilizes the light network interface card of all optical network 650nm information system that plastic fiber and Ethernet net interconnect.
The utility model mainly is the pci interface of 32 and output+5V power supply by highway width, voltage conversion circuit, the optic module interface, eeprom memory, the BOOTROM memory, the indicator light circuit that designation data receives and sends, for providing the 25MHz crystal oscillating circuit in clock source and IP100A main control chip, main control chip forms, the power supply circuits of described optic module interface, voltage conversion circuit is connected with pci interface respectively, eeprom memory, the BOOTROM memory, designation data receives with the indicator light circuit that sends and is connected with the output of pci interface respectively, more than each circuit, interface all is connected with IP100A master control core respectively, and IP100A master control core also is connected with the 25MHz crystal oscillating circuit.
The power supply circuits of above-mentioned optic module interface through filter circuit and pci interface+5V supply voltage output is connected, voltage conversion circuit comprises+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentaries on classics+2.5V voltage supply circuit, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface; The pin 1 of optic module interface and pin 9 ground connection, pin 2 is connected with the pin 36,37,41,42,128 of IP100A main control chip; The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IP100A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection; The pin 3,7,8 of BOOTROM memory and pci interface+3.3V voltage source output is connected, and its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 are connected with the pin 18 of IP100A main control chip, pin 6 is connected with the pin 17 of IP100A main control chip; The indicator light circuit of designation data reception and transmission comprises a LED light-emitting diode and resistance string back circuit composition also earlier, two LED LEDs 1, LED 2Be connected in parallel on respectively pci interface+3.3V supply voltage output, with LED 1The resistance R of series connection 1Be connected on the pin 42 of IP100A main control chip, with LED 2The resistance R of series connection 2Be connected on the pin 37 of IP100A main control chip; Crystal oscillating circuit is connected on the pin 31 and pin 32 of IP100A main control chip.
The utility model IP100A main control chip is the control centre of whole system, pci interface is the interface of light network interface card and computer data exchange, the light network interface card+the 5V power supply is taken from the pci bus+5V voltage, owing to used+and the light modular converter of 5V power supply, the level of its output and reception is 0~5V; And the power supply of master controller is+2.5V/+3.3V, so with voltage transitions is the signal level of 0~3V, the non-volatile EEPROM 93C46 of the external serial of the utility model stores relevant information, for example node address (MAC Address), system identifier, default setting or the like.When system reset, main control chip will read relevant information and deposit in the relevant register from EEPROM, BOOTROM is mainly used in the non-disk workstation, when main control chip resets, its driver is loaded among the BOOTROM, crystal oscillating circuit provides the clock source for the IP100A main control chip, + 5V power supply is taken from pci bus, go out+3.3V by this power conversion then, go out+the 2.5V power supply by+3.3V power conversion again, after filtering,, be connected on the respective pins of main control chip respectively as analog power and digital power, take from the PCI+the 5V power supply through after the filtering as the power supply of optic module.To convert serial data to from the parallel data of PCI, and directly transmit outward, also the light signal that comes from plastic fiber can be changed into the manageable parallel signal of computer, deliver Computer Processing by pci bus with the form of light signal.
The utility model is the Primary Component in the all-optical network, by it can wide area ground the different photonic network of interconnection, for high-speed access network is realized " Fiber to the home " full optical transmission, provide a kind of and can satisfy specification requirement, the short distance of new generation that can reduce cost again, high broadband network transmission system have important use and are worth.The utility model uses at terminal, utilizes plastic fiber and Ethernet net to interconnect.It has the various characteristics of general network interface card, and the good characteristic of performance PIC bus also adopts the working method of bus master.Follow (ACPI) characteristic in the ACPI, by the provide support power management function of system of hardware and operating system.1/0 interface is 650nm plastic fiber (POF) optical interface.Can be widely used in fields such as information network wiring, industrial-controlled general line, car (machine, warship) year communication wires, military security system wiring.
IP100A main control chip of the present utility model is a monolithic, full duplex, 10M/100M self adaptation ether MAC+PHY, meet the IEEE802.3 agreement, adapt to 100BASE-TX/100BASE-FX/10BASE-T, and have 32 pci interfaces, this chip has 128 pin PQFP encapsulation.
Voltage conversion circuit of the present utility model comprises+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentaries on classics+2.5V voltage supply circuit; + 5V voltage output end and+the 3.3V voltage output end is provided with filtering analog power circuit and digital power circuit respectively.
25MHz crystal oscillating circuit input XTAL of the present utility model 1Be connected on the pin 32 of IP100A main control chip output XTAL 2Be connected on the pin 31 of IP100A main control chip.External crystal oscillator and internal circuit form oscillation circuit, clock are provided for the IP100A main control chip.
Description of drawings
Fig. 1 always schemes for the light network interface card;
Fig. 2 is one of circuit theory diagrams of the present utility model;
Fig. 3 is two of circuit theory diagrams of the present utility model.
Specific embodiment
Voltage conversion circuit comprises+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentariess on classics+2.5V voltage supply circuit, at+5V voltage output end and+3.3V voltage output end filtering analog power circuit and digital power circuit are set respectively.
The IP100A main control chip is a monolithic, full duplex, 10M/100M self adaptation ether MAC+PHY, meets the IEEE802.3 agreement, adapts to 100BASE-TX/100BASE-FX/10BASE-T, and has 32 pci interfaces, and this chip has 128 pin PQFP encapsulation.
The power supply circuits of optic module interface through filter circuit and pci interface+5V supply voltage output is connected, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface.
The pin 1 of optic module interface and pin 9 ground connection, pin 2 is connected with the pin 36,37,41,42,128 of IP100A main control chip; The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IP100A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection.
The pin 3,7,8 of BOOTROM memory and pci interface+3.3V voltage source output is connected, and its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 are connected with the pin 18 of IP100A main control chip, pin 6 is connected with the pin 17 of IP100A main control chip.
The indicator light circuit of designation data reception and transmission comprises a LED light-emitting diode and resistance string back circuit composition also earlier, two LED LEDs 1, LED 2Be connected in parallel on respectively pci interface+3.3V supply voltage output, with LED 1The resistance R of series connection 1Be connected on the pin 42 of IP100A main control chip, with LED 2The resistance R of series connection 2Be connected on the pin 37 of IP100A main control chip.
Crystal oscillating circuit input XTAL 1Be connected on the pin 32 of IP100A main control chip output XTAL 2Be connected on the pin 31 of IP100A main control chip.

Claims (6)

1, the light network interface card of all optical network 650nm information system, it is characterized in that mainly by highway width being the pci interface of 32 and output+5V power supply, voltage conversion circuit, the optic module interface, eeprom memory, the BOOTROM memory, the indicator light circuit that designation data receives and sends, for providing the 25MHz crystal oscillating circuit in clock source and IP100A main control chip, main control chip forms, the power supply circuits of described optic module interface, voltage conversion circuit is connected with pci interface respectively, eeprom memory, the BOOTROM memory, designation data receives with the indicator light circuit that sends and is connected with the output of pci interface respectively, more than each circuit, interface all is connected with IP100A master control core respectively, and IP100A master control core also is connected with the 25MHz crystal oscillating circuit.
2, according to the light network interface card of the described all optical network 650nm of claim 1 information system, the power supply circuits that it is characterized in that the optic module interface through filter circuit and pci interface+5V supply voltage output is connected, voltage conversion circuit+the 5V power input is connected on the A face pin 5,8,61,62 and B face pin 5,6,61,62 of pci interface; The pin 1 of optic module interface and pin 9 ground connection, pin 2 is connected with the pin 36,37,41,42,128 of IP100A main control chip; The pin 6,8 of eeprom memory and pci interface+the 3.3V voltage source is connected, and its pin 1 is connected with the pin 28 of IP100A main control chip, pin 2 is connected with the pin 17 of IP100A main control chip, pin 3 is connected with the pin 18 of IP100A main control chip, pin 4 is connected with the pin 22 of IP100A main control chip, pin 5 ground connection; The pin 3,7,8 of BOOTROM memory and pci interface+3.3V voltage source output is connected, and its pin 1 is connected with the pin 27 of IP100A main control chip, pin 2 is connected with the pin 22 of IP100A main control chip, pin 4 ground connection, pin 5 are connected with the pin 18 of IP100A main control chip, pin 6 is connected with the pin 17 of IP100A main control chip; The indicator light circuit of designation data reception and transmission comprises a LED light-emitting diode and resistance string back circuit composition also earlier, two LED LEDs 1, LED2 are connected in parallel on pci interface+3.3V supply voltage output respectively, the resistance R 1 of connecting with LED 1 is connected on the pin 42 of IP100A main control chip, and the resistance R 2 of connecting with LED 2 is connected on the pin 37 of IP100A main control chip; Crystal oscillating circuit is connected on the pin 31 and pin 32 of IP100A main control chip.
3, according to the light network interface card of the described all optical network 650nm of claim 1 information system, it is characterized in that the IP100A main control chip is a monolithic, full duplex, 10M/100M self adaptation ether MAC+PHY, meet the IEEE802.3 agreement, adapt to 100BASE-TX/100BASE-FX/10BASE-T, and having 32 pci interfaces, this chip has 128 pin PQFP encapsulation.
4, according to the light network interface card of the described all optical network 650nm of claim 1 information system, it is characterized in that voltage conversion circuit comprise+5V voltage source commentaries on classics+3.3V voltage supply circuit and+3.3V voltage source commentaries on classics+2.5V voltage supply circuit.
5, according to the light network interface card of the described all optical network 650nm of claim 1 information system, it is characterized in that+5V voltage output end and+the 3.3V voltage output end is provided with filtering analog power circuit and digital power circuit respectively.
6, according to the light network interface card of the described all optical network 650nm of claim 1 information system, it is characterized in that crystal oscillating circuit input XTAL1 is connected on the pin 32 of IP100A main control chip, output XTAL2 is connected on the pin 31 of IP100A main control chip.
CNU2004200545876U 2004-12-21 2004-12-21 Optical network card for optical network 650nm information system Expired - Fee Related CN2785272Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU2004200545876U CN2785272Y (en) 2004-12-21 2004-12-21 Optical network card for optical network 650nm information system

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Application Number Priority Date Filing Date Title
CNU2004200545876U CN2785272Y (en) 2004-12-21 2004-12-21 Optical network card for optical network 650nm information system

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101959291A (en) * 2009-07-16 2011-01-26 北京中电华大电子设计有限责任公司 Clock management method for wireless local area network (WLAN) card chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101959291A (en) * 2009-07-16 2011-01-26 北京中电华大电子设计有限责任公司 Clock management method for wireless local area network (WLAN) card chip
CN101959291B (en) * 2009-07-16 2012-10-03 北京中电华大电子设计有限责任公司 Clock management method for wireless local area network (WLAN) card chip

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Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: XI AN FEIXUN OPTO-ELECTRICAL CO., LTD.

Free format text: FORMER OWNER: HUASHAN PHOTOELECTRIC CO., LTD., JIANGSU

Effective date: 20070406

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20070406

Address after: 710119, No. 17, information Avenue, new industrial park, hi tech Zone, Shaanxi, Xi'an

Patentee after: Xi'an Feixun Photoelectronics Co., Ltd.

Address before: 225009 No. 188, Weiyang Road, Yangzhou, Jiangsu

Patentee before: Huashan Photoelectric Co., Ltd., Jiangsu

C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20060531

Termination date: 20111221