CN2812115Y - On-line upgrading circuit for master equipment - Google Patents
On-line upgrading circuit for master equipment Download PDFInfo
- Publication number
- CN2812115Y CN2812115Y CN 200520115020 CN200520115020U CN2812115Y CN 2812115 Y CN2812115 Y CN 2812115Y CN 200520115020 CN200520115020 CN 200520115020 CN 200520115020 U CN200520115020 U CN 200520115020U CN 2812115 Y CN2812115 Y CN 2812115Y
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- CN
- China
- Prior art keywords
- main equipment
- slave unit
- upgrading
- eeprom
- online upgrading
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Abstract
The utility model discloses a kind of main equipment online upgrading circuit, comprising: first main equipment and corresponding slave unit thereof, described first main equipment reading of data from described slave unit is upgraded; Also comprise: second main equipment and switch switching unit.The utility model utilizes electronic switch switching slave unit to be connected with the main equipment that needs upgrading with the main equipment that CPU carries respectively, when needs are upgraded, the main equipment that slave unit and CPU are carried is connected, the main equipment that uses CPU to carry carries out online upgrading to the slave unit internal data, controlling electronic switch then makes slave unit be connected with the main equipment that needs upgrading, and the main equipment that resets and to upgrade, make the slave unit internal data behind the automatic loading upgrading of main equipment that needs upgrading, thereby needing to realize the configuration upgrading of the main equipment internal register of upgrading.
Description
Technical field
The utility model relates to a kind of main equipment upgrading circuit, particularly a kind of main equipment online upgrading circuit.
Background technology
At present, the communications field realizes that the method for various device data upgrading has many kinds, and most widely used being to use has I at present
2The equipment of C protocol bus.Has I
2The equipment of C (Inter-IC Bus or IC To Bus) interface comprises I
2C main equipment and I
2The C slave unit, wherein, I
2The C slave unit is mainly EEPROM (Electrically Erasable Programmable Read-Only Memory, electricity is wiped the formula programmable read only memory off).In existing circuit, used the I of many plug-in EEPROM
2The C main equipment, these I
2The data that the C main equipment uses EEPROM to pre-set come internal register is configured, and work as I
2After the C main equipment resets, initiate I
2The C read operation is read into I with the data of EEPROM slave unit inside
2In the register of C main equipment, realize I
2The upgrading of C main equipment.
The data of storing in the above-mentioned EEPROM slave unit generally are to use chip burner good the data burning that pre-sets earlier, or adopt special ICT fixture to carry out burning, use chip mounter that the EEPROM slave unit is welded on the circuit board then, are I
2The C main equipment provides configuration information.Because the data in the EEPROM slave unit are prerecorded, and after the EEPROM slave unit installs on the circuit board, can not change data, therefore, can't realize online upgrading.If carry out data upgradings, must record the EEPROM slave unit once more down from the circuit board weldering, or adopt data after special ICT records upgrading, refill and be fitted on the circuit board, could realize I
2The upgrading of C main equipment.
In the process that other method of use is upgraded to main equipment, also there is analogue, have only the slave unit of storage data is taken off from circuit board, carry out data recording again, and put in back on the circuit board, upgrading could be realized, and the online upgrading of main equipment can not be realized main equipment.
The utility model content
Problem to be solved in the utility model is to provide a kind of main equipment online upgrading circuit, can not be to the defective of main equipment online upgrading to overcome prior art.
The utility model discloses a kind of main equipment online upgrading circuit, comprising: first main equipment and corresponding slave unit thereof, described first main equipment reading of data from described slave unit is upgraded;
Also comprise: second main equipment and switch switching unit, described switch switching unit links to each other with described slave unit, described first main equipment and described second main equipment respectively, this switch switching unit is used to control described slave unit and the described second main equipment conducting, and opens circuit with described first main equipment; Or control described slave unit and the described first main equipment conducting, and open circuit with described second main equipment.
Described first main equipment and second main equipment are I
2C main equipment, described slave unit are the EEPROM slave unit, and described first main equipment and described EEPROM slave unit, described second main equipment and described EEPROM slave unit pass through I
2The C protocol communication.
A described I
2The C main equipment is for needing the I of upgrading
2The C main equipment; Described the 2nd I
2The C main equipment is the I that CPU carries
2The C main equipment.
Described first main equipment is communicated by letter by serial peripheral interface SPI with described slave unit with described slave unit, described second main equipment.
Described first main equipment and described slave unit, described second main equipment and described slave unit are by the USB (universal serial bus) usb communication.
CPU controls the conducting of described switch switching unit or ends.
Described switch switching unit is analog switch or digital switch.
Described analog switch comprises: relay, switching selector spare or transistor switching circuit.
Described digital switch is a digital logic device.
For the I that internal pull-up resistor is not set
2C interface clock control line links to each other with power supply by pull-up resistor respectively with serial data line.
Compared with prior art, the utlity model has following advantage:
The utility model utilizes electronic switch switching slave unit to be connected with the main equipment that needs upgrading with the main equipment that CPU carries respectively, when needs are upgraded, the main equipment that slave unit and CPU are carried is connected, the main equipment that uses CPU to carry carries out online upgrading to the slave unit internal data, controlling electronic switch then makes slave unit be connected with the main equipment that needs upgrading, and the main equipment that resets and to upgrade, make the slave unit internal data behind the automatic loading upgrading of main equipment that needs upgrading, thereby needing to realize the configuration upgrading of the main equipment internal register of upgrading.
Description of drawings
Fig. 1 is the circuit diagram of a specific embodiment of the utility model;
Fig. 2 is the circuit diagram of another specific embodiment of the utility model.
Embodiment
Below we will be in conjunction with the accompanying drawings, preferred embodiment of the utility model is described in detail.At first it is to be noted, the implication of the term of using in the utility model, words and claim can not only only limit to its literal and common implication and go to understand, the implication and the notion that also comprise and then conform to technology of the present utility model, this is because we are as the deviser, to suitably provide the definition of term, so that our utility model is carried out the most appropriate description.Therefore, the configuration that provides in this explanation and the accompanying drawing is first-selected embodiment of the present utility model, rather than will enumerates all technical characteristics of the present utility model.We will recognize to also have the various equivalent scheme or the modifications that can replace our scheme.
Ultimate principle of the present utility model is: by between the slave unit of storage upgrade data and the main equipment of need upgrading, main equipment that CPU carries switch switching unit being set, when needs are upgraded, the at first main equipment conducting that slave unit and CPU is carried by CPU gauge tap switch unit, and open circuit with the main equipment of needs upgrading, CPU is upgraded to the slave unit data; Then, the main equipment that the gauge tap switch unit carries slave unit and CPU opens circuit, and with the main equipment conducting of needs upgradings, CPU sends repositioning information to the main equipment of needs upgrading simultaneously, the main equipment that needs are upgraded reads the data in the slave unit, realizes online upgrading.
Below with I
2C main equipment online upgrading circuit describes as a specific embodiment of the present utility model.As shown in Figure 1, this circuit comprises the I of EEPROM slave unit 101, switch switching unit 102, needs upgrading
2The I that C main equipment 103, CPU carry
2C main equipment 104 and CPU105, wherein, the described I that needs upgrading
2C main equipment 103 is an I
2The C main equipment, the I that described CPU carries
2The C main equipment is the 2nd I
2The C main equipment.Described switch switching unit 102 respectively with described EEPROM slave unit 101, the described I that needs upgrading
2The I that C main equipment 103 and described CPU carry
2C main equipment 104 links to each other, as the I of needs upgrading
2When C main equipment 103 was prepared online upgradings, the program by CPU transmitted control signal the I that described EEPROM slave unit 101 and described CPU are carried to switch switching unit 102
2104 conductings of C main equipment, and with the described I that needs upgrading
2C main equipment 103 opens circuit, at this moment, and the I that carries by CPU
2Data in the C main equipment 104 upgrading EEPROM slave units 101; After the data in the EEPROM slave unit 101 of having upgraded, the program of CPU transmits control signal to switch switching unit 102, makes described EEPROM slave unit 101 and the described I that needs upgrading
2103 conductings of C main equipment, and the I that carries with described CPU
2C main equipment 104 opens circuit, and at this moment, CPU105 is to the I of needs upgrading
2The C main equipment sends repositioning information, this I
2The C main equipment loads up-to-date data from EEPROM slave unit 101 automatically, realizes upgrading.
An embodiment of the present utility model as shown in Figure 2, the EEPROM slave unit adopts the AT24C64 of Atmel company, memory capacity is 64kbit; Switch switching unit adopts the MM74HC4316 of FSC company, and this device is the analog switch that 4 road signals are selected; The I that needs upgrading
2The C main equipment is the switching network adapter chip FX910 of Marvell company.Here it may be noted that the switch switching unit in the present embodiment only adopts a kind of analog switch device, but in the practical application, analog switches such as relay, switching selector spare, transistor switching circuit, or digital switch such as digital logic device can be suitable for equally.
The A0 of AT24C64, A1, A2 are the address setting pins, are connected to power supply VCC, are connected to earth potential by resistance R 6, R5, R4 respectively by resistance R 3, R2, R1 respectively.Wherein, R3, R2, three resistance of R1 are 4.7K ohm, and resistance R 6, three resistance of R5, R4 are 200 ohm, also can change the resistance of other resistance as required.By dismounting or adjust resistance and can obtain different addresses, for example, resistance R 1, R3, R5 are changed to 0 ohm resistance, then the address is 101.EEPROM_SCL is the I of EEPROM slave unit
2C clock control line, EEPROM_SDA are the I of EEPROM slave unit
2The C serial data line.At I
2In the C bus specification, bus protocol has strict sequential requirement, during bus work, by the pulse of clock control line EEPROM_SCL transmission clock, transmits data by serial data line EEPROM_SDA.Every frame data that bus transmits are a byte, when starting I
2After the C bus, the byte number of transmission without limits, only require byte of every transmission after, the other side responds a response bits message.At first send the most significant digit of data when sending data.High 7 that start first byte after the bus be addressing address from device, and the 8th is the direction position, and wherein, 0 represents that main equipment carries out write operation to slave unit; 1 expression main equipment carries out read operation to slave unit; Remaining byte is the data of operation.Bus has start signal when transmitting beginning at every turn, and stop signal is arranged during end.After bus has transmitted one or several byte, can make the level step-down of EEPROM_SCL line, suspend thereby make to transmit.In addition, can produce I according to the EEPROM_SCL of bus and the work schedule of EEPROM_SDA
2The start signal of C, stop signal, answer signal.Clock control line EEPROM_SCL was between high period at that time, and serial data line EEPROM_SDA occurs by high level when the low level variation, I
2The C bus starting prepares to begin to transmit data; Clock control line EEPROM_SCL was between high period at that time, and serial data line EEPROM_SDA occurs by low level when the variation of high level, I
2The C bus stops data transmission; Work as I
2The EEPROM_SDA of the 9th pulse correspondence of C bus goes up and shows that low level then is bus acknowledge, shows that high level then is that bus is non-and replys; At I
2The 8 bit data transmission of the corresponding byte of 1-8 time clock after C bus start signal or the answer signal is between high period in time clock, the data serial transmission; Between the time clock low period, data are prepared, and allow data level variation on the bus.
In order to make I
2C main equipment and slave unit operate as normal reduce and disturb, at the I of EEPROM slave unit
2C interface is provided with pull-up resistor, is about to EEPROM_SCL and EEPROM_SDA and is connected to power supply VCC by resistance R 7 and R8 respectively, and the resistance of R7 and R8 is respectively 4.7K ohm.The WP pin of EEPROM slave unit is connected to ground by resistance R 9.
MM74HC4316 /the EN signal is a global enable signal, is set to low level in the present embodiment, the overall situation enables to open.CTL1, CTL2, CTL3, CTL4 pin control signal are controlled the switch of I/O1-O/I1, I/O2-O/I2, these 4 groups of pin data-signals of I/O3-O/I3, I/O4-O/I4 respectively.When certain CTL is high level, one group of corresponding signal communication; When certain CTL is low level, one group of corresponding Signal Spacing.FX910_I
2C_CS is gating FX910 I
2The selection signal of C interface, CPU_I
2C_CS is gating CPUI
2The selection signal of C interface, these two signals are by the programmed control of CPU.CPU_I
2C_SCL is the I of CPU
2The output of C clock, CPU_I
2C_SDA is the I of CPU
2C bi-directional data signal.
When EEPROM slave unit content needs online upgrading, FX910_I is set by the CPU program
2C_CS=0, CPU_I
2C_CS=1, the I of CPU like this
2C interface just and the I of EEPROM slave unit
2C interface is communicated with, the I of FX910
2The I of C interface and EEPROM slave unit
2C interface is isolated, the I that CPU is carried
2The C main equipment is communicated by letter with the EEPROM slave unit; Use the CPU program to pass through I then
2The content of C interface upgrading EEPROM slave unit.When the updating content of EEPROM slave unit finishes, FX910_I is set by the CPU program
2C_CS=1, CPU_I
2C_CS=0, the I of CPU
2The I of C interface and EEPROM slave unit
2C interface is isolated, the I of FX910
2The I of C interface and EEPROM slave unit
2C interface is communicated with, and uses CPU Program reset FX910 then, and FX910 will load up-to-date configuration data from the EEPROM slave unit automatically.
Though the utility model is with I
2C main equipment and I
2The C slave unit is that example describes, but is not limited to this, and when the main equipment of needs upgradings is communicated by letter with serial peripheral interface SPI with the slave unit of storing data, or during with the general-purpose serial bus USB interface communication, the utility model principle is suitable equally.
More than disclosed only be specific embodiment of the utility model, still, the utility model is not limited to said chip and circuit, any those skilled in the art can think variation all should fall into protection domain of the present utility model.
Claims (10)
1, a kind of main equipment online upgrading circuit comprises: first main equipment and corresponding slave unit thereof, and described first main equipment reading of data from described slave unit is upgraded;
It is characterized in that, also comprise: second main equipment and switch switching unit, described switch switching unit links to each other with described slave unit, described first main equipment and described second main equipment respectively, this switch switching unit is used to control described slave unit and the described second main equipment conducting, and opens circuit with described first main equipment; Or control described slave unit and the described first main equipment conducting, and open circuit with described second main equipment.
2, main equipment online upgrading circuit according to claim 1 is characterized in that described first main equipment and second main equipment are I
2C main equipment, described slave unit are the EEPROM slave unit, and described first main equipment and described EEPROM slave unit, described second main equipment and described EEPROM slave unit pass through I
2The C protocol communication.
3, as main equipment online upgrading circuit as described in the claim 2, it is characterized in that a described I
2The C main equipment is for needing the I of upgrading
2The C main equipment; Described the 2nd I
2The C main equipment is the I that CPU carries
2The C main equipment.
4, main equipment online upgrading circuit according to claim 1 is characterized in that described first main equipment is communicated by letter by serial peripheral interface SPI with described slave unit with described slave unit, described second main equipment.
5, main equipment online upgrading circuit according to claim 1 is characterized in that, described first main equipment and described slave unit, described second main equipment and described slave unit are by the USB (universal serial bus) usb communication.
6, main equipment online upgrading circuit according to claim 1 is characterized in that CPU controls the conducting of described switch switching unit or ends.
7, main equipment online upgrading circuit according to claim 1 is characterized in that described switch switching unit is analog switch or digital switch.
8, as main equipment online upgrading circuit as described in the claim 7, it is characterized in that described analog switch comprises: relay, switching selector spare or transistor switching circuit.
9, as main equipment online upgrading circuit as described in the claim 7, it is characterized in that described digital switch is a digital logic device.
10, as main equipment online upgrading circuit as described in the claim 3, it is characterized in that, for the I that internal pull-up resistor is not set
2C interface clock control line links to each other with power supply by pull-up resistor respectively with serial data line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520115020 CN2812115Y (en) | 2005-07-29 | 2005-07-29 | On-line upgrading circuit for master equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520115020 CN2812115Y (en) | 2005-07-29 | 2005-07-29 | On-line upgrading circuit for master equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2812115Y true CN2812115Y (en) | 2006-08-30 |
Family
ID=36938507
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200520115020 Expired - Lifetime CN2812115Y (en) | 2005-07-29 | 2005-07-29 | On-line upgrading circuit for master equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2812115Y (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102307113B (en) * | 2007-12-28 | 2014-04-02 | 华为技术有限公司 | System upgrading method, system and device |
| CN104834620A (en) * | 2015-04-29 | 2015-08-12 | 小鸟科技有限公司 | SPI (serial peripheral interface) bus circuit, realization method and electronic equipment |
| CN104834619A (en) * | 2015-04-29 | 2015-08-12 | 小鸟科技有限公司 | I2C (Inter-Integrated Circuit) bus circuit, implementation method and electronic equipment |
| WO2017143537A1 (en) * | 2016-02-24 | 2017-08-31 | 华为技术有限公司 | Optical line terminal, and method for upgrading master device and slave device |
| CN112286561A (en) * | 2020-10-22 | 2021-01-29 | 广州华欣电子科技有限公司 | Firmware upgrading method and device for touch equipment |
-
2005
- 2005-07-29 CN CN 200520115020 patent/CN2812115Y/en not_active Expired - Lifetime
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102307113B (en) * | 2007-12-28 | 2014-04-02 | 华为技术有限公司 | System upgrading method, system and device |
| CN104834620A (en) * | 2015-04-29 | 2015-08-12 | 小鸟科技有限公司 | SPI (serial peripheral interface) bus circuit, realization method and electronic equipment |
| CN104834619A (en) * | 2015-04-29 | 2015-08-12 | 小鸟科技有限公司 | I2C (Inter-Integrated Circuit) bus circuit, implementation method and electronic equipment |
| CN104834620B (en) * | 2015-04-29 | 2018-07-31 | 北京小鸟看看科技有限公司 | Serial peripheral equipment interface SPI bus circuit, implementation method and electronic equipment |
| CN104834619B (en) * | 2015-04-29 | 2018-12-18 | 北京小鸟看看科技有限公司 | A kind of I2C bus circuit, implementation method and electronic equipment |
| WO2017143537A1 (en) * | 2016-02-24 | 2017-08-31 | 华为技术有限公司 | Optical line terminal, and method for upgrading master device and slave device |
| US10929150B2 (en) | 2016-02-24 | 2021-02-23 | Huawei Technologies Co., Ltd. | Optical line terminal and method for upgrading primary device and secondary device of optical line terminal |
| CN112286561A (en) * | 2020-10-22 | 2021-01-29 | 广州华欣电子科技有限公司 | Firmware upgrading method and device for touch equipment |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee |
Owner name: HANGZHOU HUASAN COMMUNICATION TECHNOLOGY CO., LTD. Free format text: FORMER NAME OR ADDRESS: HANGZHOU HUAWEI 3COM TECHNOLOGY CO., LTD. |
|
| CP03 | Change of name, title or address |
Address after: 310053, Hangzhou hi tech Industrial Development Zone, Zhejiang hi tech Industrial Park, No. six and No. 310 HUAWEI Hangzhou production base Patentee after: Huasan Communication Technology Co., Ltd. Address before: 310053, Jiang hi tech Industrial Development Zone, Zhejiang, Hangzhou hi tech Industrial Park six and Lu Donghua as the 3Com headquarters Patentee before: Huawei Sankang Technology Co., Ltd., Hangzhou |
|
| CX01 | Expiry of patent term |
Expiration termination date: 20150729 Granted publication date: 20060830 |
|
| EXPY | Termination of patent right or utility model |