CN2512114Y - Duplicated piled reversing welding-ball matrix package body - Google Patents
Duplicated piled reversing welding-ball matrix package body Download PDFInfo
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- CN2512114Y CN2512114Y CN01266864U CN01266864U CN2512114Y CN 2512114 Y CN2512114 Y CN 2512114Y CN 01266864 U CN01266864 U CN 01266864U CN 01266864 U CN01266864 U CN 01266864U CN 2512114 Y CN2512114 Y CN 2512114Y
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/15321—Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
- H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
Abstract
A duplicated piled reversing welding-ball matrix package body comprises: a substrate which is provided with no chip fixing cavity and comprises a first surface and a second surface; a plurality of convex-lock welding pads which are arranged on the first surface and distributed in at least one preconcerted region; a plurality of first tin-ball welding pads which are arranged on the first surface and distributed outside the preconcerted region; a plurality of second tin-ball welding pads which are arranged on the second surface; a plurality of circuit pathways which are arranged inside the substrate and electrically connected with the convex-lock welding pads as well as the first and the second tin-ball welding pads; and at least one IC chip which is arranged on the preconcerted region of the substrate, wherein, the underside of the IC chip is provided with a plurality of joint pads which are corresponding to the convex-lock welding pads; solder convex blocks or conducting polymer convex blocks are arranged between the joint pads and corresponding convex-lock welding pads for fixing the IC chip, wherein, the first tin-ball welding pads of one package body is corresponding to the second tin-ball welding pads of the other package body, and tin soldering balls are formed between the first tin-ball welding pads and the corresponding second tin-ball welding pads, so as to pile package bodies repeatedly.
Description
Technical field
The utility model relate to a kind of flip-chip (flip-chip) welded ball array (ball grid array, BGA) packaging body (package), but particularly relate to the flip-chip welded ball array packaging body of a kind of repeatedly stacking (stackable).
Background technology
Along with the development of portable electronic equipment, various light, thin, short and small packaging bodies constantly are developed, and the upside-down mounting chip BGA encapsulation body is exactly an example wherein.In the upside-down mounting chip BGA encapsulation body, chip (die) no longer is that joint sheet (bonding pad) is connected on the base plate for packaging via beating gold thread (wire bonding), but invertedly be connected on the base plate for packaging by solder projection (solder bump) or conducting polymer projection (conductivepolymer bump), so the upside-down mounting chip BGA encapsulation body can improve current densities and reduce the ghost effect (parasitic effect) of circuit.However, for more speed and more highdensity package requirements, present upside-down mounting chip BGA encapsulation body is still felt to feel inadequate, and therefore is necessary to develop the higher upside-down mounting chip BGA encapsulation body of packaging density.
Please refer to Fig. 1, Fig. 1 is the generalized section of existing flip-chip welded ball array packaging body 10.Shown in Figure 1, it is existing two-layer (two-layer) plate upside-down mounting chip BGA encapsulation body 10, and it mainly includes a base plate for packaging (substrate) 12 and an IC chip (die) 14 is fixed on the surface of base plate for packaging 12.Base plate for packaging 12 includes two copper conductor layers (Cu trace layer) 16,18, is located at the both sides up and down of base plate for packaging 12 respectively, and a plurality of circuit pathways (via) 20 is used for connecting copper conductor layer 16 and copper conductor layer 18.
Upside-down mounting chip BGA encapsulation body 10 includes convex pads (solder bump pad) 22 in addition, a plurality of tin ball pad (solder ball pad) 24 is located at the surface of copper conductor layer 16,18 respectively, and two green enamelled coatings (solder mask) 26,28 cover copper conductor layer 16,18 surfaces outside convex pads 22, the tin ball pad 24 respectively.Convex pads 22, tin ball pad 24 all are to be produced on the surface of copper conductor layer 16,18, and utilize green enamelled coating 26,28 as insulating barrier.
IC chip 14 surfaces are provided with a plurality of joint sheets (bonding pad) 30, and the position of joint sheet 30 is then corresponding to the position of the convex pads 22 of base plate for packaging 12.Upside-down mounting chip BGA encapsulation body 10 is provided with a plurality of solder projections (solderbump) 32 between the convex pads 22 of the joint sheet 30 of IC chip 14 and base plate for packaging 12, be used for fixing and be electrically connected IC chip 14.Space between base plate for packaging 12 and the IC chip 14 can optionally be injected a bottom sealant (epoxy underfill layer) 34 and be filled up, and exempts to be influenced by the adverse circumstances with protection packaging body 10, eliminates the stress of solder projection 32 junctions simultaneously.
After upside-down mounting chip BGA encapsulation body 10 is finished, utilize a plurality of soldering balls 36 that upside-down mounting chip BGA encapsulation body 10 is fixed on a printed circuit board (PCB) (print circuit board again, PCB) on 38, upside-down mounting chip BGA encapsulation body 10 and printed circuit board (PCB) 38 are electrically connected.
As shown in Figure 1, the electric current that IC chip 14 is exported is sent on the convex pads 22 of base plate for packaging 12 via solder projection 32, route via copper conductor layer 16-circuit pathways 20-copper conductor layer 18 is sent on the tin ball pad 24 again, and the electric current that last IC chip 14 is exported is sent on the printed circuit board (PCB) 38 via soldering ball 36.Same, printed circuit board (PCB) 38 also can be imported electric current within the IC chip 14 with opposite direction via same route.
Present employed upside-down mounting chip BGA encapsulation body 10 can not repeatedly stacking above other packaging bodies, make the upside-down mounting chip BGA encapsulation body 10 that individual layer can only be set on the printed circuit board (PCB) 38.When printed circuit board (PCB) 38 was provided with the upside-down mounting chip BGA encapsulation body 10 of many difference in functionalitys, each upside-down mounting chip BGA encapsulation body 10 all needed to take the area of printed circuit board (PCB) 38, made the packaging density of distributing board level (board level) further to improve.And in high speed circuit (high-speed circuitry), if multiple upside-down mounting chip BGA encapsulation body 10 is dispersed on the printed circuit board (PCB) 38, the synchronism of high-frequency signal (synchronization) can be subjected to the influence that electron circuit layout (layout) distributes, and can't obtain the signal of sequential unanimity.
But patent is invented and obtained to the encapsulating structure of at present existing some repeatedly stackings.For example: propose a kind of miniature stackable BGA packaging body (micro-BGAstacking scheme) in United States Patent (USP) case number 5,598,033 a case, but its structure is to adopt the mode of beating gold thread (wire bonding) to fix the IC chip.And another kind of stackable bga structure is then proposed in United States Patent (USP) case number 5,594,275 a cases, the same technology of beating gold thread that adopts fixes the IC chip, and is applied among SOJ (small out-line-J-lead) encapsulation field.
The utility model content
But the purpose of this utility model is to provide a kind of flip-chip welded ball array packaging body of repeatedly stacking, with the packaging density of further raising distributing board level, and improves the synchronism of this packaging body high-frequency signal.
Promptly provide a kind of flip-chip of repeatedly stacking welded ball array packaging body but the purpose of this utility model is achieved in that, include: one is not provided with the substrate of a chip lock chamber, and it includes a first surface and a second surface; A plurality of convex pads are located on the first surface of described substrate, and are distributed within least one presumptive area; A plurality of first tin ball pad are located on the first surface of described substrate, and are distributed in outside the described presumptive area; A plurality of second tin ball pad are located on the second surface of described substrate; A plurality of circuit pathways (via) are located at described substrate inside, to be electrically connected described a plurality of convex pads, described a plurality of first tin ball pad and described a plurality of second tin ball pad; And at least one IC chip (die), be located on the presumptive area of described substrate, described IC chip downside then is provided with a plurality of joint sheets, the position of described a plurality of joint sheets is corresponding with the position of described a plurality of convex pads, and be provided with a plurality of solder projections or conducting polymer projection between described a plurality of joint sheet and the described corresponding convex pads, with fixing described IC chip; The position of a plurality of first tin ball pad of wherein said packaging body is corresponding to a plurality of second tin ball pad of another described packaging body, and between described a plurality of first tin ball pad and described corresponding a plurality of second tin ball pad, form a plurality of soldering balls, with the described packaging body of repeatedly stacking.
The advantage of the utility model device is, compare with existing upside-down mounting chip BGA encapsulation body, but its packaging body has the function of repeatedly stacking, can utilize printed circuit board area seldom, multilayer upside-down mounting chip BGA encapsulation body or other subsidiary components are installed, to improve the packaging density of distributing board level; Simultaneously on high speed circuit, the upside-down mounting chip BGA encapsulation body connects in the mode of mutual correspondence, so the synchronism of high-frequency signal is not vulnerable to the influence of electron circuit layout on the printed circuit board (PCB), and can improve the synchronism on the high-frequency signal sequential.
Description of drawings
Fig. 1 is the generalized section of existing flip-chip welded ball array packaging body;
Fig. 2 is the schematic diagram (is example with the two-ply) of the two-layer flip-chip welded ball array of the utility model packaging body;
Fig. 3 is the generalized section (is example with the two-ply) of the flip-chip welded ball array packaging body of Fig. 2;
Generalized section when Fig. 4 piles up mutually for upside-down mounting chip BGA encapsulation body of the present utility model;
Fig. 5 and Fig. 6 are respectively the bottom view (two kinds of different examples) of the upside-down mounting chip BGA encapsulation body of Fig. 4;
Fig. 7 is the generalized section of first embodiment of the utility model upside-down mounting chip BGA encapsulation body;
Fig. 8 is the bottom view of the upside-down mounting chip BGA encapsulation body of Fig. 7;
Generalized section when Fig. 9 to Figure 14 piles up with subsidiary component mutually for the utility model upside-down mounting chip BGA encapsulation body;
Figure 15 is the generalized section of second embodiment of the utility model upside-down mounting chip BGA encapsulation body;
Figure 16 is the schematic diagram that piles up of the 3rd embodiment of the utility model upside-down mounting chip BGA encapsulation body.
Embodiment
Please refer to Fig. 2 and Fig. 3, Fig. 2 is the schematic diagram of the utility model two-ply flip-chip welded ball array packaging body 40, and Fig. 3 is the generalized section of the flip-chip welded ball array packaging body 40 of Fig. 2.But the utility model is a kind of flip-chip welded ball array (ball grid array of repeatedly stacking, BGA) packaging body 40, flip-chip BGA substrate can be the structure of two-ply (two-layer) or multi-layer sheet (multi-layer), in this article so that the structure of a two-ply flip-chip BGA packaging body 40 to be described, but the utility model can be generalized on four laminates or other the multiple-plate flip-chip BGA substrate package bodies equally.
As Fig. 2 and shown in Figure 3, upside-down mounting chip BGA encapsulation body 40 mainly is made of a substrate 42 and an IC chip 44.Substrate 42 includes two copper conductor layers (Cu trace layer) 46,48 and is located at the both sides up and down of substrate 42 respectively, and a plurality of circuit pathways (via) 50 is used for connecting copper conductor layer 46 and copper conductor layer 48.IC chip 44 is fixed on the substrate 42 in the mode of flip-chip (flip-chip), so substrate 42 is not provided with a chip lock chamber (recessed die cavity).
Convex pads 56 all is the upside that is positioned at substrate 42 with tin ball pad 58,60 downsides that are positioned at substrate 42 of tin ball pad.In addition, convex pads 56 is distributed within the presumptive area 62, and tin ball pad 58 then is to be distributed in outside the presumptive area 62.Convex pads 56 forms one deck etch resistant layer (anti-tarnish layer) on exposed copper conductor layer 46 surfaces usually, for example plate one deck nickel/gold thin film on exposed copper conductor layer 46 surfaces, tin ball pad 58 and 60 also plates one deck nickel/gold thin film respectively through be everlasting exposed copper conductor layer 46 and 48 surfaces.The pattern of copper conductor layer 46,48 and the position of circuit pathways 50 can make convex pads 56 be electrically connected on tin ball pad 58 or the tin ball pad 60 through suitable design.
Generally speaking, the thickness of IC chip is between 125～300 μ m, and the downside of IC chip 44 is provided with a plurality of joint sheets (bonding pad) 64, and the position of joint sheet 64 is corresponding to the position of substrate 44 upper protruding block weld pads 56.IC chip 44 utilizes a plurality of solder projections (solder bump) or conducting polymer projection (conductive polymer bump) 66 to be secured on the presumptive area 62 of substrate 42, solder projection or conducting polymer projection 66 are located between the convex pads 56 of the joint sheet 64 of IC chip 44 and substrate 42, and IC chip 44 is electrically connected on the substrate 42.
Space distance (engaging afterwards) between substrate 42 and the IC chip 44 is between 30～80 μ m; this moment visual flip chip technology demand; carry out epoxy radicals sealing manufacture craft (epoxy underfillprocess); inject the space that a bottom sealant (underfill layer) 68 fills up between substrate 42 and the IC chip 44; exempt to be influenced by the adverse circumstances with protection upside-down mounting chip BGA encapsulation body 40, eliminate the stress of solder projection 66 junctions simultaneously.
Please refer to Fig. 4, the generalized section when Fig. 4 piles up mutually for the utility model upside-down mounting chip BGA encapsulation body.As shown in Figure 4, the position of the tin ball pad 58a of upside-down mounting chip BGA encapsulation body 40a upside is corresponding to the tin ball pad 60b of another upside-down mounting chip BGA encapsulation body 40b downside.When on upside-down mounting chip BGA encapsulation body 40a, piling up upside-down mounting chip BGA encapsulation body 40b, make upside-down mounting chip BGA encapsulation body 40b (on tin ball pad 60b, planting soldering ball 68) aim at the upside-down mounting chip BGA encapsulation body 40a of below earlier, then carry out reflow (solder re-flow), with fixing and electrical connection upside-down mounting chip BGA encapsulation body 40b.Profit uses the same method, and upside-down mounting chip BGA encapsulation body 40 can repeatedly stacking, for example, can pile up another upside-down mounting chip BGA encapsulation body 40c again on upside-down mounting chip BGA encapsulation body 40b.
Please refer to Fig. 5 and Fig. 6, Fig. 5 and Fig. 6 are the bottom view of the upside-down mounting chip BGA encapsulation body 40a of Fig. 4.Generally speaking, the number and the arrangement mode of the convex pads 56 of upside-down mounting chip BGA encapsulation body 40 and tin ball pad 58,60 can change according to different circuit requirements.Tin ball pad 60a with the upside-down mounting chip BGA encapsulation body 40a of Fig. 4 bottom is an example, and the arrangement mode of the tin ball pad 60a that Fig. 5 shows is comparatively typical a kind of array, and the shown arrangement mode of Fig. 6 then is that the arrangement mode according to Fig. 5 is changed and forms.
Please refer to Fig. 7 and Fig. 8, Fig. 7 is the generalized section of first embodiment of the utility model upside-down mounting chip BGA encapsulation body 40, and Fig. 8 is the bottom view as the upside-down mounting chip BGA encapsulation body 40d of Fig. 7.As shown in Figure 7, upside-down mounting chip BGA encapsulation body 40d is fixed on the printed circuit board (PCB) (show, below), and upside-down mounting chip BGA encapsulation body 40d piles up upside-down mounting chip BGA encapsulation body 40b, 40c more in regular turn.In order to increase the radiating effect of upside-down mounting chip BGA encapsulation body 40d, middle body below substrate 42d can be provided with a plurality of tin ball pad 70 in addition, thus, the high temperature that produced of IC chip 44d can conduct on the printed circuit board (PCB) of below via tin ball pad 70 and the soldering that is connected ball 68.Fig. 8 shows the example of tin ball pad 70 at the relative position of substrate 42d bottom.
Please refer to Fig. 9 to Figure 14, the generalized section when Fig. 9 to Figure 14 piles up with subsidiary component mutually for the utility model upside-down mounting chip BGA encapsulation body.Outside upside-down mounting chip BGA encapsulation body 40 itself can pile up mutually, also can on tin ball pad 58 or tin ball pad 60, form soldering ball 68, to connect a subsidiary component (accessory component) or other electronic components, to satisfy the different demand of circuit designers.As shown in Figure 9, be stacked on the upside-down mounting chip BGA encapsulation body 40b surface of the top and can be used to pile up an impedance termination coalignment (impedance terminator) 72.Also can be as shown in figure 10, installing one impedance-matching device (inpedance matcher) 74 between upside-down mounting chip BGA encapsulation body 40a and 40c.To shown in Figure 10, impedance termination coalignment 72 and impedance-matching device 74 all can be manufactured into the external form of a BGA substrate as Fig. 9.
As shown in figure 11, on the upside-down mounting chip BGA encapsulation body 40b of the top, can pile up various welded ball array (BGA) packaging body or the IC circuit of specific function is arranged, show a kind of BGA packaging body 80 that varies in size among Figure 11.In addition, the BGA packaging body that is installed in the top can select not have the existing upside-down mounting chip BGA encapsulation body 10 that piles up function, or other existing beat gold thread (wirebond) BGA packaging body or the packaging body that adopts other welded ball array encapsulation technologies to make, and for example pile up a kind of BGA packaging body (not shown) that Open Side Down (cavity-down).
As shown in figure 12, upside-down mounting chip BGA encapsulation body 40b can connect a soft board device (flex-board) 82, to connect other circuit external.As shown in figure 13, upside-down mounting chip BGA encapsulation body 40b also can connect a heat abstractor (heat slug) 84, improves radiating effect.Heat abstractor 84 can be manufactured into the external form (not shown) of a BGA substrate, also is made into metal (copper) fin as Figure 13 or the external form (not shown) of other radiating wings.
As shown in figure 14, the tin ball pad 58b on the upside-down mounting chip BGA encapsulation body 40b can be used for connecting a checkout gear 86, conveniently to carry out circuit test.Checkout gear 86 includes a test probe head (tester head) 88, reaches a plurality of probes (pogo pins) 90 and is located at the test probe head 88 times, can contact with tin ball pad 58b to form to be electrically connected.
The above various subsidiary components of enumerating also can be applied on the upside-down mounting chip BGA encapsulation body via suitable combination to each other.For example the impedance termination coalignment 72 among Fig. 9 can be installed on the upside-down mounting chip BGA encapsulation body 40c of Figure 10, and the heat abstractor 84 of Figure 13 also can be installed on the impedance termination coalignment 72 of Fig. 9.In addition, other upside-down mounting chip BGA encapsulation body 40 and subsidiary components can further be piled up in upside-down mounting chip BGA encapsulation body 40a below among Fig. 9 to Figure 14, be installed to again at last on the printed circuit board (PCB) (not shown), for example a motherboard (mother board) or an auxiliary insert card (daughtercard).For simplicity of illustration, aforementioned upside-down mounting chip BGA encapsulation body 40a, 40b, 40c, the schematic diagram when 40d piles up are not drawn the internal structure of upside-down mounting chip BGA encapsulation body 40a, 40b, 40c, 40d.Be that its internal structure can be a two-ply, four laminates or other multiple-plate structures.
Please refer to Figure 15, Figure 15 is the generalized section of second embodiment of the utility model upside-down mounting chip BGA encapsulation body.Figure 15 shows that one or four laminate upside-down mounting chip BGA encapsulation bodies 92, its outward appearance is identical with two-layer upside-down mounting chip BGA encapsulation body 40, but includes at least one copper conductor layer 94 (being two-layer internal layer copper conductor layer 94 in Figure 15) in the substrate 42 in addition.The copper conductor layer 46 and 48 of substrate 42, internal layer copper conductor layer 94 and circuit pathways 50 are passed through suitable being connected, and can be electrically connected the convex pads 56 and tin ball pad 58,60 of substrate 42.Same, the application of two-ply upside-down mounting chip BGA encapsulation body 40 mentioned above also extends on the upside-down mounting chip BGA encapsulation body 92 or other multiple-plate upside-down mounting chip BGA encapsulation bodies of four laminates.
Please refer to Figure 16, Figure 16 is the schematic diagram that piles up of the 3rd embodiment of the utility model upside-down mounting chip BGA encapsulation body.As shown in figure 16, the upside-down mounting chip BGA encapsulation body 96 of the utility model the 3rd embodiment is made of a substrate 98 and an IC chip 100, and upside-down mounting chip BGA encapsulation body 96 is that with upside-down mounting chip BGA encapsulation body 40 differences chip 100 is fixed on the below of substrate 98.Upside-down mounting chip BGA encapsulation body 96 remaining structure or itself and other element ways of connecting can be according to the combinations that is applied of aforementioned upside-down mounting chip BGA encapsulation body 40.
The substrate 98 of BGA packaging body 96 is very close with substrate 42 both structures of BGA packaging body 40, the both is not provided with a chip lock chamber, and substrate is respectively equipped with two copper conductor layers 102,104 in both sides about in the of 98, and the inside of substrate 98 then is provided with a plurality of circuit pathways (not shown)s and is used for connecting copper conductor layer 102 and copper conductor layer 104.The inside of substrate 98 can be provided with at least one internal layer copper conductor layer (not shown) in addition, is used for being electrically connected circuit pathways, copper conductor layer 102 and copper conductor layer 104.
The surface of copper conductor layer 102,104 covers two green enamelled coatings 106,108 respectively.The green enamelled coating 106 of substrate 98 upsides is provided with a plurality of tin ball pad 110, and the green enamelled coating 108 of substrate 98 downsides then is provided with a plurality of tin ball pad 112 and a plurality of convex pads 114.Convex pads 114 is distributed in the presumptive area (not shown) under the substrate, and 112 of tin ball pad are distributed in outside this presumptive area.
The downside of IC chip 100 is provided with a plurality of joint sheet (not shown)s, and its position is corresponding with the position of substrate 98 upper protruding block weld pads 114.IC chip 100 utilizes a plurality of solder projections or conducting polymer projection 116 to be secured in the downside of substrate 98, and IC chip 100 is electrically connected on the substrate 98.Can fill a bottom sealant (not shown) between IC chip 100 and the substrate 98 in addition, to fill up the space between IC chip 100 and the substrate 98.
The position of the tin ball pad 110 of upside-down mounting chip BGA encapsulation body 96 upsides is corresponding to the tin ball pad 112 of another upside-down mounting chip BGA encapsulation body 96 downsides, and can between tin ball pad 110 and corresponding tin ball pad 112, form a plurality of soldering balls 118, with repeatedly stacking upside-down mounting chip BGA encapsulation body 96.Middle body at substrate 98 upsides can be provided with a plurality of tin ball pad (not shown)s in addition, and these tin ball pad are not connected with other packaging bodies or element, but is used for increasing the radiating effect of substrate 98.
In addition, the tin ball pad 110 of upside-down mounting chip BGA encapsulation body 96 upsides can connect an impedance termination coalignment, an impedance-matching device, a soft board device, a heat abstractor or other welded ball array packaging body (not shown)s via soldering ball 118.Tin ball pad 110 also can directly be electrically connected a checkout gear (not shown), and it includes an at least one probe or a test probe head, to contact with tin ball pad 110.The tin ball pad 112 of upside-down mounting chip BGA encapsulation body 96 downsides also can connect an impedance-matching device or a printed circuit board (PCB) (not shown) via soldering ball 118.Printed circuit board (PCB) can be a motherboard or an auxiliary insert card.
The characteristics of the utility model upside-down mounting chip BGA encapsulation body 40,92,96 are can repeatedly stacking, and can be combined with other subsidiary components.Therefore in high speed memory modules (high speed memorymodule), upside-down mounting chip BGA encapsulation body 40,92,96 provides a kind of encapsulating structure of high packaging density.Because upside-down mounting chip BGA encapsulation body 40,92,96 can significantly reduce area shared on printed circuit board (PCB), and shorten the distance of signal transmission.For system designer, upside-down mounting chip BGA encapsulation body 40,92,96 can be as a kind of hardware platform of high speed, and for the IC designer, 40,92,96 of upside-down mounting chip BGA encapsulation bodies can provide the allowance (timingconstraint margin) of preferable sequential restriction, and can widely apply at high speed storing chip (high speed memory chips) or high speed parallel microprocessor (parallel μ-processors).
Compare with existing upside-down mounting chip BGA encapsulation body 10, but upside-down mounting chip BGA encapsulation body 40,92,96 has the function of repeatedly stacking, can utilize printed circuit board area seldom, multilayer upside-down mounting chip BGA encapsulation body 40,92,96 or other subsidiary components are installed, to improve the packaging density (package density) of distributing board level (board level).Simultaneously on high speed circuit, upside-down mounting chip BGA encapsulation body 40,92,96 modes with mutual correspondence connect, therefore the synchronism (synchronization) of high-frequency signal is not vulnerable to the influence of electron circuit layout on the printed circuit board (PCB) (layout), and can improve the synchronism on the high-frequency signal sequential.
Claims (10)
1. but the flip-chip welded ball array packaging body of a repeatedly stacking is characterized in that, includes: one is not provided with the substrate of a chip lock chamber, and it includes a first surface and a second surface; A plurality of convex pads are located on the first surface of described substrate, and are distributed within least one presumptive area; A plurality of first tin ball pad are located on the first surface of described substrate, and are distributed in outside the described presumptive area; A plurality of second tin ball pad are located on the second surface of described substrate; A plurality of circuit pathways (via) are located at described substrate inside, to be electrically connected described a plurality of convex pads, described a plurality of first tin ball pad and described a plurality of second tin ball pad; And at least one IC chip (die), be located on the presumptive area of described substrate, described IC chip downside then is provided with a plurality of joint sheets, the position of described a plurality of joint sheets is corresponding with the position of described a plurality of convex pads, and be provided with a plurality of solder projections or conducting polymer projection between described a plurality of joint sheet and the described corresponding convex pads, with fixing described IC chip; The position of a plurality of first tin ball pad of wherein said packaging body is corresponding to a plurality of second tin ball pad of another described packaging body, and between described a plurality of first tin ball pad and described corresponding a plurality of second tin ball pad, form a plurality of soldering balls, with the described packaging body of repeatedly stacking.
2. packaging body as claimed in claim 1, it is characterized in that, described substrate comprises at least one internal layer copper conductor layer of being located at described substrate inside in addition, and described internal layer copper conductor layer is electrically connected described a plurality of first tin ball pad, described a plurality of second tin ball pad and described a plurality of convex pads with described a plurality of circuit pathways.
3. packaging body as claimed in claim 1 is characterized in that, is provided with a bottom sealant (underfill layer) between described IC chip and the described substrate in addition, and fills up the space between described IC chip and the described substrate.
4. packaging body as claimed in claim 1 is characterized in that, the middle body of the second surface of described substrate is provided with a plurality of the 3rd tin ball pad that are used for increasing described substrate radiating effect in addition.
5. packaging body as claimed in claim 1 is characterized in that, is provided with a plurality of soldering balls that are used for connecting one first subsidiary component in addition on described a plurality of first tin ball pad surfaces.
6. packaging body as claimed in claim 5 is characterized in that, described first subsidiary component is a soft board device (flex-board).
7. packaging body as claimed in claim 5 is characterized in that, described first subsidiary component is a heat abstractor (heat slug).
8. packaging body as claimed in claim 1 is characterized in that, is provided with a plurality of soldering balls that are used for connecting one second subsidiary component or a printed circuit board (PCB) in addition on described a plurality of second tin ball pad surfaces.
9. packaging body as claimed in claim 1 is characterized in that, described first surface is the surface of described substrate upside, and described second surface is the surface of described substrate downside.
10. packaging body as claimed in claim 1 is characterized in that, described first surface is the surface of described substrate downside, and described second surface is the surface of described substrate upside.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN01266864U CN2512114Y (en) | 2001-10-31 | 2001-10-31 | Duplicated piled reversing welding-ball matrix package body |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN01266864U CN2512114Y (en) | 2001-10-31 | 2001-10-31 | Duplicated piled reversing welding-ball matrix package body |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2512114Y true CN2512114Y (en) | 2002-09-18 |
Family
ID=33673413
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN01266864U Expired - Lifetime CN2512114Y (en) | 2001-10-31 | 2001-10-31 | Duplicated piled reversing welding-ball matrix package body |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2512114Y (en) |
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Expiration termination date: 20111031 Granted publication date: 20020918 |