CN2397702Y - 印刷电路线路装置 - Google Patents

印刷电路线路装置 Download PDF

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CN2397702Y
CN2397702Y CN99239492.9U CN99239492U CN2397702Y CN 2397702 Y CN2397702 Y CN 2397702Y CN 99239492 U CN99239492 U CN 99239492U CN 2397702 Y CN2397702 Y CN 2397702Y
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ground path
signal
circuits
signal line
substrate
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CN99239492.9U
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林有旭
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Foxconn Kunshan Computer Connector Co Ltd
Hon Hai Precision Industry Co Ltd
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Foxconn Kunshan Computer Connector Co Ltd
Hon Hai Precision Industry Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09236—Parallel layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09672—Superposed layout, i.e. in different planes

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

印刷电路线路装置在其底片上交替安置有若干信号和接地线路,同一侧面上的每两条信号线路彼此不相邻,且一侧面的信号线路与其相反另一侧面的接地线路相互对齐。基板一侧面的接地线路可用电力替换。即在基板一侧面的两相邻的电力端子间提供信号线路,在另一侧面相邻接地线路间提供信号线路。每一信号线路距相邻的电力端子或接地线路比相邻的信号线路更近。每一电力端子与接地线路的宽度均大于每对信号线路外端间的距离。

Description

印刷电路线路装置
本实用新型涉及一种印刷电路线路装置，尤指一种借消除两相邻线路间的串音而可确保适当信号传输的印刷电路线路装置。
印刷电路板是电脑中的基本元件，用来组装电子组件，并通过其上的信号线路提供元件间信号传输。由于要有效利用空间，因而柔性电路板也相当流行。由于电脑产业持续朝小型化趋势方向发展，就要相应地提高印刷电路板的信号线路的密度。如此的接近将导致相邻信号线路间不利于信号传输的串音干扰。
请参阅图5，在现有印刷电路板线路装置中，基板30的底侧面设置有接地板25，在其顶面形成有若干个信号线路10。由于邻近基板一侧面的信号线路10彼此相邻很近，且彼此之间存在相互串音干扰，从而不可避免地导致信号传输较差。另外，由于仅有的可变设计参数为信号线路10的深度和宽度，因而信号线路10和接地片25有效阻抗的控制变得很复杂。提高信号线路10的宽度将导致增加两者间的串音，以及增加信号线路10的高度就会增加信号线路10占用电路板的空间。
请参阅图6，在现有用于高速信号传输中的四层印刷电路装置中，一对内部接地板25、45用于导引接地及电力信号，相应地，于二者外表面间提供有基板30。信号线路10设在接近基板30的外表面。通过这样的装置可使相邻的信号线路10之间的串音干扰相应地减小，可是制造成本相当高。并且，由于电力及接地板25、45没有可变参数，电力及接地板间控制有效的电感变得较复杂。
本实用新型的目的在于提供一种设有高密度信号线路的印刷电路板线路装置，可有效消除两相邻的信号线路间的串音干扰。
本实用新型的再一目的在于提供一种设有可变量的印刷电路线路装置，以于不同型电路线路间控制其有效电阻及电感。
本实用新型的技术方案在于：印刷电路线路装置包括交替地组装在基板至少一侧面的若干信号线路和接地线路，从而使每两条信号线路均不相邻，并使一侧面的信号线路与相反侧面的接地线路相对齐。并且，基板一侧面的接地线路可由电力端子替代以用于高速信号传输应用。
本实用新型基板一侧面相邻电力端子间及基板另一侧面的相邻接地线路间提供一对信号线路。每一信号线路距相邻的电力端子或接地线路比相邻的信号线路更近。每一电力端子及接地线路的宽度均大于每一对信号线路外端间的距离。
本实用新型的优点在于：可有效消除两相邻的信号线路间的串音干扰及可降低成本。
下面结合附图及较佳实施例对本实用新型作进一步说明。
图1是本实用新型第一实施例印刷电路板的剖面图。
图2是图1变化后的视图。
图3是本实用新型第二实施例印刷电路板的剖视图。
图4是本实用新型第三实施例印刷电路板的剖视图。
图5是现有印刷电路板的剖视图。
图6是另一现有印刷电路板的剖视图。
请参阅图1，印刷电路板在基板30的两侧面包括若干个信号线路10及接地线路20，且线路10，20相间隔地设置，从而使任何两信号线路彼此均不相邻，并使一侧面的信号线路10与相反侧面的接地线路20相互对齐。此种装置可允许信号线路10具有高密度并有效消除其间的串音干扰。另外，如图2所示，接地线路20的宽度可增加以控制信号及接地线路10，20的有效电阻。
请参阅图3，是本实用新型的第二实施例，其装置除了基板30一侧面的接地线路20被替代为电力端子40以适应电路板高速信号传输外，其它结构与图1所示的装置相同。电力端子40的宽度可增加以允许增加电流。接地线路20的宽度也可变化以降低电力及接地间的有效电感。对于高频应用，电力和接地具有相同的作用，因此信号线路10间的串音干扰仍就可有效的消除。
请参阅图4，为本实用新型的第三实施例。在基板30一侧面的相邻的电力端子40间及在基板30相反的另一侧面相邻的接地线路20间均提供有一信号线路10。每一信号线路10与相邻的电力端子40或接地线路20间的距离近于相邻的信号线路10。每一电力端子40或接地线路20的宽度大于每一相应对信号线路10外端间的距离，从而使其间的串音干扰能够有效地消除。电力端子40及接地线路20的宽度可调整以适应减小电力及接地间的电阻。借此种装置的设置可在印刷电路板上提供大量信号线路10。易于理解，对于在同侧面的接地线路，其中的一些可借由电力端子替代，这些电力端子如前面提到的，也同样执行接地作用，且在高速传输过程中，作为另一种型式的接地线路，按照指定的应用型式，如是就在基板30上提供给电路装置更多的适应性。
尽管本实用新型是参考印刷电路板描述，易于理解该一般技术人员可轻易制出相同特征及好处的扁平柔性电路。因此，于此就省略了对其详细的描述。

Claims (8)

1.一种印刷电路线路装置，设置于基板上，其包括至少在基板一侧面设置的若干个信号线路及若干个接地线路，其特征在于：信号和接地线路交替排列从而在基板同一侧面上的任何两条信号线路均不相邻，且基板一侧面的信号线路与另一侧面的接地线路相对齐。
2.如权利要求1所述的装置，其特征在于：在基板两侧面均提供有信号与接地线路。
3.如权利要求2所述的装置，其特征在于：所述接地线路也可为电力端子。
4.如权利要求3所述的装置，其特征在于：接地线路的宽度可以变化以控制信号及接地线路的有效电阻及有效电感。
5.如权利要求4所述的装置，其特征在于：接地线路或电力端子长度比信号线路的长度长。
6.如权利要求5所述的装置，其特征在于：每一信号线路与相邻的电力端子或接地线路的距离近于其与相邻的信号线路的距离。
7.如权利要求6所述的装置，其特征在于：每一电力端子或接地线路的宽度大于对应对信号线路的外端间的距离。
8.如权利要求1所述的装置，其特征在于：所述基板是为印刷电路板或柔性电路板。
CN99239492.9U 1998-12-08 1999-08-31 印刷电路线路装置 Expired - Fee Related CN2397702Y (zh)

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US09/207,863 1998-12-08
US09/207,863 US6232560B1 (en) 1998-12-08 1998-12-08 Arrangement of printed circuit traces

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101526837B (zh) * 2008-05-27 2012-01-11 威盛电子股份有限公司 电子装置
CN102673493B (zh) * 2006-09-25 2015-09-09 卡森尼可关精株式会社 线束模块装置
CN105578740A (zh) * 2016-02-25 2016-05-11 广东欧珀移动通信有限公司 单面软硬结合板及移动终端
CN103889145B (zh) * 2014-01-09 2017-01-18 上海兆芯集成电路有限公司 线路板及电子总成
CN108575044A (zh) * 2017-03-13 2018-09-25 富士康(昆山)电脑接插件有限公司 印刷电路板及其组件
CN109087905A (zh) * 2017-06-14 2018-12-25 创意电子股份有限公司 半导体封装装置及其半导体配线基板

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EP1895589A3 (en) 1997-10-17 2013-04-03 Ibiden Co., Ltd. Semiconductor package substrate
JP2001210744A (ja) * 2000-01-25 2001-08-03 Nec Corp 回路基板
US7254149B2 (en) 2002-03-19 2007-08-07 Finisar Corporation Submount, pedestal, and bond wire assembly for a transistor outline package with reduced bond wire inductance
US6932518B2 (en) * 2002-03-19 2005-08-23 Finisar Corporation Circuit board having traces with distinct transmission impedances
US7044657B2 (en) * 2002-03-19 2006-05-16 Finisar Corporation Transistor outline package with exteriorly mounted resistors
US7042067B2 (en) * 2002-03-19 2006-05-09 Finisar Corporation Transmission line with integrated connection pads for circuit elements
US6750403B2 (en) * 2002-04-18 2004-06-15 Hewlett-Packard Development Company, L.P. Reconfigurable multilayer printed circuit board
CN101621888B (zh) * 2008-07-02 2012-07-25 英华达(上海)电子有限公司 实现敏感信号线在印刷电路板中走线的方法和系统
US9545003B2 (en) * 2012-12-28 2017-01-10 Fci Americas Technology Llc Connector footprints in printed circuit board (PCB)
US10685925B2 (en) 2018-01-26 2020-06-16 Nvidia Corporation Resistance and capacitance balancing systems and methods

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US5764489A (en) * 1996-07-18 1998-06-09 Compaq Computer Corporation Apparatus for controlling the impedance of high speed signals on a printed circuit board

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102673493B (zh) * 2006-09-25 2015-09-09 卡森尼可关精株式会社 线束模块装置
CN101526837B (zh) * 2008-05-27 2012-01-11 威盛电子股份有限公司 电子装置
CN103889145B (zh) * 2014-01-09 2017-01-18 上海兆芯集成电路有限公司 线路板及电子总成
CN105578740A (zh) * 2016-02-25 2016-05-11 广东欧珀移动通信有限公司 单面软硬结合板及移动终端
CN108575044A (zh) * 2017-03-13 2018-09-25 富士康(昆山)电脑接插件有限公司 印刷电路板及其组件
US10368433B2 (en) 2017-03-13 2019-07-30 Foxconn Interconnect Technology Limited Multi-layer circuit member with reference planes and ground layer surrounding and separating conductive signal pads
CN109087905A (zh) * 2017-06-14 2018-12-25 创意电子股份有限公司 半导体封装装置及其半导体配线基板
CN109087905B (zh) * 2017-06-14 2020-09-29 创意电子股份有限公司 半导体封装装置及其半导体配线基板

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