CN2338929Y - Encoder for TV Chinese character and picture signals - Google Patents

Abstract

The utility model relates to an encoder for TV Chinese character and picture signals, which belongs to the picture communication technique. The utility model is characterized in that the encoder for TV Chinese character and picture signals comprises a control microcomputer which is connected through a bus, an electrically erasable writing memory, a dynamic state memory, a data latch, a Chinese character standard word library and a Chinese character picture and character TV decode special chip SAA5700, wherein, the special chip is connected with the Chinese character standard word library and the data latch through an internal data and address bus and the dynamic state memory, and the special chip is also connected with the control microcomputer and the electrically erasable writing memory through an external data and address bus, so that the encoder for TV Chinese character and picture signals realizes the data processing, correction and display functions, and R, G, B and BLAN signals are finally output. The utility model has the advantages that the page turning does not need wait, the false code rate is low, the browsing and the screen display can be realized by the connection of the bus and the control microcomputer, etc.

Description

The Chinese teletext decoder

The utility model relate to a kind of be used for handling at the TV Field blanking interval transmit, the western language graph text information is shown in it Chinese teletext decoder on video screen again.

The patent No. is ZL94206639.1, the Chinese utility model patent that name is called " in the modified model, western language teletext decoder " proposed in a kind of image communication technical field in, the western language teletext decoder, it comprises WST western language teletext decoder and through I ²Multiplex's message pick-up, processing, display circuit that the C bus connects.It promptly controls microcomputer by remote controller, multiplex's special chip ASIC, and Chinese standard character library, dynamic memory, phase-locked loop, the western language teletext decoder is formed jointly.It is on western language teletext decoder basis, has increased that the decoding of Chinese character and processing section constitute, though realized the monolithic decoding, reduced cost, but in Video processing, the data cutting, aspects such as software school sign indicating number do not have the internal improvement, thereby its speed is slow, error rate height.

The purpose of this utility model is to provide a kind of reception, page-turning speed fast, and the error rate is low, the Chinese teletext decoder of the good reliability of dressization in the circuit level height, peripheral circuit.

Use proof: it has reached gives the phase purpose.

Of the present utility model being characterised in that: it comprises a Chinese teletext decoding special chip SAA5700, be used for video signal VIDEO, line synchronizing signal HSYNC, the field sync signal VSYNC of the television set of input, be converted to tristimulus signals and the blanking signal BLAN output of red R, green G, blue B; This chip SAA5700 is through bus I ²C (BUS) and control two-way connection of microcomputer (1); Electric erasable memory (2) is through bus I ²C (BUS) while and chip SAA5700 and control two-way connection of microcomputer (1); This chip SAA5700 is through data wire D3-D0 and two-way connection of dynamic memor (3), and this chip SAA5700 selects control line CAS, reads control line RAS, writes control line WE and unidirectional connection of dynamic memor (3) through sheet; This chip SAA5700 through address wire RA10-RA0 respectively with dynamic memor (3), data latches (4), the unidirectional connection of Chinese standard character library (5); This chip SAA5700 through the memory sheet select control line ROMCS respectively with data latches (4), the unidirectional connection of Chinese standard character library (5); The output of data latches (4) also with unidirectional connection of Chinese standard character library (5).

In order in conjunction with the embodiments the utility model to be done detailed describing below, show as follows employed accompanying drawing number of present specification and title brief introduction:

The block diagram that is connected of Fig. 1, Chinese teletext decoder CCST and television set relative section.

The theory diagram of Fig. 2, Chinese teletext decoder CCST.

The schematic block circuit diagram of Fig. 3, Chinese teletext decoding special chip SAA5700.

Embodiment:

Ask for an interview Fig. 1, the 1st, the control microcomputer, AT89C1051 makes with chip, and it is that dressization in a kind of peripheral circuit, low-voltage, little electric current, low-power consumption, electric erasable, data can keep 8 the CMOS single-chip microcomputers in 10 years, and it provides control signal Control to Chinese teletext decoder CCST.The 2nd, the electrically-erasable memory is made with chip 8582, is used for providing data through data wire SDA to chip SAA5700.The 15th, intermediate frequency amplifier, it provides video signal VIDEO to Chinese teletext decoder CCST.The 16th, deflection circuit, it provides line synchronizing signal HSYNC and field sync signal VSYNC to Chinese teletext decoder CCST.R, G, B are respectively the red, green, blue tristimulus signals, and BLAN is a blanking signal, are sent to color-code device 17.I ²C (BUS) is a bus, is used for connecting control microcomputer 1, and electrically-erasable memory 2 is connected with Chinese teletext decoder CCST remainder, also is used for being connected of chip SAA5700 and miscellaneous part simultaneously.

In Fig. 2, C is a coupling capacitance, the 3rd, and 1-4 megabit dynamic memor, the 4th, data latches, 74HC573 makes with chip.The 5th, Chinese standard character library.During it can provide, the western language character.Video signal VIDEO is from pin 5 input of chip SAA5700, chip SAA5700 to its flyback cutting back of carrying out data data through address wire RA10-RA0, data wire D3-D0 is temporary in the dynamic memory 3.Chip SAA5700 carries out verification to the data in the dynamic memory 3 simultaneously, wherein Chinese character by dynamic memory 3 through address wire RA7-RA4, data wire D7-D4 obtains from Chinese standard word storehouse 5, display circuit among the chip SAA5700 is also obtained data from dynamic memory 3, it is converted to behind red, green, blue tristimulus signals R, G, B and the blanking signal BLAN to 17 outputs of color-code device.Control microcomputer 1 is through bus I ²C (BUS) links to each other with chip SAA5700 to realize functions such as page browsing, screen display.The 12nd pin of control microcomputer 1 also can receive remote signal and through bus I ²C (BUS) links to each other with chip SAA5700 to be implemented in the content of display remoting input on the video screen.

Goodbye Fig. 3, Vcc are+5 volts, and Vss is 0 volt.Chip SAA5700 is characterised in that: described Chinese teletext decoding special chip SAA5700 contains the sync separator circuit 6 that it is input as television video signal VIDEO, it is input as the timing acquiring circuit 7 of the synchronization video pulse of sync separator circuit 6 outputs, output frequency is respectively 12MHz, the vibration of the 24MHz of two outs of phase and the time chong channel towards generator 8, the data acquisition circuit 9 that input links to each other with output timing acquiring circuit 7 and 12MHz modulating pulse clock pulse generator 8 respectively, respectively with data acquisition circuit 9, bus I ²The two-way connection of C (BUS) and the bag buffering and the error correction circuit 10 that link to each other with the output of the 12MHz modulating pulse of clock pulse generator 8 link to each other with the 12MHz pulse output end of clock pulse generator 8, again with electrically-erasable memory 2 and bus I ²The central processing unit 11 of the two-way connection of C (BUS) links to each other with the 24MHz pulse output end of clock pulse generator 8 simultaneously again and bus I ²The two-way connection of C (BUS) and be output as the display interface device circuit 12 that red, green, blue is R, G, B three primary colors and blanking signal BLAN, input is respectively the 24MHz clock pulse, line synchronizing signal HSYNC, field sync signal VSYNC and export the timing display circuit 13 that links to each other with display interface device circuit 12 and be input as the 24MHz clock pulse and with display interface device circuit 12, bus I ²The two-way connection of C (BUS) and export through sheet and select control line CAS, read control line RAS, writing control line WE links to each other with dynamic memor 3, link to each other with Chinese standard character library 5 through data wire D7-D4, through data wire D3-D0 and 3 two-way connections of dynamic memory, through address wire RA10-RA0 respectively with dynamic memory 3, data latches 4, Chinese standard character library 5 links to each other, select control line ROMCS and Chinese standard character library 5 through the memory sheet, the memory interface circuit 14 that data latches 4 links to each other is respectively formed.

Wherein vibration is 6MHz with the external crystal oscillator of clock pulse generator 8, the inner dominant frequency of frequency is 48MHz, frequency, a frequency 12MHz exports to timing acquiring circuit 7, data acquisition circuit 9, the frequency 24MHz of bag buffering and error correction circuit 10 and 11, two outs of phase of central processing unit gives display synchronization and memory interface circuit 14.After sync separator circuit 6 is received video signal VIDEO by coupling capacitor C from the pin 5 of chip SAA5700, it just therefrom cuts out row and the character group lock-out pulse that has comprised Chinese teletext text message, timing acquiring circuit 7 is sent in horizontal synchronizing pulse wherein handles, also produce a character group syncout pulse simultaneously through integrating circuit to abate the noise and visual unsteadiness.The phase-locked loop of timing acquiring circuit 7 by wherein the above line lock-out pulse is locked in 12MHz in case produce a framing coding trigger impulse and with the capable corresponding timing signal that enters.Data acquisition circuit 9 is made up of high-frequency loss compensator, A/D converter, data amplitude limiter and serial parallel converter.It by the square-wave video signal of character group lock-out pulse after to the switching of sync separator circuit 6 through high frequency compensation, mould/number conversion, and deposit bag pulse buffer and error correction circuit 10 behind the amplitude limit to be for further processing.This circuit 10 is push-up storages, and central processing unit 11 is sense data and deliver in the dynamic memor 3 after the TV Field blanking interval is handled it again and go therefrom.Central processing unit 11 has memory under program and fast reading and writing memory, controlled whole operations of chip SAA5700, it is from bag pulse buffer and error correction circuit 9 sense datas and become their collatings complete page information to deliver to the dynamic memor 3 after carrying out necessary additional error checking to go.It is also managing bus I simultaneously ²C (BUS) interface is to receive, to decipher and to carry out the instruction of sending from control microcomputer 1.It can also take out the page or leaf of required demonstration and it is converted to the required form of demonstration according to the requirement of control microcomputer 1 from dynamic memor 3.Then can from Chinese standard word storehouse 5, read as for Chinese character.Display interface device circuit 12 leaves in the dynamic memor 3, can exist central processing unit 11 data in the dynamic memor 3 to read and form display element continuously, to television set color decoder 17 output red, green, blue tristimulus signals R, G, B and blanking signal BLAN.Obtain in the address register of its address from central processing unit 11.Its pixel clock and row, the field synchronization reset pulse is provided by timing display circuit 13.Whether regularly display circuit 13 obtains row, field sync signal HSYNC and VSYNC to guarantee the synchronous of text display and display panel from the deflection circuit 16 of television set, also have other outer synchronisation sources irrelevant with television set.Described display synchronization signal also can be produced by chip SAA5700 oneself.Central processing unit 11 is from dynamic memor 3 or reading of data all will be passed through memory interface circuit 14 from Chinese standard word storehouse 5.Central processing unit 11 also usually can go to upgrade content in the dynamic memor 3 by memory interface circuit 14.This shows that chip SAA5700 is the monolithic decoder of high concentration, it can be finished from data and cut, obtains, error correction, is decoded to and shows and repertoires such as memory management.It can realize that the foreground shows because a dynamic register 3 is adopted in data cutting, verification error correction, demonstration, and the backstage receives and verification.It is slow that it has overcome page-turning speed fully, and critical defects such as error rate height have realized not having the page turning of wait, have reduced the error rate again to greatest extent.

Claims (3)

1, a kind of Chinese teletext decoder, it contains multiplex's message pick-up, processing, display circuit, it is characterized in that: it comprises a Chinese teletext decoding special chip SAA5700, be used for video signal VIDEO, line synchronizing signal HSYNC, the field sync signal VSYNC of the television set of input, be converted to tristimulus signals and the blanking signal BLAN output of red R, green G, blue B; This chip SAA5700 is through bus I ²C (BUS) and control two-way connection of microcomputer (1); Electric erasable memory (2) is through bus I ²C (BUS) while and chip SAA5700 and control two-way connection of microcomputer (1); This chip SAA5700 is through data wire D3-D0 and two-way connection of dynamic memor (3), and this chip SAA5700 selects control line CAS, reads control line RAS, writes control line WE and unidirectional connection of dynamic memor (3) through sheet; This chip SAA5700 through address wire RA10-RA0 respectively with dynamic memor (3), data latches (4), the unidirectional connection of Chinese standard character library (5); This chip SAA5700 through the memory sheet select control line ROMCS respectively with data latches (4), the unidirectional connection of Chinese standard character library (5); The output of data latches (4) also with unidirectional connection of Chinese standard character library (5).

2, Chinese teletext decoder according to claim 1, it is characterized in that: described Chinese teletext decoding special chip SAA5700 contains its sync separator circuit that is input as television video signal VIDEO (6), it is input as the timing acquiring circuit (7) of the synchronization video pulse after the flyback cutting of sync separator circuit (6) output, output frequency is respectively 12MHz, the vibration of the 24MHz of two outs of phase and the time chong channel towards generator (8), the data acquisition circuit (9) that input links to each other with the output with clock pulse generator (8) 12MHz modulating pulse of timing acquiring circuit (7) respectively, respectively with data acquisition circuit (9), bus I ²The two-way connection of C (BUS) and the bag buffering and the error correction circuit (10) that link to each other with the output of the 12MHz modulating pulse of clock pulse generator (8), link to each other with the 12MHz pulse output end of clock pulse generator (8), again with electrically-erasable memory (2) and bus I ²The central processing unit (11) of the two-way connection of C (BUS) links to each other with the 24MHz pulse output end of clock pulse generator (8) simultaneously again and bus I ²The two-way connection of C (BUS) and be output as the display interface device circuit (12) that red, green, blue is R, G, B three primary colors and blanking signal BLAN, input is respectively the 24MHz clock pulse, line synchronizing signal HSYNC, field sync signal VSYNC and export the timing display circuit (13) that links to each other with display interface device circuit (12) and be input as the 24MHz clock pulse and with display interface device circuit (12), bus I ²The two-way connection of C (BUS) and export through sheet and select control line CAS, read control line RAS, writing control line WE links to each other with dynamic memor (3), link to each other with Chinese standard character library (5) through data wire D7-D4, through data wire D3-D0 and two-way connection of dynamic memory (3), through address wire RA10-RA0 respectively with dynamic memory (3), data latches (4), Chinese standard character library (5) links to each other, select control line ROMCS and Chinese standard character library (5) through the memory sheet, the memory interface circuit (14) that data latches (4) links to each other is respectively formed.

3, Chinese teletext decoder according to claim 1 is characterized in that: described control microcomputer (1) is to use chip AT89C1051 system.

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