CN2128812Y

CN2128812Y - Television decryption device

Info

Publication number: CN2128812Y
Application number: CN92209492U
Authority: CN
Inventors: 沈雪峰; 张端; 郝毅
Original assignee: Xian Jiaotong University
Current assignee: Xian Jiaotong University
Priority date: 1992-05-09
Filing date: 1992-05-09
Publication date: 1993-03-24
Anticipated expiration: 2002-05-09

Abstract

The utility model discloses a decryption device for a television with Chinese and western language images and texts, belonging to the technical field of image communication. The utility model is attached to a household color television for receiving and processing the transmitted information of images and texts in the period of television field blanking. The utility model is composed of a WST western-language decoder and a multiplex information receiving, processing, and display device. A multiplex information receiving, processing, and display circuit comprises a control microcomputer, programs and characters, graphs, a Chinese character library, a time series generator, a display control circuit (CRTC), a combined logic circuit, a data and display buffer (RAM), a display combined circuit, and a printer interface. The utility model has the advantages of broad application, strong functions, and great expandability.

Description

Television decryption device

The utility model belongs to the image communication technology field, further relate to a kind ofly be attached to reception on the family expenses colour TV, handle the TV Field blanking interval transmit graph text information in, the western language teletext decoder.

Teletext is that all kinds of figures, Word message are superimposed upon with the form of digital signal on the several rows of vertical blanking period of broadcast television signal, the novel broadcast system that transmits with radio and television.

CCIR(Consultative Committee on International Radio (CCIR) in 1985) formal recommendation in REC653: the ANTIOPE of France, the U.S., Canadian NABTS, four kinds of standards (technical specification) such as hybrid mode of the WST of Britain and Japan.ANTIOPE, NABTS and hybridly fail to be used widely in these four kinds of standards because of cost is high, and WST is a kind of standard of widely using in the world at present, but its decoder is a kind of pure western language decoder, does not comprise Chinese character, thereby can not be applied to the country of China and some presentive word literal.

The purpose of this utility model is that WST western language graph-text decoding device is equipped with the one chip microcomputer technology, reach the expansion Chinese character, improve ability of drawing, increase Presentation Function, for the country that is applied to Chinese character and presentive word literal provide a kind of in, the western language teletext decoder.

The utility model is made up of WST western language decoder and multiplex's message pick-up, processing, display two parts, and these two parts pass through I ²The C bus connects, and multiplex's message pick-up, processing, display circuit partly are made up of control microcomputer, program and character, figure, Chinese character base, timing sequencer, display control circuit (CRTC), combinational logic circuit, data and display buffer memory (RAM), demonstration combiner circuit and printer interface etc.The control microcomputer is the core of this processor, and it receives, handles multiplex's information and remote command from WST western language decoder, and deposits the data in multiplex's information in RAM.Program and character, figure, Chinese character base are the read-only memorys (ROM) of depositing control microcomputer, remote controller program and figure, character set, standard Chinese character storehouse.Timing sequencer provides all timing signal accurately for multiplex's message pick-up, processing, display, display controller is by reading display buffer information repeatedly with the sequential of television line, a strict synchronism, send into the demonstration combiner circuit, combinational logic circuit is that the time slot that makes CPU visit RAM and CRTC visit RAM display buffer staggers, and prevents that CPU and CRTC from visiting the circuit that RAM clashes.Show that combiner circuit is the dot matrix that the display buffer is next, the circuit that attribute signal is formed red, green, blue colour signal and blanking signal.Printer interface is the circuit that the control microcomputer is connected with printer.Contact between each circuit is connected by internal bus.

Below in conjunction with accompanying drawing the utility model is further described.

Fig. 1 is the utility model functional-block diagram.

Fig. 2 is that the control microcomputer receives, the process information circuit.

Fig. 3 is a display control circuit.

Fig. 4 is a combinational logic circuit.

Fig. 5 shows combiner circuit.

Fig. 6 is a timing sequencer.

Wherein (1) is WST western language decoder, (2) be the control microcomputer, (3a) be program and character, shape library, (3b) be the standard Chinese character storehouse, (4) be timing sequencer, (5) be display controller, (6) are combinational logic circuits, and (7) are data display buffer ram memories, (8) be to show combiner circuit, (9) be printer interface circuit, (10) are address latchs, and (11) are distributors, (12) be that data/address bus transmits receiver, (13) be the dot matrix latch, (14) are the color latchs, and (15) are parallel/serial change-over circuits, (16) be the color combiner circuit, (17) be the blanking combiner circuit, (18) are timers, and (19) are timing distributors.

Message pick-up of the present utility model, treatment circuit show that by control microcomputer (2), address latch (10), program and character, shape library (3a), standard Chinese character storehouse (3b), data memory (7), distributor (11), data/address bus transmit receiver (12) and combinational logic circuit (6) is formed.Control microcomputer (2) receives the TT(teletext choosing page or leaf, function of remote controller etc.) after the instruction, the information of selected page or leaf is received, passes through I after the processing through WST decoder (1) ²C bus and bus transmit receiver (12) and write data memory RAM(7), software decode by memory under program (3a), to be stored in RAM(7) in data become the address, storehouse, distribute to CPU(2 at combinational logic circuit) visit RAM(7) time slot in, content in storehouse (3) is write RAM(7) the display buffer storage portions, control microcomputer provide control signal by distributor (11) for the circuit each several part.

Display control circuit is made up of display controller (5), combinational logic circuit (6), data demonstration memory (7) and demonstration combiner circuit (8) etc.Display controller (5) is distributed to its at combinational logic circuit (6) and is visited in the time slot of display buffer storage portions (7), with RAM(7) in content lock dot matrix, the color latch that shows in the combiner circuit (8) chronologically successively.Display controller (5) also makes the operation of CPU and shows that synthetic and television line, field sync signal are consistent.

Show combiner circuit by dot matrix latch (13), color latch (14), parallel/serial change-over circuit (15), color combiner circuit (16) and blanking combiner circuit are formed.Display controller is from RAM(7) the content of reading lock dot matrix latch (13) and color latch (14) chronologically through data/address bus, dot matrix latch internal information shifts out through parallel/serial change-over circuit (15) serial, be used to select the foreground or the background colour of color latch, through color combiner circuit (16) output red (R), green (G), blue (B) signal.The TV(TV is selected) and the BLANK signal of WST decoder (1), form TV blanking signal BLANK through blanking combiner circuit (17), with realization picture superposition, interpolation frame, function such as window.

Combinational logic circuit is chronologically with CPU(2) and CRTC(5) visit RAM(7) carry out the wrong Key Circuit of dividing of time slot, it is by electronic switch (6a), data selector MUX(6b), (6c), (6d) form.CRTC(5) column address RA0-RA4 and the A on the address bus ₁₀-A ₁₄Select storage address MA CRTC(5) by electronic switch ₀-MA ₉A with address bus ₀-A ₉By data selector MUX(6b), (6c), (6d) select, whole selection determines by in the timing sequencer (4) CPU and CRTC press the signal DISCS that time slot distributes.

Timing sequencer (4) is made up of timer (18), timing distributor (19), and timer is by the clock F of WST decoder (1) output ₆Produce the clock of display controller (5), the clock of control microcomputer (2) shows that clock and switching signal etc. are got in the demonstration of synthetic (8) ready, and timing distributor (19) is by Senior Three position, address A ₁₃-A ₁₅Produce EPROM, RAM, CRTC chip selection signal and make CPU and the signal DISCS of CRTC timesharing visit RAM.

Display mode of the present utility model has: complete draw fixing, superposition, interpolation frame, window.That Show Color has is black, red, yellow, green, blue, purple, blue or green, 16 kinds of foreground such as its corresponding high luminance color of bletilla, background colour, grating look.Presentation Function has: stable, 1HZ normally dodges, and the 2HZ three-phase dodges and anti-phase sudden strain of a muscle, and the color table of exchange dodges, and increment dodges, and decrement is dodged, concealment, and separated graphics, the character underscore, the widening, increase, amplify of all character set, picture is doubly high.The character display collection has C ₀Collection (standard western language collection), C ₂Collection (block MDSAIC graphical-set); C ₃Collection (level and smooth MOSAIC graphical-set); GB I and II Chinese character and outer word; Western language DRCS, Chinese DRCS etc.

Characteristics of the present utility model are: (1) applied range, creatively expanded Chinese word function, and realized the full compatibility of Chinese and western language, thereby realized the compatibility of east ideograph and western language phonetic alphabet literal. (2) function is strong, and the utility model is attached on the colour TV, and the family expenses colour TV not only can be watched radio and television, but also has increased the function of electronic newspaper magazine, simultaneously, the content of watching the graph text information page or leaf can also be printed. (3) autgmentability is big, and the utility model leaves I²C EBI, RS232 interface and 8031 microcomputer serial communication ports, suitably Application and Development software can double as Videtex, home computer, electronic game machine, TV subtitling superposer etc. (4) cost is low, and power consumption is little.

Claims

1, in a kind of, the western language teletext decoder, it comprises WST western language decoder and multiplex's message pick-up, handle, show two parts, it is characterized in that: described multiplex's message pick-up, display circuit comprises the control microcomputer, program and character, figure, Chinese character base, timing sequencer, display control circuit (CRTC), combinational logic circuit, data and display buffer memory (RAM), show combiner circuit and printer interface, described control microcomputer receives, processing is from the multiplex's information and the remote command of WST western language decoder, and deposit the data in multiplex's information in RAM, program and character, figure, Chinese character base is to deposit the control microcomputer, remote controller program and figure, character set, the read-only memory in standard Chinese character storehouse (ROM), timing sequencer is multiplex's message pick-up, handle, display provides timing signal, display controller is pressed and television line, the sequential of field strict synchronism is read display buffer information repeatedly, send into the demonstration combiner circuit, combinational logic circuit is to distribute the circuit that imitative RAM of CPU and the imitative RAM of CRTC are avoided conflict by time slot, show that combiner circuit is the dot matrix that the display buffer is come, attribute signal is combined into red, green, the circuit of blue colour signal and blanking signal, printer interface will control microcomputer and printer couples together, adopt bus draw bail, described WST western language decoder and multiplex's message pick-up between each circuit, handle, display passes through I ²The C bus connects.

2, television decoder as claimed in claim 1 is characterized in that: after described control microcomputer receives the teletext choosing page or leaf, function command of remote controller, the information of selected page or leaf after the WST decoder receives, handles, is passed through I ²C bus and bus transmit receiver and write data memory RAM, software decode by memory under program, to deposit that data become the address, storehouse among the RAM in, in combinational logic circuit is distributed to the time slot of CPU visit RAM, content in the storehouse is write the display buffer storage portions of RAM, and the control microcomputer provides control signal by distributor for the circuit each several part.

3, television decoder as claimed in claim 1, it is characterized in that: described display control circuit comprises that display controller, combinational logic circuit, data show memory and show combiner circuit, display controller is distributed to it at combinational logic circuit and is visited in the time slot of display buffer storage portions, content among the RAM is locked dot matrix, the color latch that shows in the combiner circuit chronologically successively, and display controller also makes the operation of CPU and shows that synthetic and television line, field sync signal are consistent.

4, television decoder as claimed in claim 1, it is characterized in that: described demonstration combiner circuit comprises the dot matrix latch, the color latch, parallel/serial change-over circuit, color combiner circuit and blanking combiner circuit, the content that display controller is read from RAM is locked dot matrix latch and color latch chronologically through data/address bus, information in the dot matrix latch shifts out through parallel/serial change-over circuit serial, be used for selecting the foreground or the background colour of color latch, red through the output of color combiner circuit, green, blue signal, the BLANK signal of TV selection and WST decoder, form TV blanking signal BLANK through the blanking combiner circuit, to realize the picture superposition, interpolation frame, windowing function.

5, television decoder as claimed in claim 1 is characterized in that: described combinational logic circuit is chronologically CPU and CRTC visit RAM to be carried out the wrong circuit that divides of time slot, and it comprises electronic switch, data selector MUX, the column address RA of CRTC ₀-RA ₄With the A on the address bus ₁₀-A ₁₄Select the storage address MA of CRTC by electronic switch ₀-MA ₉A with address bus ₀-A ₉Selected by data selector MUX, whole selection is by in the timing sequencer CPU and CRTC being pressed the signal DISCS decision that time slot distributes.

6, television decoder as claimed in claim 1 is characterized in that: described timing sequencer comprises timer, timing distributor, and timer is by the clock F of WST decoder output ₆Produce the clock of display controller, clock and switching signal are got in the clock of control microcomputer, the synthetic demonstration of demonstration ready, and described timing distributor is by Senior Three position, address A ₁₃-A ₁₅Produce EPROM, RAM, CPTC chip selection signal and make CPU and the signal DISCS of CRTC timesharing visit RAM.