JPS5827592Y2 - Character signal receiving device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a text signal receiving device that selectively receives a plurality of channels of text broadcast signals multiplexed with a television signal.

Among teletext broadcasting systems, for example, NHK's C system has nine types of teletext channels, and the transmission time for the -channel is about 2.5 seconds.

Therefore, it may take a waiting time of 20 seconds or more from channel selection to display, which has the disadvantage that the waiting time feels long to the user.

Therefore, a technique has already been proposed (Japanese Patent Application No. 52-104289 (see Japanese Patent Laid-Open No. 54-37527)) for displaying the title and page of the program being transmitted during the waiting time.

Therefore, in order to further improve the above-mentioned technology, the present invention changes the background color during the waiting time every time the transmission channel changes, and uses a predetermined background color during the display time to reduce user boredom. This is an attempt to propose a new teletext receiving device that will confuse users.Before explaining the device of the present invention, NHK's C system and the prior art of displaying titles during waiting time will be explained.

First of all, NHK's C system consists of a total of 10 channels, including a channel that displays nine types of programs as text or graphics on the CRT screen, and a channel that superimposes flash news on the video being broadcast. When displaying a full screen, one line of characters per field is composed of 18 scanning lines, 8 scanning lines are assigned between lines to display 8 lines of characters, and when displaying a figure,
The entire figure is displayed with 200 horizontal scanning lines, and when superimposed display is performed, two lines of characters are displayed at the bottom of the image.

Furthermore, the character signals are transmitted in a fixed order in units of one page of display on each channel, with the super display channel intervening.

Furthermore, the multiplexing positions of the teletext signal are determined at the 20th and 283rd horizontal scanning periods corresponding to the vertical blanking time, and the control signal and the display necessary for one horizontal scanning line are transmitted in one horizontal scanning period. Display signals are multiplexed.

The configuration of the control signal is a 4-bit STX signal for synchronization.
program code (PC), 3-bit program correction code (C
C), 8bit scan line code (LC), lbi
t parity check bit P, 1 bit subtitle erase bit) (SE), followed by a display signal (C8)
is composed of 245 bits of information corresponding to one scanning line of the display area (see FIG. 1).

Furthermore, when transmitting character information, only the control signal and the display signal are multiplexed and transmitted in advance before transmitting each line, omitting the transmission of information between lines.

Therefore, it takes approximately 2.5 seconds to transmit text information, and 3.3 seconds to transmit image information.

In order to receive a character signal having the configuration as described above, a circuit as shown in the circuit block diagram of FIG. 2 is required.

That is, a waveform shaping circuit 1 that adjusts the waveform of a multiplexed signal for the video signal 6, a synchronization separation circuit 2 that derives a horizontal synchronization signal,
input to the burst sampling circuit 3 for deriving the burst signal;
A multiplex position detection circuit 4, which counts the synchronous separation outputs and detects the multiplexed position of character signals, controls the opening and closing of the signal sampling circuit 5 to derive a multiplexed signal d from the waveform shaping output C.

Of the multiplexed signals derived, the STX signal is input to the STX detection circuit 6, which receives the burst signal at the output e of the circuit and controls the phase of the clock generation circuit I which derives a clock f having a frequency 875 times the burst frequency. Then, the program code (PC) is input to the program code comparison circuit 8 and compared with the program code specified by the program selection switch 9, and the line code (LC) is input to the line code comparison circuit 10 and displayed. A comparison is made with the bit output of the horizontal lie counter 11 that counts O at the 43rd H starting point, and a display signal (C8) is stored in the buffer memory 10 using the accumulation pulse g derived by the control circuit 12.

The stored 245-bit display signal (C8) is generated by the sending pulse g' derived from the control circuit 12 when the coincidence output of the line code comparison circuit 10 and the coincidence output of the program code comparison circuit 8 are derived simultaneously. The data is written into the main memory 15 via the rewrite gate 14 whose write path is opened by opening/closing the output.

The main memory 15 performs signal processing while cyclically shifting the stored contents via the rewriting gate 14 whose circulation path side is open in response to a shift pulse i derived by the control circuit 12 for display. It is input to the circuit 16.

Furthermore, the signal processing circuit 16 selects a color selection output j derived from the control circuit 12 in order to set the background to blue for full screen display and to set the background to normal video for super display. A color signal is selectively applied to the three cathode terminals via a drive circuit.

The technology according to the prior application further includes a program code detection circuit 18 that detects a change in the program code (PC) from the multiplexed signal d, and when there is a change in the full-screen display program during the waiting time, the control circuit 12 is activated. The display signal is stored in the main memory 15 for one line, and the program title and page are displayed.

Diagram number 19 in Figure 2 is a stop circuit that fixes the display.
20 indicates the selection switch 90 channel display circuit, respectively.

In this embodiment, in the configuration as described above, the background color for the title and page display displayed during the period time is changed every time the transmission channel is changed, and the zero background color is set to blue during the display time. A circuit (shown in FIG. 3) is added to the signal processing circuit.

The symbol (CT) in the figure is the count pulse input terminal (IN), reset pulse input terminal R, and 3-bit count output terminal Q.
1, Q2, Q3, (C
HEX) is a channel selection pulse application terminal that derives a reset pulse to the reset pulse input terminal during program selection operation;
FLH) is a channel change pulse application terminal that derives a counting pulse to the counting pulse input terminal (IN) as the teletext channel to be transmitted changes, and (ER) changes from a high level to a low level as the desired channel is transmitted. A timing output application terminal (C8
) is a display signal application terminal that applies a main memory output (display signal) derived from the main memory 15 in synchronization with the video signal, and R, G, and B are drive stages (not shown) provided in the front stage of the cathode ray tube 17. ) are shown respectively showing color signal output terminals that apply color signals to the three cathodes.

Therefore, according to the circuit of this embodiment, the counter (CT) is first reset in response to the program selection operation, and the count output terminal becomes a low state of 0, and no output is output to each of the R, G, and B output terminals, and the cathode ray tube is The surface becomes black level.

Next, when a counting pulse is applied from the FLH terminal due to a change in the transmission channel, the counter (CT) increases to 11".
is counted and a high-level first bit output is supplied to the B terminal, and the title and page being transmitted are displayed in white with a blue background.

Similarly, each time the transmission channel is changed, the counter (CT) repeats the count and sets the output to high level in the order of G terminal, G terminal and B terminal, R terminal, R terminal and B terminal, etc. , green, cyan background for white text indicating titles and pages.

Change in the order of red, magenta, etc.

When the counter (CT) counts 7, both the background color and the character color become white, making it difficult to distinguish. Therefore, the AND output of each bit output is immediately applied to the counter (CT) as a reset pulse, and the count is started. It is authoritative to change the number to O and the background to black again.

Therefore, the background will never be white.

As described above, when the circuit of this embodiment is in the timing state where the title and page are displayed while changing the background color, when the desired broadcast channel is transmitted, the timing output is deactivated and the second and third
The output of the bit output is cut off and the B terminal is set to high level, making the background color blue.

Therefore, when displayed, white characters or figures are displayed on a blue background.

As described above, according to the present invention, the color of the background changes every time the transmission channel is changed during dark hours, which not only relieves the user of boredom, but also makes it possible to avoid text and graphics by changing the background color to blue when displaying. It is easier to see than when the background is colored, and the effect is great.O

[Brief explanation of the drawing]

Figure 1 is an explanatory diagram showing the arrangement of character signals multiplexed in NHK's C system, Figure 2 is a schematic circuit block diagram of a character signal receiving device, and Figure 3 is an embodiment of the present invention. The main part circuit diagrams of the signal processing circuits are shown. Explanation of main figure numbers, 15...Main memory, 17
...Cathode-ray tube, (CT)...-Counter.

Claims (1)

[Scope of utility model registration request] The character signal of a desired channel is stored in a storage means from the character signals of multiple channels multiplexed with the video signal, and when displaying it on the television screen, the character signal of the desired channel is stored in the storage means, and the character signal of the other channel being transmitted is stored in the later time until the character signal of the desired channel is received. In a character signal receiving device that stores and displays only the character signals related to the title and page of , and stores and displays the character signals of the desired channel at the display time after the character signals of the desired channel are transmitted,
The background color of the characters displayed during the display time is changed every time the channel is changed, and in order to set the background color of the characters displayed during the display time to a predetermined color, the channel changes are counted and each bit output is converted to the CRT. A character signal receiving device characterized in that it is provided with a 3-bit counter that applies an voltage to each cathode electrode, and a logic circuit that applies an output only to a predetermined cathode electrode in priority to the respective bit outputs upon reception of a desired channel. .