CN204761584U - Device of transmission MIPI signal under LPDT mode based on FPGA realizes - Google Patents

Abstract

The utility model discloses a realize MIPI signal transmission under the LPDT mode, and can be applicable to the device of transmission MIPI signal under LPDT mode based on FPGA realizes of characteristic MIPI modules such as different resolution ratio, different image bit wides at a slice FPGA on chip, including LPDT control module, MIPI module configuration module, RGB video input module, COMMAND data module, MIPI group package module, LPDT cache module, LPDT transport module and MIPI level conversion module. The utility model discloses the LPDT transfer mode that realizes defers to in MIPI DSI agreement about the description standard of LPDT mode, is applicable to the MIPI module of different resolution ratio, size, some screen parameter. The utility model discloses not only but the transmitter data gives the MIPI module in order to dispose or to control its register, also can receive the parameter of following the MIPI module and returning, and the transmission is reliable, stable, the error free mistake.

Description

Based on the device transmitting MIPI signal under LPDT pattern that FPGA realizes

Technical field

The utility model relates to display and the field tests of MIPI liquid crystal module, refers to a kind of device transmitting MIPI signal under LPDT pattern realized based on FPGA particularly.

Background technology

MIPI agreement and interface signal are a kind of coffrets extensively used on various portable equipment, generally transmitting image vision signal under HS state.According to MIPIDSI agreement regulation, under LP state, the transmitted in both directions (send or receive data) of data also can be carried out, i.e. low power consumption data transmission mode---LPDT (Low-PowerDataTransmission).

LPDT transmission mode communicates with MIPI module by means of only MIPILANE0 holding wire, the most high transmission rates of this pattern is 20Mbps, have that transmission reliability is high, opposing traffic, low in energy consumption, disturb little, image data transmission is controlled, to features such as MIPI module can manipulate, avoid various interference and cause error of transmission.

Due to above-mentioned advantage, LPDT transmission mode not only can be configured MIPI module and read module return parameters, also can in some cases (as high in video picture validity, only refresh topography, without the need to Dynamic Announce, detection and localization module etc.) for transmit image data to MIPI module.

Under LPDT transmission mode, no matter module configuration information or image video signal all convert COMMAND data mode to and transmit.COMMAND pattern is a kind of mode of similar operations MCU register, DCS display command collection (DisplayCommandSets) or MIPI configuration-direct are issued MIPI module, view data or configuration data is followed with register parameters form after DCS, issue module simultaneously.The performance requirement of LPDT to display main control device (HOST) is low, shows low in energy consumption, is applicable on the display device of various different performance.This pattern has now become the critical function of display product in producing and detecting.

Will realize the demand at present generally adopts the scheme of the external bridging chip of main control device to realize, but there is the problems such as realization is complicated, cost higher, different chip cooperation difficulty is comparatively large, the manufacturing cycle is long.

Summary of the invention

For the deficiencies in the prior art, the purpose of this utility model is the device transmitting MIPI signal under LPDT pattern realized based on FPGA realizing MIPI Signal transmissions under LPDT pattern and can be applicable to the characteristic MIPI module such as different resolution, different images bit wide in a slice fpga chip.

For achieving the above object, a kind of device transmitting MIPI signal under LPDT pattern realized based on FPGA designed by the utility model, comprises LPDT control module, MIPI module configuration module, rgb video input module, COMMAND data module, MIPI group bag module, LPDT cache module, LPDT transport module and MIPI level switch module;

Described LPDT control module is connected with MIPI module configuration module, COMMAND data module, LPDT transport module and MIPI level switch module respectively, described MIPI module configuration module is connected with COMMAND data module respectively with rgb video input module, described COMMAND data module is connected with LPDT cache module by MIPI group bag module, described LPDT cache module is connected with MIPI level switch module by LPDT transport module, described MIPI group bag module is also connected with LPDT transport module, and described MIPI level switch module is connected with MIPI module.

Further, described rgb video input module has two buffer areas.Because in FPGA sheet, cache resources is limited, and in event rgb video input module, two buffer areas are set, when subsequent module is while reading certain a line video data in one of them buffer area, next line video data is written in another buffer area, do ping-pong operation each other thus reduce the transmission intercal time, improving FPGA resource utilance and efficiency of transmission.

Further, the video transfer signal that described rgb video input module receives is LVDS vision signal.The utility model is applicable to various vision signal, includes but not limited to LVDS vision signal.As long as by video transfer signal input video being carried out to demodulation, decoding can be converted to rgb video signal, be all applicable to the utility model.

Further, described MIPI packet comprises the long bag of MIPI data and the short bag of MIPI data.Wherein the short bag of MIPI data is applicable to the MIPI configuration-direct of printenv and a band parameter, and MIPI data are long wraps the MIPI configuration-direct and view data that are applicable to multiple parameter.

The beneficial effects of the utility model are:

(1) the LPDT transmission mode that the utility model realizes conforms to the Description standard about LPDT pattern in MIPIDSI agreement, is applicable to the MIPI module of different resolution, size, some screen parameter.

(2) the utility model not only can send data to MIPI module to be configured or to manipulate its register, also can receive the parameter returned from MIPI module, and transmission is reliable, stable, inerrancy.

(3) instruction configuring or read and write different MIPI module, parameter all directly produce data to the utility model by upper strata (as PC, MCU or other main process equipments), and receive the parameter that MIPI module returns and also issue upper strata, thus make whole transmission easy and simple to handle, automatically complete, without the need to manual intervention.

(4) for be better applicable to different MIPI module, the utility model also can, by upper-layer configured, recover to obtain the LPDT data that the sample clock frequency of reception needed for data both also can have been returned from MIPI module by upper-layer configured the transmission transmission rate of LPDT pattern.

(5) COMMAND data mode is all processed into transmit image data or MIPI configuration data, meets the data composition form that MIPIDCS agreement specifies.Support different view data bit wides, RGB component puts in order.

(6) the utility model by with FPGA (field programmable logic array) chip, realize described repertoire; FPGA is the common chip in market, not only working stability, realize easily, and low price, avoid the problem such as design complexity, poor stability, design cost height caused because using various independent entry device and chip.

Accompanying drawing explanation

Fig. 1 is the circuit block diagram transmitting the device of MIPI signal under LPDT pattern that the utility model realizes based on FPGA.

Fig. 2 is the MIPI data structure sending MIPI configuration-direct under being defined in LPDT pattern according to MIPIDSI agreement.

Fig. 3 is the MIPI data structure sending view data under being defined in LPDT pattern according to MIPIDSI agreement.

Fig. 4 is the MIPI data structure sending data under being defined in LPDT pattern according to MIPIDPHY agreement.

Fig. 5 is the MIPI data structure receiving data under being defined in LPDT pattern according to MIPIDPHY agreement.

In figure: LPDT control module 1, MIPI module configuration module 2, rgb video input module 3, COMMAND data module 4, MIPI group bag module 5, LPDT cache module 6, LPDT transport module 7, MIPI level switch module 8, MIPI module 9.

Embodiment

Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.

As shown in Figure 1, a kind of device transmitting MIPI signal under LPDT pattern realized based on FPGA provided by the utility model, comprises LPDT control module 1, MIPI module configuration module 2, rgb video input module 3, COMMAND data module 4, MIPI group bag module 5, LPDT cache module 6, LPDT transport module 7 and MIPI level switch module 8.

LPDT control module 1 is connected with MIPI module configuration module 2, COMMAND data module 4, LPDT transport module 7 and MIPI level switch module 8 respectively, MIPI module configuration module 2 is connected with COMMAND data module 4 respectively with rgb video input module 3, COMMAND data module 4 is connected with LPDT cache module 6 by MIPI group bag module 5, LPDT cache module 6 is connected with MIPI level switch module 8 by LPDT transport module 7, MIPI group bag module 5 is also connected with LPDT transport module 7, and MIPI level switch module 8 is connected with MIPI module 9.

LPDT control module 1 produces MIPI configuration-direct for the MIPI configuration information sent according to upper strata and is sent to MIPI module configuration module 2, COMMAND data module 4, LPDT transport module 7 and MIPI level switch module 8;

MIPI module configuration module 2 is for being sent to COMMAND data module 4 by MIPI configuration-direct buffer memory;

Rgb video input module 3 is for being converted to rgb video signal and buffer memory by the video transfer signal of reception;

COMMAND data module 4 is for being converted to COMMAND data format by the rgb video signal of buffer memory;

MIPI group bag module 5 is for forming MIPI packet by the rgb video signal of COMMAND data format and being sent to LPDT cache module 6;

The MIPI packet that LPDT cache module 6 receives for buffer memory;

LPDT transport module 7 is for exporting the MIPI packet of buffer memory to MIPI level switch module 8 by LPDT coded system;

MIPI level switch module 8 transfers to MIPI module 9 for converting MIPI packet to standard MIPILP level signal.

Comprise according to the concrete steps transmitting the method for MIPI signal under LPDT pattern that said apparatus realizes realizing based on FPGA:

1) upper strata (can be MCU, PC or other control appliances) first sets wanted MIPI configuration information, comprise MIPI module spread its tail the configuration informations such as instruction, video transmission parameter arranges (LINK quantity, transmission of video coding standard as LVDS transmission), RGB color bit wide arranges (6/8/10/12/16bit), R/G/B color separation sequence arranges (i.e. the order of transmission of the blue each color component of reddish yellow), LPDT transmission rate is arranged, LPDT transmits electric parameter and arranges (as level range, driving intensity, termination matching).The MIPI configuration information set is sent to LPDT control module 1 by common interfaces such as Ethernet, serial ports, USB by upper strata.LPDT control module 1 again its configuration information is reduced into parameters and MIPI configuration-direct is sent to MIPI module configuration module 2, COMMAND data module 4, LPDT transport module 7 and MIPI level switch module 8.

2) when LPDT control module 1 sends to MIPI configuration-direct MIPI module configuration module 2, because its configuration-direct is generally more, therefore MIPI module configuration module 2 is first all cached it.When LPDT control module 1 completes whole MIPI configuration-direct to after above-mentioned MIPI module configuration module 2, COMMAND data module 4, LPDT transport module 7 and MIPI level switch module 8 modules, then start to carry out LPDT transmission operation, have three kinds of operations to current transmission: send configuration order to module, reception module return parameters, transmission view data to module.

One, when LPDT transmission operation is " transmission configuration order "

3) when transmission operation is " when sending MIPI configuration-direct ", LPDT control module 1 starts MIPI module configuration module 2 by " module configuration control signal " and starts.MIPI configuration-direct finish message is become reference format by MIPI module configuration module 2, and each MIPI configuration-direct is sent to COMMAND data module 4 by order.For improving transmission reliability, instruction is avoided to send caused error of transmission continuously, each MIPI module configuration module 2 sends a MIPI configuration-direct and is transferred to MIPI module 9 to subsequent module, after whole transmit operation completes, then is sent by next MIPI configuration-direct.

4) when COMMAND data module 4 receives a current configuration-direct that will transmit, be then first divided into MIPI order, command type, subsidiary parameter (number of parameters is not fixed) according to MIPIDSI agreement, send the instruction features information such as interval.And by the MIPI order in configuration-direct, argument section composition COMMAND data format: i.e. the 1st Data Position of this form inserts MIPI order, follow-up location insert successively parameter 1, parameter 2 ..., parameter n, if each parameter is made up of multiple byte, then be split into high low byte Byte form order and insert follow-up location, if do not have parameter, a follow-up location only inserts channel population character (see accompanying drawing 2).MIPI group bag module 5 is given by the MIPI configuration-direct of COMMAND data format and correlated characteristic information after COMMAND data module 4 has operated.

5) the MIPI configuration-direct of the COMMAND data format received is formed MIPI packet according to MIPIDCS agreement by MIPI group bag module 5.Concrete operations are: the number first determining COMMAND data, (the short bag of MIPI data is applicable to printenv and is with the MIPI configuration-direct of a parameter to be divided into the long bag of MIPI data and short bag by the difference of quantity again, MIPI data are long wraps the MIPI configuration-direct be applicable to multiple parameter), define data packet head dissimilar accordingly by the difference of configuration order type simultaneously, and calculate ECC and CRC check code respectively according to packet header and packet header, form the long bag of complete MIPI data or short bag (referring to accompanying drawing 3) thus, and give LPDT cache module 6 buffer memory by MIPI packet.

6) after LPDT cache module 6 buffer memory completes, then wait for the some time, start LPDT transport module 7 by " LPDT transmission of control signals " after interval time operate when reaching to send.

7) LPDT transport module 7 specifies according to MIPIDPHY agreement upon actuation, level change is first produced to enter Escape-Mode state to the LPDT-p/n signal exported, export the LPDT mode command (0x87h of stringization again,), afterwards each byte data of the MIPI packet of institute's buffer memory in LPDT cache module 6 is taken out in turn and stringization output one by one, the LPDT coded system that these serial data all specify according to MIPIDPHY agreement exports, and forms corresponding serial transmission speed (referring to accompanying drawing 4) by arranging of LPDT control module 1.

8) single-ended signal of the two-way LPDT-p/n inputted from LPDT transport module 7 is converted to the MIPILP level signal of standard by MIPI level switch module 8, namely gives MIPI module 9 by MIPILANE0 holding wire.And press the electrical characteristic such as the level range of MIPI configuration-direct to the corresponding signal transmission of generation, driving intensity, Slew Rate, termination matching of LPDT control module 1 transmission.

9) after whole groups of bag data of current MIPI configuration-direct are issued MIPI module 9 by LPDT transport module 7, then pass through " LPDT transmission state signal " and inform that next MIPI configuration-direct is sent into subsequent module thus carries out the LPDT transmission operation of a new round by MIPI module configuration module 2, MIPI module configuration module 2 again through LPDT control module 1.

10) repeat step 4) ~ 9) until in MIPI module configuration module 2 the MIPI configuration-direct of buffer memory be all sent to MIPI module 9.

Two, when LPDT transmission operation is " receiving MIPI module 9 return parameters "

11) MIPI configuration-direct is arranged to read command according to " MIPI module configuration information " content by upper strata, and it reads parameter is the maximum number returning bag data of module.And MIPI configuration-direct is sent into MIPI module configuration module 2 through LPDT control module 1, MIPI module configuration module 2 will be read parameter and give COMMAND data module 4 and be organized into COMMAND data, it is changed into the special short bag of MIPI data according to MIPIDSI agreement by MIPI group bag module 5 again, MIPI module 9 is finally sent to successively afterwards by LPDT cache module 6, LPDT transport module 7 and MIPI level switch module 8, inform MIPI module configuration module 2 after being sent completely, the foregoing LPDT of whole operation sends the process of configuration order.

12) above-mentioned steps, by COMMAND data module 4, MIPI module configuration module 2 informs that MIPI group bag module 5 carries out read operation and read command type, MIPI group bag module 5 produces the short bag of read command of respective type according to different command type and notifies that subsequent module carries out read operation.After short for read command bag is sent to MIPI module 9 by LPDT transport module 7 and MIPI level switch module 8.LPDT transport module 7 changes output immediately LPDT-p/n level state according to MIPIDPHY agreement returns (BusTurnAround) state to enter data wire, and MIPI level switch module 8 these states of corresponding output are to MIPI module 9.

13) after MIPI module 9 receives BTA state, enter response status, return the serial data code signal of desired parameters.MIPI level switch module 8 is received and is returned to LPDT transport module 7, LPDT transport module 7 is decoded to module inverse signal according to MIPIDPHY agreement, recover MIPI packet and be cached to LPDT cache module 6, MIPI group bag module 5 is taken out again carries out unpacking process, obtain the supplemental characteristic that returns and parameter type to send into MIPI module configuration module 2, MIPI module configuration module 2 through COMMAND data module 4 and restore into the accessible data format in upper strata and issue upper strata (referring to accompanying drawing 5) through LPDT control module 1.

Three, when LPDT transmission operation is " sending rgb video data "

14) after having configured MIPI module 9, LPDT control module 1 starts rgb video input module 3 receiving video signals by " RGB control signal ".It can be various signal transmission that the video transfer signal that rgb video input module 3 inputs is not limited to LVDS, and first according to " video transmission parameter setting ", demodulation is carried out to input video, decoding, convert rgb video signal (RGB parallel data and synchronizing signal) to, because in FPGA sheet, cache resources is limited, and event arranges two buffer areas in rgb video input module 3, when subsequent module is while reading certain a line video data wherein in a buffer area, next line video data is written in another buffer area, do ping-pong operation each other thus reduce the transmission intercal time, improve FPGA resource utilance and efficiency of transmission.

15) after the first row image of the complete present image of LPDT control module 1 buffer memory, then notify that COMMAND data module 4 carries out rgb video transmission operation, COMMAND data module 4 inserts DCS order 2C (representing that video starts) according to MIPIDCS (DisplayCommandSet) agreement on first Data Position of COMMAND data format, and then the RGB data of reading LPDT control module 1 buffer memory of order is also filled on the follow-up location of COMMAND data format successively afterwards.Because COMMAND data are byte align forms, therefore COMMAND data module 4 adjusts the front and back position of R, G, B component of each video data according to " R/G/B color separation sequence is arranged "; The RGB component being the video data of 12bit, 16bit to color range according to " setting of RGB bit wide " again splits into two high low bytes and inserts successively (see accompanying drawing 3).

16) after COMMAND data module 4 is the video data of the first row composition COMMAND data, MIPI group bag module 5 is formed the long bag of MIPI data, finally send to MIPI module 9 by LPDT cache module 6, LPDT transport module 7 and MIPI level switch module 8 successively, the foregoing LPDT of whole operation sends the process of configuration order.

17) after current line video data has sent by LPDT transport module 7, inform rgb video input module 3 by " LPDT transmission state signal " through LPDT control module 1, follow-up often row video data is issued module by the whole repetition step 14,15,16 that operates in successively afterwards.When sending non-the first row video data, DCS order 3C (subsequent video) inserts in first position of COMMAND data format according to MIPIDCS agreement by COMMAND data module 4, and other operations are with aforementioned constant.

18) when each row video data of present image issues MIPI module 9, MIPI module 9 shows each row of data of the present image received successively.

19) after a frame video is sent completely, before there is no new image input, each module is by pausing operation, whether rgb video input module 3 continuous detections simultaneously have new image input, if adjacent two frame data changes, then represent new images input, then the data of new images are issued MIPI module 9 by repetition These steps by each module.

Below be only preferred implementation of the present utility model; it should be pointed out that for those skilled in the art, under the prerequisite not departing from the utility model principle; can also design some improvement, these improvement also should be considered as protection range of the present utility model.

The content that this specification is not described in detail belongs to the known prior art of professional and technical personnel in the field.

Claims (3)

1., based on the device transmitting MIPI signal under LPDT pattern that FPGA realizes, it is characterized in that: comprise LPDT control module (1), MIPI module configuration module (2), rgb video input module (3), COMMAND data module (4), MIPI group bag module (5), LPDT cache module (6), LPDT transport module (7) and MIPI level switch module (8);

Described LPDT control module (1) respectively with MIPI module configuration module (2), COMMAND data module (4), LPDT transport module (7) is connected with MIPI level switch module (8), described MIPI module configuration module (2) is connected with COMMAND data module (4) respectively with rgb video input module (3), described COMMAND data module (4) is connected with LPDT cache module (6) by MIPI group bag module (5), described LPDT cache module (6) is connected with MIPI level switch module (8) by LPDT transport module (7), described MIPI group bag module (5) is also connected with LPDT transport module (7), described MIPI level switch module (8) is connected with MIPI module (9).

2. the device transmitting MIPI signal under LPDT pattern realized based on FPGA according to claim 1, is characterized in that: described rgb video input module (3) has two buffer areas.

3. the device transmitting MIPI signal under LPDT pattern realized based on FPGA according to claim 1 and 2, is characterized in that: the video transfer signal that described rgb video input module (3) receives is LVDS vision signal.