CN208156657U - A kind of conversion circuit of TLK2711 coffret and Camera-Link coffret - Google Patents
A kind of conversion circuit of TLK2711 coffret and Camera-Link coffret Download PDFInfo
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- CN208156657U CN208156657U CN201820353941.7U CN201820353941U CN208156657U CN 208156657 U CN208156657 U CN 208156657U CN 201820353941 U CN201820353941 U CN 201820353941U CN 208156657 U CN208156657 U CN 208156657U
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- 238000006243 chemical reaction Methods 0.000 title claims abstract description 29
- 230000005540 biological transmission Effects 0.000 claims abstract description 34
- 238000012545 processing Methods 0.000 claims abstract description 8
- 238000003860 storage Methods 0.000 claims description 9
- 238000013139 quantization Methods 0.000 claims description 5
- 238000012546 transfer Methods 0.000 abstract description 3
- 230000006798 recombination Effects 0.000 description 7
- 238000005215 recombination Methods 0.000 description 7
- 238000003384 imaging method Methods 0.000 description 6
- 238000009826 distribution Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
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- 238000004891 communication Methods 0.000 description 3
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4072—Drivers or receivers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/38—Universal adapter
- G06F2213/3852—Converter between protocols
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The utility model provides the conversion circuit of a kind of TLK2711 coffret and Camera-Link coffret, including serial mode input unit, FPGA unit and data outputting unit;Serial mode input unit includes that external connector and at least a piece of TLK2711 receive chip;FPGA unit includes that the one-to-one processing unit of chip is received with TLK2711, and processing unit includes input logic unit, FIFO and output logic unit;Data outputting unit includes that the one-to-one Camera-Link transmission chip of chip and Camera-Link interface are received with TLK2711;TLK2711 receives chip and connects with external connector;The input terminal of input logic unit is connect with the TLK2711 output end for receiving chip;The input terminal of FIFO is connect with the output end of input logic unit;The output end of the input terminal and FIFO that export logic unit connects.The utility model solves actual application problem of the TLK2711 data transmission interface to Camera-Link standard image transfer interface conversion.
Description
Technical field
The utility model belongs to high speed data transfer field, is related to conversion skill of the high-speed serial data to high-speed parallel data
Art field, the especially conversion circuit of TLK2711 coffret and Camera-Link coffret.
Background technique
With the development of Chinese Space remote sensing technology, satellite remote sensing increasingly shows high time resolution, high spatial point
The development trend of resolution and high spectral resolution, load data type is more and more diversified, and data volume is increasing, leads to data
Rate, bandwidth etc. by past several Mbps develop at present number Gbps it is even higher.Data transmission also from conventionally employed multichannel LVDS simultaneously
Gradually transition is more high bandwidth, higher reliability interface to row coffret, such as based on high speed serialization/unstring transceiver TLK2711
Application, unicast communication rate is up to 2.5Gbps, while TLK2711 uses motor synchronizing communication mode, utilizes clock and data
Recovery technology replaces synchronous transmitting data and clock, efficiently solves the problems, such as signal and clock skew;In addition, using serial logical
Letter technology makes equipment and cable distribution more simple, and system rejection to disturbance ability is stronger.
The application of TLK2711 facilitates spaceborne high-resolution imaging data transmission, and exists for spaceborne high-resolution imaging equipment
Ground demonstration Qualify Phase but can not directly establish a connection with acquisition storage computer, and (computer general-purpose interface is simultaneously at present
Without this Novel Delivery interface), and Camera-Link interface develops with the technology of many years, it is upper non-in Image Acquisition transmission
It is often mature, and there are a large amount of industrialized Camera-Link to turn PCI/PCI-E capture card in the market.Therefore, it designs a kind of efficient
Realtime image data interface conversion circuit, realize and TLK2711 data-interface be converted to the number of standard Camera-Link agreement
It is particularly important according to interface, and advantageous technical support can be provided for high-resolution imaging technology.
Summary of the invention
In order to realize that high-speed data universal serial bus TLK2711 interface and Camera-Link interface protocol are converted, this is practical new
Type provides the conversion circuit of a kind of TLK2711 coffret and Camera-Link coffret, which is easy to real
It is existing, it is shown for the TLK2711 real-time storage for transmitting data and provides a kind of new technological means and method on computers.
The technical solution of the utility model is as follows:
A kind of conversion circuit of TLK2711 coffret and Camera-Link coffret, is characterized in that:Packet
Include serial mode input unit, FPGA unit and data outputting unit;
The serial mode input unit includes that external connector and at least a piece of TLK2711 receive chip;
The FPGA unit includes receiving the one-to-one processing unit of chip with TLK2711, and the processing unit includes
Input logic unit, FIFO and output logic unit;
The data outputting unit include received with TLK2711 the one-to-one Camera-Link transmission chip of chip and
Camera-Link interface;
The TLK2711 receives chip and connects with external connector;
The input terminal of the input logic unit is connect with the TLK2711 output end for receiving chip, the data that will be transmitted
It is converted into the data mode using pixel as unit;
The input terminal of the FIFO is connect with the output end of input logic unit, carries out data buffer storage by pixel;
The input terminal of the output logic unit and the output end of FIFO connect, export the output end of logic unit with
The input terminal of Camera-Link transmission chip connects, and exports logic unit for data according to the size and quantization of real image
Number generates row synchronization, frame synchronization, data valid signal and data and is sent to by Camera-Link Data Transport Protocol
Camera-Link transmission chip;
The Camera-Link interface is connected with Camera-Link transmission chip.
Further, in order to output logic unit send command word with to output image format size be adjusted, institute
The conversion circuit of the TLK2711 coffret and Camera-Link coffret stated also wraps control input unit and its connector,
It is described control input unit output end with output logic unit input terminal connect, it is described control input unit input terminal and
The output end of connector connects, and the input terminal of the connector is used for slave computer or calculating and stores the output end company of equipment
Connect, i.e., described connector is also a kind of external connector, control the input terminal of input unit by connector and slave computer or
The output end of computer memory device connects.
Further, the external connector is MKHS connector.
Further, the model XC4VSX55-10FF1148I of the FPGA.
Further, the Camera-Link transmission chip uses DS90CR287 chip.
Further, Camera-Link interface is MDR26 standard interface.
Compared with prior art, advantage is the utility model:
1, the utility model use FPGA unit, setting with TLK2711 receive the one-to-one processing unit of chip (including
Input logic unit, FIFO and output logic unit) so that input data is converted into the data mode using pixel as unit, press
Pixel carries out data buffer storage, generates row synchronization, frame synchronization, data valid signal and data, and building forms TLK2711 coffret
With the conversion circuit between Camera-Link coffret, solves TLK2711 data transmission interface and marked to Camera-Link
The actual application problem of quasi- image transmitting interface conversion provides a kind of new for the output of current high-resolution imaging instrument mass data
Hardware structure.
2, the conversion circuit of TLK2711 coffret provided by the utility model and Camera-Link coffret can be with
The image size of Camera-Link output interface is configured by the instruction of control input unit, so that the conversion circuit has one
Fixed versatility, it is the utility model is designed reasonably, reliable, the high-speed real-time transmission of 2.98Gbps bandwidth can be completed.
3, the conversion circuit of TLK2711 coffret and Camera-Link coffret provided by the utility model, has
Image resolution ratio is high, real-time is good, the bit error rate is low;And there is small in size, easy to carry, simple and convenient, stable working performance etc.
Plurality of advantages.
4, the conversion circuit of TLK2711 coffret provided by the utility model and Camera-Link coffret has
Broad application prospect, may be also used in as:It is high-resolution imaging spectrometer, tridimensional mapping camera, big bandwidth Visible Light Camera, short
In the equipment such as wave infrared camera.
5, the economic, practical property of the utility model is good, and PCI-E image pick-up card is widely used in board collocation in the market can
Easily to perform image display, store, user, which does not need to spend a lot of time and energy again, develops special acquisition display software.
Detailed description of the invention
Fig. 1 is the utility model application example schematic illustration;
Fig. 2 is the composition block diagram of the utility model conversion circuit;
Fig. 3 is the composite structural diagram of the utility model embodiment conversion circuit.
Specific embodiment
The utility model is described in detail combined with specific embodiments below.
As shown in Figure 1, the utility model is mainly for TLK2711 data transmission interface to Camera-Link image data
Coffret conversion circuit is designed, and realizes TLK2711 data transmission interface to Camera-Link standard image transfer interface
Conversion.
As Figure 2-3, high speed data transmission interface conversion circuit board provided by the utility model, including FPGA are mono-
Member, FLASH storage unit, serial mode input unit, data outputting unit, control input unit, crystal oscillator unit, power supply and distribution list
Member composition.
(1) serial mode input unit
Serial mode input unit is received chip and is formed by interface connector, TLK2711, and it is height that TLK2711, which receives chip,
Fast serial/unstring transceiver;In concrete application case study on implementation, connector uses the MKHS connector of AirBorn company production, root
According to requirement of engineering design in used 2 TLK2711 to receive chips, monolithic work clock 100Mhz;2 TLK2711 receive core
The high-speed serial data respectively inputted is decoded as 16bit parallel data, 1 road 100Mhz respectively and compiled with road clock, 2 road K/D by piece
Code control signal (this 2 road signal according to originating data format protocol, for judging whether it is valid data);TLK2711 is received
Data flow is exported by way of bus after serial data is unstringed and carries out data processing to FPGA unit by chip.
(2) FPGA unit
FPGA unit receives data, clock and the control signal of serial mode input unit input, and FPGA passes through internal fortune
Its internal input logic unit of row software transfer realizes data recombination, after the data of recombination are stored into its internal storage FIFO
In module, for inside output logic unit unit by data according to the size and quantization digit of real image, generation row synchronization, frame are same
Step, data valid signal and data are simultaneously sent to data outputting unit by Camera-Link Data Transport Protocol.Specific to this reality
With in a novel practical application example, Xilinx company FPGA model XC4VSX55-10FF1148I has been selected, inside
Input logic unit is that the data of 16bit are split as 12bit again according to originator high-resolution imaging instrument data transmission format
Deep each pixel so that for data by pixel preservation, i.e. FIFO bit wide is set as 12bit when FIFO is saved, locating depth according to
Image size is specifically arranged;TLK2711 receives the received data of chip 1 by data recombination, FIFO caching, output logic unit
After be sent to Camera-Link transmission chip 1, TLK2711 receive the received data of chip 2 by data recombination, FIFO caching,
Camera-Link transmission chip 2 is sent to after output logic unit;Exporting logic unit is by image data according to Camera-
Link video transmission protocol is sent, and using Medium format in present case, every channel exports 1 tunnel synchronization signal of row, 1 respectively
Road frame synchronization, 1 circuit-switched data useful signal, 24bit Parallel image data (2 pixels), 1 road clock 80Mhz.
FPGA unit also needs the control command of response control input unit and gives response in time, is adjusted according to command word
Camera-Link effective image size (i.e. setting image is arranged by m row × n) is exported, so that the utility model is with preferably general
Adaptive.
Input logic unit in FPGA unit carries out data recombination to received data flow respectively;Part this field skill
Art personnel carry out data recombination according to the transmission agreement of data transmitting terminal, i.e., TLK2711 is received to the 16bit of chip transmission
Data are successively converted into pixel one by one;Such as the image of 12bit quantization, every 4 are needed if according to 16bit transmission so
A pixel forms 3 16bit data, and point 3 beats successively transmit, then data recombination seeks to the data weight 3 beats
Group is 4 pixels.This transmits the extensive of image according to this field designer's custom images transformat, that is, to customized
It is multiple.
Logic unit is exported in FPGA unit by pixel according to the size and quantization digit of real image, generate row it is synchronous,
Frame synchronization, data valid signal and data are simultaneously sent to Camera-Link transmission core by Camera-Link Data Transport Protocol
Piece.Part those skilled in the art can implement according to the specific format of the Camerlink transport protocol of selection, such as use
Base, Medium, Full, the design system only supports Base or Medium format, and specifically actually selects in an implementation
Medium mode.
Control input unit sends command word to FPGA to realize to output image format size adjustment;Control input unit
The command word sent from slave computer/computer memory device by serial ports is received, command word can customize, and run in FPGA
Logic unit control command based on the received, and modify it accordingly and give the dedicated transmission chip of Camera-Link interface protocol
Row useful signal, frame useful signal, data valid signal and data, to reach the adjustment to image output size.
(3) data outputting unit
Data outputting unit is made of out connector Camera-Link interface, Camera-Link transmission chip, work
It needs power supply and distribution unit to provide operation level in the process, and receives 1 tunnel synchronization signal of FPGA transmission, 1 tunnel frame synchronization, 1 number
According to useful signal, 24bit Parallel image data, 1 tunnel clock signal.2 DS90CR287 compositions are used specific to the design
Medium format is as transmission chip, work clock 80Mhz;Camera-Link interface uses MDR26 standard interface.
(4) input unit is controlled
Control input unit is used to send command word to FPGA unit to realize to the adjustment of output image format size, adopts
Use serial communication.Specific to present case, controls input unit and be made of difference transceiver DS90LV019, baud rate 9600 is right
Outer connector part is inputted by the general Camera-Link transmission cable being incorporated on MDR26 interface.
(5) FLASH storage unit
FLASH storage unit is a kind of non-volatile, electrically erasable programmable read-only memory, is mainly used to open for FPGA
It is dynamic that program load is provided.Specific to present case, the dedicated FLASH configuration chip XCF32P of Xilinx company has been used.
(6) crystal oscillator unit
The crystal oscillator provides work clock for FPGA, is the source clock of entire board work.Specific to present case, use
100Mhz external crystal-controlled oscillation.
(7) power supply and distribution unit
Power supply and distribution unit includes power interface connector, several pieces power conversion chips, is provided for the work of entire circuit devcie
The power supply of required multiple types.
Claims (7)
1. a kind of conversion circuit of TLK2711 coffret and Camera-Link coffret, it is characterised in that:Including data
Serial input unit, FPGA unit and data outputting unit;
The serial mode input unit includes that external connector and at least a piece of TLK2711 receive chip;
The FPGA unit includes that the one-to-one processing unit of chip is received with TLK2711, and the processing unit includes input
Logic unit, FIFO and output logic unit;
The data outputting unit include received with TLK2711 the one-to-one Camera-Link transmission chip of chip and
Camera-Link interface;
The TLK2711 receives chip and connects with external connector;
The input terminal of the input logic unit is connect with the TLK2711 output end for receiving chip, converts the data of transmission to
Using pixel as the data mode of unit;
The input terminal of the FIFO is connect with the output end of input logic unit, carries out data buffer storage by pixel;
The input terminal of the output logic unit and the output end of FIFO connect, and export the output end and Camera- of logic unit
The input terminal of Link transmission chip connects, and output logic unit according to the size and quantization digit of real image, generates data
Row synchronization, frame synchronization, data valid signal and data are simultaneously sent to Camera-Link by Camera-Link Data Transport Protocol
Transmission chip;
The Camera-Link interface is connected with Camera-Link transmission chip.
2. the conversion circuit of TLK2711 coffret and Camera-Link coffret according to claim 1, special
Sign is:
It further include control input unit and its connector, the input of the output end for controlling input unit and output logic unit
End connection, the input terminal of the control input unit and the output end of connector connect, the input terminal of the connector be used for
Slave computer or calculating and the output end connection for storing equipment.
3. the conversion circuit of TLK2711 coffret and Camera-Link coffret according to claim 1 or 2,
It is characterized in that:The external connector is MKHS connector.
4. the conversion circuit of TLK2711 coffret and Camera-Link coffret according to claim 1 or 2,
It is characterized in that:The model XC4VSX55-10FF1148I of the FPGA.
5. the conversion circuit of TLK2711 coffret and Camera-Link coffret according to claim 1 or 2,
It is characterized in that:The Camera-Link transmission chip uses DS90CR287 chip.
6. the conversion circuit of TLK2711 coffret and Camera-Link coffret according to claim 1 or 2,
It is characterized in that:Camera-Link interface is MDR26 standard interface.
7. the conversion circuit of TLK2711 coffret and Camera-Link coffret according to claim 1 or 2,
It is characterized in that:
The locating depth for the pixel that the input logic unit is converted is 12bit.
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CN201820353941.7U Withdrawn - After Issue CN208156657U (en) | 2018-03-07 | 2018-03-15 | A kind of conversion circuit of TLK2711 coffret and Camera-Link coffret |
CN201810215519.XA Active CN108319560B (en) | 2018-03-07 | 2018-03-15 | Conversion circuit of TLK2711 transmission interface and Camera-Link transmission interface |
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CN109413354B (en) * | 2018-11-19 | 2021-08-06 | 天津津航技术物理研究所 | Infrared detector interface switching device |
CN109491940A (en) * | 2018-12-18 | 2019-03-19 | 中国科学院西安光学精密机械研究所 | A kind of conversion circuit and conversion method of TLK2711 coffret and USB3.0 coffret |
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US7519297B2 (en) * | 2002-11-08 | 2009-04-14 | Finisar Corporation | Cable television system with separate radio frequency hub and ethernet hub |
CN101958820B (en) * | 2010-08-11 | 2015-02-11 | 康佳集团股份有限公司 | Multi-channel RS-232 high-speed remote transmission circuit |
TWM455257U (en) * | 2011-11-03 | 2013-06-11 | Etron Technology Inc | Reconfigurable high speed memory chip module and electronics system device |
CN102662893B (en) * | 2012-03-22 | 2014-12-24 | 中国科学院长春光学精密机械与物理研究所 | Multifunctional bus data conversion system |
CN105376512A (en) * | 2015-11-18 | 2016-03-02 | 武汉精测电子技术股份有限公司 | Signal conversion device based on programmable logic device |
CN107426551B (en) * | 2016-05-24 | 2021-05-14 | 中国科学院长春光学精密机械与物理研究所 | FPGA-based full-mode Cameralink digital image optical transceiver receiving end and transmitting end |
CN206686300U (en) * | 2017-05-02 | 2017-11-28 | 张卫国 | A kind of image enhaucament display system |
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