CN201037989Y - Synchronous all-colorful LED display control device - Google Patents

Synchronous all-colorful LED display control device Download PDF

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Publication number
CN201037989Y
CN201037989Y CNU2007200366969U CN200720036696U CN201037989Y CN 201037989 Y CN201037989 Y CN 201037989Y CN U2007200366969 U CNU2007200366969 U CN U2007200366969U CN 200720036696 U CN200720036696 U CN 200720036696U CN 201037989 Y CN201037989 Y CN 201037989Y
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China
Prior art keywords
led display
card
circuit
main control
hub
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Expired - Fee Related
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CNU2007200366969U
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Chinese (zh)
Inventor
周益
于力行
陈小平
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Nanjing Doublestar Electronic And Technology Co Ltd
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Nanjing Doublestar Electronic And Technology Co Ltd
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Abstract

The utility model discloses an in-phase whole color LED display control device, which is connected with a host computer control bus. A main control board, an HUB scanning card and an LED display screen bus module are also arranged. The main control board and the HUB scanning card consist respectively of an EPGA or CPLD chip circuit. The input end of the EP-GA chip of the main control board is connected with the output end of the display card; the output end of the EPGA of the HUB scanning card is connected with the LED display screen bus end. The control system bus of the host computer is connected with the main control board and the circuit of the EPGA chip of the HUB scanning card. The LED display screen end and the driving circuit are connected with the LED display screen. A PCI interface and a USB interface are arranged in the interface circuit of the main control board. The utility model has quite simple circuit design, which not only guarantees display effect but also saves cost. As advanced FPGA technique is adopted, long-distance management of the main control card and the HUB scanning & receiving card are realized and system edition can be updated through the Internet.

Description

Synchronous all-colour LED display control unit
Technical field
The utility model belongs to LED display control system field, is specifically related to a kind of sync control device of full-color LED display screen.
Background technology
The LED on-screen display system mainly is made up of whistle control system, scanning and driving circuit and LED screen.The control core of LED display is the LED display control system, at present modular design structures that adopt more, comprise governor circuit and scan control circuit, the task of governor circuit is to generate or receive LED to show that required digital signal is (by derived digital signal such as PC, videos such as DVD send), and each parts of control whole LED display system, by the certain division of labor and timing coordination work.After data to be displayed is ready, governor circuit is at first sent first line data into shift register and is latched, then by the line-scan circuit gating of scan control circuit, after lighting a period of time, first row of led array in kind shows subsequent rows again, to the displaying contents of finishing a frame, so move in circles, principle according to persistence of vision, can realize allowing naked eyes significantly not pause and feel, if display area is very big, data quantity transmitted is also very big, then can increase the response time of display system, cause flicker, for improving visual effect, can the parallel demonstration of subregion.
1, LED display control system principle
On tradition, the LED display control system mainly is divided into synchronously and asynchronous two types.Its differentiation standard mainly is the relation between signal source, program source and screen body show.If screen body and signal source are synchronized to then are referred to as the synchronous LED display screen control system, otherwise then are called the asynchronous LED display screen control system.The derived digital signal that synchronous control system is general is the video card image information of computing machine or directly adopts video signal source that master control system adopts the hardware mapping mode that picture material is shielded the body circuit by a series of processing rear drives such as collection, storage, format conversion.The bandwidth of synchronous control system is big, information processing capability by force, generally can both be realized high gray scale and high refresh rate, but cost is higher, system complex, take off not open signal source; Simple and convenient, the low price of asynchronous system, but effect a little less than, generally can't realize gray scale.
2, field-programmable FPGA/CPLD control technology
During the not high giant-screen of design monochrome and gray shade scale, can adopt SCM Based design proposal, realize that the dynamic stunt of highly difficult picture and text shows and during the multi-grey level demonstration, then should select based on the Design of Programmable Logic Parts scheme or based on the design proposal of embedded technology.Resource is more and more abundanter in the sheet of on-site programmable gate array FPGA chip, many device insides are all integrated RAM piece.These RAM pieces can become single port RAM by software setting, and two-port RAM etc. satisfy the needs that system handles data.Because LED display video signal frequency height, data volume is big, and requirement can be handled in real time, and the Digital Logic complexity of screen circuit adopts FPGA/CPLD design control circuit can simplify synchronous LED control system structure, is convenient to debugging.The FPGA/CPLD device can be to synchro control wherein, principal and subordinate's control, and a large amount of circuit such as read-write control and gray modulation carry out integrated, and it is more quick that view data is handled, and image is more stable, and the system architecture compactness, and functional reliability improves.
Summary of the invention
The purpose of this utility model is, a kind of synchronous all-colour LED display control unit is provided, and simplifies the structure of LED display synchronous control system, and pci interface and USB interface are provided, and makes things convenient for the user to select different communication modes as required.
The technical solution of the utility model is: synchronous all-colour LED display control unit, connect by the host computer control bus, and be provided with master control borad, the HUB scanning card, the LED display bus module, each is made of master control borad and HUB scanning card a FPGA or CPLD chip circuit, the fpga chip input end of master control borad connects the video card output port, the fpga chip circuit output end of HUB scanning card connects the LED display bus port, host computer control system bus connects the interface circuit of master control borad and HUB scanning card fpga chip, and LED display port and driving circuit connect LED display.The fpga chip circuit can be replaced by the CPLD chip circuit.
The utility model further improves: the interface circuit of master control borad is provided with pci interface and USB interface.
The utility model is made up of main control card and HUB scanning card and card extender, supports real image element and virtual pixel.Main controller is provided with pci interface and USB interface, and the user can select different communication modes as required.The utility model integrated use singlechip technology and FPGA/CPLD technology, utilize the processing of chip microcontroller data, storage and communication function, utilize FPGA/CPLD to realize the gray modulation of data, functions such as scanning demonstration, this scheme is not very high to the resource requirement of single-chip microcomputer and FPGA/CPLD, circuit design also is easier to relatively, both guarantee display effect, saved design cost again.Owing to used senior FPGA technology, but telemanagement main controller and HUB scanning receiving card upgrade the control system version by INTERNET.
Description of drawings
Fig. 1 is the synchronous control system synoptic diagram.
Fig. 2 is common asynchronous control system synoptic diagram.
Fig. 3 is the utility model master control borad fpga chip circuit block diagram.
Fig. 4 is the utility model HUB scanning card fpga chip circuit block diagram.
Fig. 5 is the utility model master control borad schematic diagram.
Fig. 6 is the utility model HUB scanning card schematic diagram.
Fig. 7 is the utility model system chart.
Embodiment
The utility model device is finished repertoire on the PCB motherboard.Be equipped with on the motherboard: 1, master control borad part; 2, HUB scanning card, be used to finish the screen data structural adjustment, transmit, refresh, colour correction handles; 3, electric power system is used to finish the conversion and the supply of system power supply; 4, control system bus is used for data transfer and control between master control borad and HUB scanning card FPGA device and the peripheral interface; 5, master control borad is provided with pci interface and USB interface, can select different communication modes, and the LED display interface is connected with the screen of going up that driving is used for video data.
As shown in Figure 3, the utility model master control borad fpga chip circuit is divided into original state assignment module, and data are accepted module, data outputting module, storer handover module.Wherein original state assignment module is connected with computer PCI bus, by with the communication of the pci bus of computing machine, the main control module is carried out the assignment of original state, determine the mode that shows, coordinate of data cutout or the like; Data reception module is imported the termination video card, the output terminal connected storage, and its function mainly is the data that acceptance is transmitted by video card, and according to the definite data that intercept of the control word of main control module transmission, and a data of intercepting is issued the RAM that accepts data at this moment; The data outputting module input end links to each other with storer, and its major function is the control reading of data from RAM according to the main control module, and data conversion is become the required form output of output; The input end of storer commutation circuit links to each other with video card, and its function is to determine the opportunity of switching according to the frame synchronizing signal of video card, and the assurance display module can be got correct data.Fig. 5 is the whole schematic diagram of master control borad.
Fig. 4 is the utility model HUB scanning card fpga chip circuit block diagram, comprises buffer circuit, colour correction, storer and clock circuit etc., and Fig. 6 is the whole schematic diagram of HUB scanning card.
The utility model is supported the pci bus configuration, adopts four layers of pcb board design of high precision, effectively reduces electromagnetic interference (EMI), can realize the both-way communication of grid line (surpassing five classes) or optical fiber, and two card 8G bandwidth are supported 2048 * 1280 * 48 * 60HZ of resolution transmission.Simultaneously, all devices that adopt in the control system are lead-free product (seeing each product certification book), in process of production in strict accordance with leadless process production, have therefore guaranteed that this product meets the requirement of the RoHS of European Union leadless environment-friendly.The software kit that my company releases simultaneously is flexible and convenient more, makes that new system is more complete.
1,1000BaseT gigabit communication transmission technology:
1) UTP5E netting twine can be supported the data transmission of two-way 1Gbps, configurable two netting twines of main controller simultaneously.Every netting twine can provide 1Gbps snaps into the HUB scanning card from master control transmission bandwidth with transmitting and displaying information and User Defined data (as sound, screen body power supply control or the like), every netting twine can also provide 1Gbps to snap into the transmission bandwidth of main controller from HUB scanning simultaneously, can monitor the duty of LED screen in real time, as: the on off operating mode of each point on the screen body (needing the LED chip for driving to support or the design of special screen body), whether the working power of display screen is unusual, can also return the monitor message of camera.
2) hop of main controller adopts the electromagnetic isolation technology, the plug of tenaculum electric heating; Support the DVI interface, support DVI video card and multimedia card simultaneously, support single mode, multimode optical fiber transmission, transmit and the longlyest reach 10 kilometers; Cost that can be cheap realizes the relaying of data easily, distribution, optical fiber long-distance transmissions.
2, senior FPGA technology is used
The utility model adopts the single chip VLSI design as main control chip, used embedded DSP technology and the embedded 32bit processor of XILINX FPAG: each unit screen maximum can reach every kind of color 16K level gray scale, and the refreshing frequency maximum can reach more than the 1000HZ.
1) realized the conversion of display screen chrominance space, made that the color rendition degree of display screen is better.
2) can the telemanagement main controller and HUB scanning receiving card, upgrade the control system version by INTERNET.
3) HUB plate scanning card flexible configuration can work alone, and shows client LOGO, can be according to the number of concrete screen body and performance requirement adjustment control pixel, can support single casing pattern, and can show the nearly custom images of 256 width of cloth, and support screen body examination examination function.
3, the advanced displays chip for driving is supported
The utility model is supported various advanced feature display screen drive chips, and highly integrated special driving chip integrates row, column control and some peripheral drive circuits, make the unit control, drive more simple.The stability of system is reliable:
1) support pointwise, adjust, can proofread and correct each point by the chip current gain, the chromatic aberration correction of each casing and whole screen, client's control information can freely be selected to be stored in the PC, on the main controller and on the HUB scanning card, makes things convenient for operation and maintenance.
2) support the single-point on off operating mode to detect in real time, in real time passback.
3) support built-inly 12,16BIT PWM chip makes the contrast of display screen higher, and color is more true to nature, and the EMI that has reduced system simultaneously disturbs.During no signal, display screen is closed automatically; Support the screen locking function.
4, other functional characteristics
The user graphically illustrates out the drives structure of screen body unit plate, and system just can produce the driving sequential consistent with shielding body automatically.Support main controller control polylith screen, but the duty combination in any of polylith screen, demonstrations synchronously, independent play-out etc. can pass through quick button, quick switching.Support the input of various video signal source; Support 256 grades of automatic brightness adjustment functions; Support no toggle switch to use, all are provided with all can be by the computer software setting.Support single mode, multimode optical fiber transmission, transmit and the longlyest reach 10 kilometers; The Control Software friendly interface, simple to operate, support software is adjusted function, can adjust the position dimension of display screen displaying contents on monitor, the brightness of adjustable screen body, color.
The utility model is the full-color synchronous giant-screen control system of core with FPGA, the reliability height of hardware, the programming of greatly having simplified simultaneously software realizes that the high speed characteristics of senior FPGA technology device makes that the refresh rate of ultra-large LED display is guaranteed.The use of ISP technology, upgrade the control system version by INTERNET, make the actual effect of system design greatly improve, the nucleus module of FPGA sweep circuit is by PC display card interface, by means of computer platform, can be advantageously applied to real-time animation and TV image demonstration field at high speed.

Claims (2)

1. synchronous all-colour LED display control unit, connect by the host computer control bus, and be provided with master control borad, HUB scanning card, LED display bus module, each is made of a FPGA or CPLD chip circuit to it is characterized in that master control borad and HUB scanning card, the fpga chip input end of master control borad connects the video card output port, the fpga chip circuit output end of HUB scanning card connects the LED display bus port, host computer control system bus connects the interface circuit of master control borad and HUB scanning card fpga chip, and LED display port and driving circuit connect LED display.
2. synchronous all-colour LED display control unit according to claim 1 is characterized in that the interface circuit of master control borad is provided with pci interface and USB interface.
CNU2007200366969U 2007-04-10 2007-04-10 Synchronous all-colorful LED display control device Expired - Fee Related CN201037989Y (en)

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101764981A (en) * 2008-12-23 2010-06-30 康佳集团股份有限公司 High-resolution video image controller for embedded LED display screen
WO2011127673A1 (en) * 2010-04-16 2011-10-20 深圳市创凯电子有限公司 Method for displaying real-time multiple pictures on full-color led dot matrix and device thereof
CN104575308A (en) * 2015-01-06 2015-04-29 刘涵 High-definition p5 LED (Light Emitting Diode) outdoor full-color display screen
CN105429838A (en) * 2015-12-31 2016-03-23 西安诺瓦电子科技有限公司 Led display system
CN106157888A (en) * 2016-08-31 2016-11-23 深圳市灵星雨科技开发有限公司 A kind of SOM display control program
CN106686803A (en) * 2016-11-28 2017-05-17 广西师范大学 FPGA-based LED landscape lamp control system
CN109830206A (en) * 2019-01-31 2019-05-31 重庆邮电大学 A kind of method that synchronous LED screen receives DMB warning information
CN110718188A (en) * 2019-11-20 2020-01-21 桂林海威科技股份有限公司 FPGA-based display screen control card output signal conversion method and device
CN111767177A (en) * 2020-05-15 2020-10-13 广州视源电子科技股份有限公司 Test method, test device, test equipment and storage medium for LED display screen control card

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101764981A (en) * 2008-12-23 2010-06-30 康佳集团股份有限公司 High-resolution video image controller for embedded LED display screen
CN101764981B (en) * 2008-12-23 2013-10-30 康佳集团股份有限公司 High-resolution video image controller for embedded LED display screen
WO2011127673A1 (en) * 2010-04-16 2011-10-20 深圳市创凯电子有限公司 Method for displaying real-time multiple pictures on full-color led dot matrix and device thereof
CN104575308A (en) * 2015-01-06 2015-04-29 刘涵 High-definition p5 LED (Light Emitting Diode) outdoor full-color display screen
CN105429838A (en) * 2015-12-31 2016-03-23 西安诺瓦电子科技有限公司 Led display system
CN105429838B (en) * 2015-12-31 2018-11-30 西安诺瓦电子科技有限公司 LED display system
CN106157888A (en) * 2016-08-31 2016-11-23 深圳市灵星雨科技开发有限公司 A kind of SOM display control program
CN106686803A (en) * 2016-11-28 2017-05-17 广西师范大学 FPGA-based LED landscape lamp control system
CN109830206A (en) * 2019-01-31 2019-05-31 重庆邮电大学 A kind of method that synchronous LED screen receives DMB warning information
CN110718188A (en) * 2019-11-20 2020-01-21 桂林海威科技股份有限公司 FPGA-based display screen control card output signal conversion method and device
CN111767177A (en) * 2020-05-15 2020-10-13 广州视源电子科技股份有限公司 Test method, test device, test equipment and storage medium for LED display screen control card
CN111767177B (en) * 2020-05-15 2024-03-26 西安青松光电技术有限公司 Test method, device and equipment of LED display screen control card and storage medium

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GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080319

Termination date: 20100410