CN206686300U - A kind of image enhaucament display system - Google Patents
A kind of image enhaucament display system Download PDFInfo
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- CN206686300U CN206686300U CN201720475713.2U CN201720475713U CN206686300U CN 206686300 U CN206686300 U CN 206686300U CN 201720475713 U CN201720475713 U CN 201720475713U CN 206686300 U CN206686300 U CN 206686300U
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Abstract
Technical field of image processing is the utility model is related to, especially a kind of image enhaucament display system.It includes power module and the Camera Link interface modules for the image analoging signal of Camera Link standards to be converted to COMS image digital signals being linked in sequence, the data coding module for being decoded to the COMS image digital signals received and the interface logic of forward process is converted to the image analoging signal of Camera Link standards and externally exported with time-sequence control module, for the COMS image digital signals by interface logic and time-sequence control module output to be carried out to the digital signal processor of enhancing processing and the COMS viewdata signals for digital signal processor to be exported.The design of layout, control logic that the utility model passes through the component units to whole system and the function of making full use of each component units, it is separate with sendaisle that achievable data receive passage, both can use simultaneously, it can be used alone again, substantially increase flexibility and the integrated level of system.
Description
Technical field
Technical field of image processing is the utility model is related to, especially a kind of image enhaucament display system.
Background technology
Known, image enhancement technique is a kind of image processing techniques for referring to strengthen the useful information in image, and its is main
Purpose is to improve the visual effect of image, and by emphasizing the entirety or local characteristicses of image, original unsharp image is become
It is clear or emphasize some features interested, the difference in expanded view picture between different objects feature, suppress uninterested spy
Sign, it is allowed to improve picture quality, abundant information amount, strengthens image interpretation and recognition effect, meet the needs of some special analysis.
Existing image processing system generally existing system architecture is complicated, integrated level is low, very flexible, interface are few, image
Strengthen the problems such as treatment effect is not notable；Therefore, there is greatly technological improvement space.
Utility model content
For above-mentioned the shortcomings of the prior art, the purpose of this utility model is to provide a kind of image enhaucament display system
System.
To achieve these goals, the utility model adopts the following technical scheme that：
A kind of image enhaucament display system, what it included being linked in sequence is used for the image simulation of Camera Link standards
Signal is converted to the Camera Link interface modules of COMS image digital signals, for believing the COMS image digitizations received
Number decoded and the interface logic of forward process with time-sequence control module, for will be defeated by interface logic and time-sequence control module
The COMS image digital signals gone out carry out strengthening the digital signal processor of processing and for digital signal processor to be exported
The COMS viewdata signals data encoding mould that is converted to the image analoging signal of Camera Link standards and externally exports
Block；It also includes one and is used for respectively at Camera Link interface modules, interface logic and time-sequence control module, data signal
Manage device and the power module of data coding module power supply；The digital signal processor is a TMS320C6455 type signal transactings
Chip, the Camera Link interface modules include at least one MDR26 types signal connector and at least one are connected with signal
The DS90CR288 type interface conversion chips that device connects one to one, the interface logic include one with time-sequence control module
XC7K325T type fpga chips, the data coding module include a DS90CF383 type interface conversion chips.
Preferably, it also includes a COMS image digital signals data progress for being used to receive digital signal processor
The external memory storage of interim storage and one be used for storage image enhancing algorithm routine program storage, the external memory storage and
Program storage is connected with digital signal processor respectively, and the external memory storage is synchronous DRAM, the journey
Sequence memory is Flash Memory type memories.
Preferably, it also includes a communication interface modules for being used to send start stop command to digital signal processor, described
Communication interface modules includes RS442 serial line interfaces.
Preferably, it also include one be used for by the digital video signal of HD-SDI forms and/or SD-SDI forms input to
The SDI interface modules of interface logic and time-sequence control module, the SDI interface modules are including at least one GTX transceivers and extremely
A few SDI for connecting one to one with GTX transceivers and being connected by GTX transceivers with interface logic with time-sequence control module
Cable balanced device.
As a result of such scheme, the utility model is turned using MDR26 types signal connector and DS90CR288 types interface
Change chip and may be such that whole interface module can be applied to the data format of different cameral, can be achieved after being decoded via fpga chip
Restructuring and alignment operation to data, it is easy to subsequent treatment and the storage forwarding of data；Carried using digital signal processor
The hardware carrier of confession can ensure to view data enhancing processing previously according to needing to be implanted into different algorithm for image enhancement programs
Effect and applicability and the flexibility for enhancing system；In addition, pass through the layout of the component units to whole system, control logic
Design and make full use of the functions of each component units, it is separate with sendaisle that achievable data receive passage, both may be used
It to use simultaneously, can be used alone again, substantially increase flexibility and the integrated level of system.
Brief description of the drawings
Fig. 1 is the control principle block diagram of the utility model embodiment；
Fig. 2 is the theory diagram of the Camera Link interface modules of the utility model embodiment；
The theory diagram of the SDI interface modules of Fig. 3 the utility model embodiments.
Embodiment
Embodiment of the present utility model is described in detail below in conjunction with accompanying drawing, but the utility model can be by right
It is required that the multitude of different ways for limiting and covering is implemented.
As shown in Figure 1 to Figure 3, a kind of image enhaucament display system that the present embodiment provides, it includes the use being linked in sequence
In the Camera Link interface modules that the image analoging signal of Camera Link standards is converted to COMS image digital signals
A, for the COMS image digital signals received are decoded and the interface logic of forward process and time-sequence control module b,
For the COMS image digital signals by interface logic and time-sequence control module b outputs strengthen to the data signal of processing
Reason device c and the COMS viewdata signals for digital signal processor c to be exported are converted to the figure of Camera Link standards
The data coding module d exported as analog signal and externally；It also include one be used for respectively to Camera Link interface modules a,
The power module e that interface logic is powered with time-sequence control module b, digital signal processor c and data coding module d；Wherein, number
Word signal processor c is a TMS320C6455 type signal processing chips, and Camera Link interface modules a includes at least one
MDR26 types signal connector 1 and at least one DS90CR288 type interface conversion cores to be connected one to one with signal connector 1
Piece 2, interface logic include an XC7K325T type fpga chips with time-sequence control module b, and data coding module d includes one
DS90CF383 type interface conversion chips.
Thus, after whole system is by electricity on power module e, via the COMS of Camera Link interface modules a outputs
Image digital signal can be (slow by the FIFO of interface logic and time-sequence control module b into digital signal processor c video port
Deposit) in, can be by running the image that be pre-stored within digital signal processor c when the full frame of the signal data in FIFO
Enhancing algorithm is handled signal data, and then digital signal processor c is again by data coding module d by the letter after processing
The Camera Link image analoging signals that number is encoded into standard externally export；Wherein, each component units of system are adopted
With relative shaping and independent electronic component, each component units can be integrated on same board simultaneously, for whole system
The highly integrated condition that provides the foundation of system；Can using MDR26 types signal connector 1 and DS90CR288 type interface conversions chip 2
Enable whole interface module to be applied to the data format of different cameral, be can be achieved after being decoded via fpga chip to data
Restructuring and alignment operation, it is easy to subsequent treatment and the storage forwarding of data；The hardware provided using digital signal processor c
Carrier can ensure the effect to view data enhancing processing and increasing previously according to needing to be implanted into different algorithm for image enhancement programs
The applicability of strong system and flexibility.In addition, the design for the layout, control logic for passing through the component units to whole system with
And the function of each component units is made full use of, it is separate with sendaisle that achievable data receive passage, can both make simultaneously
With can be used alone, substantially increase flexibility and the integrated level of system again.
To optimize the performance of whole system to greatest extent, good condition is provided for digital signal processor c operation,
The system of the present embodiment also includes the COMS image digital signal data for being used to receive digital signal processor c and faced
When the external memory storage f and one that stores be used for the program storage g of storage image enhancing algorithm routine, external memory storage f and journey
Sequence memory g is connected with digital signal processor c respectively；Wherein, external memory storage f be synchronous DRAM (such as
DDR2 or DDR3), and program storage g then preferred Flash Memory type memories.In this way, by the design of control function,
It can be entered via the Camera Link interface modules a COMS image digital signals exported by interface logic and time-sequence control module b
In the FIFO (caching) for entering digital signal processor c video port, when the data in FIFO are filled with a line valid pixel, numeral
Signal processor c can move the row view data in external memory storage f video acquisition memory block, when in the memory block
During a view data completely frame, digital signal processor c can run the algorithm for image enhancement program being stored in program storage g,
Handled with completing enhancing to view data, and the video playback that the view data handled is copied to external memory storage f is deposited
In storage area, then in the FIFO of the data-moving in Zai Jianggai areas to digital signal processor c video output, and then pass through
The CameraLink image analoging signals that signal data after processing is encoded into standard by data coding module d externally export.
For ease of carrying out keying control to whole system, the system of the present embodiment also includes one and is used for Digital Signal Processing
Device sends the communication interface modules h of start stop command, and communication interface modules h includes RS442 serial line interfaces.
The form of the view data input interface of horn of plenty whole system, expand systematic difference scope, the present embodiment
System also includes one and is used to input the digital video signal of HD-SDI forms and/or SD-SDI forms to interface logic and sequential
Control module b SDI interface modules k, SDI interface module k includes at least one GTX transceivers 3 and at least one and GTX is received and dispatched
The SDI cables balanced device 4 that device 3 connects one to one and is connected by GTX transceivers 3 with interface logic with time-sequence control module b
(concrete structure of SDI interface modules refers to Fig. 3 and is configured).
Preferred embodiment of the present utility model is the foregoing is only, not thereby limits the scope of the claims of the present utility model,
Every equivalent structure made using the utility model specification and accompanying drawing content or equivalent flow conversion, or directly or indirectly fortune
Used in other related technical areas, similarly it is included in scope of patent protection of the present utility model.
Claims (4)
- A kind of 1. image enhaucament display system, it is characterised in that：What it included being linked in sequence is used for Camera Link standards Image analoging signal is converted to the Camera Link interface modules of COMS image digital signals, for scheming to the COMS received As data signal decoded and the interface logic of forward process and time-sequence control module, for will be by interface logic and sequential control The COMS image digital signals of molding block output carry out strengthening the digital signal processor of processing and for by data signal The data that the COMS viewdata signals of reason device output are converted to the image analoging signal of Camera Link standards and externally exported Coding module；It also includes one and is used for respectively to Camera Link interface modules, interface logic and time-sequence control module, numeral Signal processor and the power module of data coding module power supply；The digital signal processor is believed for a TMS320C6455 types Number process chip, the Camera Link interface modules include at least one MDR26 types signal connector and at least one with letter The DS90CR288 type interface conversion chips that number connector connects one to one, the interface logic include with time-sequence control module One XC7K325T type fpga chips, the data coding module include a DS90CF383 type interface conversion chips.
- A kind of 2. image enhaucament display system as claimed in claim 1, it is characterised in that：It also includes one and is used to believe numeral The external memory storage and one that the COMS image digital signals data that number processor receives carry out interim storage is used for storage image Strengthening the program storage of algorithm routine, the external memory storage and program storage are connected with digital signal processor respectively, The external memory storage is synchronous DRAM, and described program memory is Flash Memory type memories.
- A kind of 3. image enhaucament display system as claimed in claim 2, it is characterised in that：It also includes one and is used to believe to numeral Number processor sends the communication interface modules of start stop command, and the communication interface modules includes RS442 serial line interfaces.
- A kind of 4. image enhaucament display system as any one of claim 1-3, it is characterised in that：It also includes one and used In the digital video signal of HD-SDI forms and/or SD-SDI forms to be inputted to the SDI to interface logic and time-sequence control module Interface module, the SDI interface modules include at least one GTX transceivers and at least one corresponded with GTX transceivers connects The SDI cable balanced devices for connecing and being connected by GTX transceivers with interface logic with time-sequence control module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720475713.2U CN206686300U (en) | 2017-05-02 | 2017-05-02 | A kind of image enhaucament display system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720475713.2U CN206686300U (en) | 2017-05-02 | 2017-05-02 | A kind of image enhaucament display system |
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| Publication Number | Publication Date |
|---|---|
| CN206686300U true CN206686300U (en) | 2017-11-28 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201720475713.2U Expired - Fee Related CN206686300U (en) | 2017-05-02 | 2017-05-02 | A kind of image enhaucament display system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108319560A (en) * | 2018-03-07 | 2018-07-24 | 中国科学院西安光学精密机械研究所 | Conversion circuit of T L K2711 transmission interface and Camera-L ink transmission interface |
-
2017
- 2017-05-02 CN CN201720475713.2U patent/CN206686300U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108319560A (en) * | 2018-03-07 | 2018-07-24 | 中国科学院西安光学精密机械研究所 | Conversion circuit of T L K2711 transmission interface and Camera-L ink transmission interface |
| CN108319560B (en) * | 2018-03-07 | 2024-04-05 | 中国科学院西安光学精密机械研究所 | Conversion circuit of TLK2711 transmission interface and Camera-Link transmission interface |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20171128 Termination date: 20180502 |