CN220305811U - Quantum computer - Google Patents

Quantum computer Download PDF

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CN220305811U
CN220305811U CN202322000862.1U CN202322000862U CN220305811U CN 220305811 U CN220305811 U CN 220305811U CN 202322000862 U CN202322000862 U CN 202322000862U CN 220305811 U CN220305811 U CN 220305811U
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plate
heat conduction
quantum
quantum chip
heat
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请求不公布姓名
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Benyuan Quantum Computing Technology Hefei Co ltd
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Benyuan Quantum Computing Technology Hefei Co ltd
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Abstract

The utility model discloses a quantum computer, which comprises a dilution refrigerator, a quantum chip, a first heat conduction hanging plate and a first heat conduction belt, wherein the quantum chip, the first heat conduction hanging plate and the first heat conduction belt are arranged in a first temperature zone at the bottommost layer of the dilution refrigerator; the packaging box of the quantum chip is mounted on the lower end face of the first heat conduction hanging plate, the upper end face of the first heat conduction hanging plate is fixed on a first cold plate of the first temperature zone, and a plurality of first heat conduction strips are arranged between the first cold plate and the packaging box of the quantum chip and/or the lower end face of the first heat conduction hanging plate. According to the quantum computer, the first heat conduction hanging plate and the first heat conduction belt are arranged between the quantum chip and the first cold plate, so that the quantum chip is efficiently conducted between the quantum chip and the first cold plate under the condition that the quantum chip is not attached to the surface of the first cold plate, and the extremely low temperature working environment of the quantum chip is ensured.

Description

Quantum computer
Technical Field
The utility model relates to the technical field of quantum computers, in particular to a quantum computer.
Background
The quantum computing is a brand new computing mode, the computing capability far higher than that of a classical computer can be obtained by utilizing principles of superposition, entanglement and the like of quantum mechanics, the research and development of a quantum computer at present can be mainly summarized into two types, namely superconducting quantum computing and spin quantum computing based on semiconductor quantum dots. The core of both calculations is a quantum chip, and the environment in which superconducting quantum calculations operate is in an extremely low temperature environment approaching absolute zero.
The dilution refrigerator can maintain the temperature in the mK (millikelvin) range for a long time, has larger cooling capacity, is not too complicated in structure and operation, is not influenced by a magnetic field, is an important refrigeration method for obtaining the temperature in the mK range, and can provide a good low-temperature environment for the stable operation of the quantum chip.
A plurality of cold plates are arranged in the dilution refrigerator from top to bottom, the dilution refrigerator is divided into a plurality of temperature areas, the temperature is gradually reduced through the temperature areas to reach the mk-level temperature, and a quantum chip is positioned in a first temperature area at the bottommost layer, so that a large number of measuring and control circuits (measurement and control circuits for short) are required to be connected when the quantum chip actually works, and meanwhile, a magnetic shielding device is also arranged for preventing the influence of magnetic field noise; therefore, when the quantum chip is installed in the first temperature area of the bottommost layer, the surface of the quantum chip needs to have enough space for installing the measurement and control circuit, and meanwhile, the quantum chip is required to be arranged in the magnetic shielding device to prevent noise interference, so that the quantum chip cannot be directly attached to the surface of the first cold disk of the bottommost layer during installation, the efficient heat conduction between the quantum chip and the first cold disk cannot be realized, and meanwhile, the signal wire and the electric device in the measurement and control circuit can generate heat during operation, thereby influencing the environmental temperature of the quantum chip and further influencing the normal operation of the quantum chip.
It should be noted that the information disclosed in the background section of the present application is only for enhancement of understanding of the general background of the present application and should not be taken as an admission or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
Disclosure of Invention
The utility model aims at: the quantum computer can ensure high-efficiency heat conduction between the quantum chip and the first cold plate of the dilution refrigerator, and ensure the extremely low-temperature working environment of the quantum chip.
In order to achieve the above object, the present utility model provides the following technical solutions:
the utility model provides a quantum computer, which comprises a dilution refrigerator, a quantum chip, a first heat conduction hanging plate and a first heat conduction belt, wherein the quantum chip, the first heat conduction hanging plate and the first heat conduction belt are arranged in a first temperature zone at the bottommost layer of the dilution refrigerator;
the packaging box of the quantum chip is mounted on the lower end face of the first heat conduction hanging plate, the upper end face of the first heat conduction hanging plate is fixed on a first cold plate of the first temperature zone, and a plurality of first heat conduction strips are arranged between the first cold plate and the packaging box of the quantum chip and/or the lower end face of the first heat conduction hanging plate.
The quantum computer as described above, further, the first heat conduction band includes a metal braid, a first metal plate and a second metal plate, the first metal plate and the second metal plate being respectively located at both ends of the metal braid; the first metal plate is fixed on the packaging box of the quantum chip or the lower end face of the first heat conduction hanging plate, and the second metal plate is fixed on the first cold disc.
The quantum computer further comprises a magnetic shielding device covered outside the quantum chip, and the magnetic shielding device is fixed on the first heat conduction hanging plate.
The quantum computer further comprises a first through hole on the magnetic shielding device, wherein the first through hole is used for connecting the signal wire with the quantum chip through the first through hole.
The quantum computer further comprises a second heat conduction band arranged between the magnetic shielding device and the first cold plate and/or the first heat conduction hanging plate.
The quantum computer further comprises an adapter plate for transferring the signal wires and the electric devices connected with the quantum chip, wherein the adapter plate is arranged in the first temperature area and is positioned outside the magnetic shielding device.
The quantum computer as described above, further, the adapter plate is fixed on the first heat conduction hanging plate.
The quantum computer further comprises a third heat conduction belt arranged between the adapter plate and the first cold plate and/or the first heat conduction hanging plate.
The quantum computer further comprises a second heat conduction hanging plate, wherein the second heat conduction hanging plate is fixed on the adapter plate.
The quantum computer further comprises a fourth heat conduction band arranged between the second heat conduction hanging plate and the first cold plate, and the fourth heat conduction band is arranged close to the surface of the electric device.
The utility model has the beneficial effects that:
according to the quantum computer, the first heat conduction hanging plate and the first heat conduction belt are arranged between the quantum chip and the first cold plate, so that the quantum chip is efficiently conducted between the quantum chip and the first cold plate under the condition that the quantum chip is not attached to the surface of the first cold plate, and the extremely low temperature working environment of the quantum chip is ensured.
Drawings
Fig. 1 is a schematic structural diagram of a quantum computer according to an embodiment of the present utility model;
fig. 2 is a schematic structural diagram showing a connection relationship between a first heat conducting frame and other structures according to an embodiment of the present utility model;
fig. 3 is a schematic structural diagram of a first heat conducting strip according to an embodiment of the present utility model.
In the reference numerals: 10. a quantum chip; 20. a first cold plate; 30. an adapter plate; 40. a magnetic shielding device; 41. a first through hole; 50. an electrical device; 60. a first thermally conductive hanger plate; 70. the second heat conduction hanging plate; 80. a first heat conduction band; 81. a metal braid; 82. a first metal plate; 83. a second metal plate; 90. a second heat conduction band; 100. a third heat conduction band; 110. and a fourth heat conduction band.
Detailed Description
In order to better understand the technical solutions in the present application, the following description will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, shall fall within the scope of the present application. The embodiments described below by referring to the drawings are exemplary only for the purpose of illustrating the present application and are not to be construed as limiting the present application.
In the description of the present utility model, it should be understood that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", etc., are based on the directions or positional relationships shown in the drawings, are merely for convenience in describing the present utility model and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present utility model.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
As shown in fig. 1: the embodiment of the application discloses a quantum computer, which comprises a dilution refrigerator, a quantum chip 10, a first heat conduction hanging plate 60 and a first heat conduction belt 80, wherein the quantum chip 10, the first heat conduction hanging plate 60 and the first heat conduction belt 80 are arranged in a first temperature zone at the bottommost layer of the dilution refrigerator; the packaging box of the quantum chip 10 is mounted on the lower end face of the first heat-conducting hanging plate 60, the upper end face of the first heat-conducting hanging plate 60 is fixed on the first cold plate 20 of the first temperature zone, and a plurality of first heat-conducting strips 80 are arranged between the first cold plate 20 and the packaging box of the quantum chip 10 and/or the lower end face of the first heat-conducting hanging plate 60.
According to the quantum computer of the embodiment, the first heat conduction hanging plate 60 and the first heat conduction belt 80 are arranged between the quantum chip 10 and the first cold disk 20, so that the quantum chip 10 is efficiently conducted between the quantum chip 10 and the first cold disk 20 under the condition that the quantum chip 10 is not attached to the surface of the first cold disk 20, and the extremely low temperature working environment of the quantum chip 10 is ensured.
Illustratively, as shown in fig. 1, 2 first heat-conducting strips 80 are disposed between the lower end surface of the first heat-conducting hanging plate 60 and the first cold plate 20 in fig. 1; of course, the number of the first heat conductive strips 80 may be increased or decreased according to actual needs for a specific application.
Specifically, as an implementation manner of the embodiment of the present application, as shown in fig. 2, the specific structure of the first heat-conducting hanging plate 60 is as follows: the first heat conduction hanging plate 60 comprises a first support heat conduction plate and a second connection heat conduction plate which are mutually perpendicular, and the first support heat conduction plate is arranged on the lower end face of the second connection heat conduction plate; the upper end surface of the second connecting heat-conducting plate is fixed on the first cold plate 20, and the quantum chip 10 is arranged on the first supporting heat-conducting plate; this arrangement enables the quantum chip 10 to be connected to the first cold plate 20.
Further, as shown in fig. 3: in this embodiment, the first heat conducting belt 80 includes a metal braid 81, a first metal plate 82 and a second metal plate 83, and the first metal plate 82 and the second metal plate 83 are respectively located at two ends of the metal braid 81; the first metal plate 82 is fixed to the package box of the quantum chip 10 or the lower end surface of the first heat-conducting hanging plate 60, and the second metal plate 83 is fixed to the first cold plate 20.
The first heat conducting strip 80 of the present embodiment is convenient to install on the first cold plate 20 or the package box of the quantum chip 10 or the first heat conducting hanging plate 60 by providing the first metal plate 82 and the second metal plate 83, specifically, the first metal plate 82 and the second metal plate 83 are provided with installing holes, and the first heat conducting strip is detachably installed on the first cold plate 20 or the package box of the quantum chip 10 or the first heat conducting hanging plate 60 by screws. In general, the first metal plate 82 and the second metal plate 83 are obtained by performing crimping treatment on two ends of the metal braid 81, the first metal plate 82 and the second metal plate 83 are integrated with the metal braid 81, and the shapes of the first metal plate 82 and the second metal plate 83 are plate-shaped structures, so that the contact surfaces are flat, and the first metal plate 82 and the second metal plate 83 can be well contacted with the first cold plate 20, the quantum chip 10 packaging box, the first heat conduction hanging plate 60 and the like, thereby greatly improving the heat conduction performance. Further, the metal braid 81 of the present embodiment is formed by braiding a plurality of metal strands, which ensures the flexibility of the conductive tape while ensuring the heat conductive property, and facilitates bending and installation.
Preferably, as an implementation manner of the embodiment of the present application, the material of the first heat conduction band 80 is oxygen-free copper TU0, which is suitable for a low-temperature environment and has better heat conduction performance.
Preferably, as an implementation mode of the embodiment of the present application, the surfaces of the first metal plate 82 and the second metal plate 83 are plated with a metal layer, and the material of the metal layer includes gold; oxidation is prevented and stability of heat conductive performance is ensured by plating a metal layer of gold on the surfaces of the first metal plate 82 and the second metal plate 83.
Further, as an implementation manner of the embodiment of the present application, the quantum computer further includes a magnetic shielding device 40 covered outside the quantum chip 10, where the magnetic shielding device 40 is fixed on the first heat conducting hanging plate 60.
By fixing the magnetic shielding device 40 on the first heat-conducting hanging plate 60, the heat of the magnetic shielding device 40 can be conducted to the first cold plate 20 through the first heat-conducting hanging plate 60, and the influence of the heat on the environmental temperature of the quantum chip 10 is reduced.
Specifically, as one implementation of the embodiment of the present application, the magnetic shielding device 40 includes a cover body having one end opened, and a first cover plate located at the opening; the quantum chip 10 is located in a cavity formed by the cover body and the first cover plate in a covering manner; the first cover plate is provided with a first through hole 41, and the first through hole 41 is used for a signal line to penetrate through the first through hole 41 and connect with the quantum chip 10.
Further, as an implementation manner of the embodiment of the present application, the metal braid 81 of the first heat conduction band 80 passes through the first through holes 41 on the magnetic shielding device 40 and is arranged in one-to-one correspondence with the first through holes 41, and the first through holes 41 are used for connecting the quantum chip 10 through the first through holes 41 by signal lines.
Since the first heat conducting strips 80 pass through the first through holes 41 and are arranged in one-to-one correspondence with the first through holes 41, the first heat conducting strips 80 can be arranged close to the signal lines in the first through holes 41, so that heat generated by the signal lines is conveniently conducted to the first cold plate 20, and the influence of the heat on the environmental temperature of the quantum chip 10 is reduced.
Preferably, as an implementation manner of the embodiment of the present application, 4*n first through holes 41 are arranged along the peripheral array of the first cover plate in the magnetic shielding device 40, and n is an integer greater than or equal to 1. With the increase of the quantum bits of the quantum chip 10, a large number of signal lines need to be connected to the quantum chip 10, and the signal lines are distributed in all directions of the quantum chip 10, and the first through holes 41 are arranged 4*n along the peripheral array of the first cover plate, so that the connection of the signal lines in all directions of the quantum chip 10 is facilitated, and the convenience of wiring is improved. Based on this, the first heat conductive strips 80 are also arranged 4*n and are arranged through the first through holes 41 in one-to-one correspondence. Illustratively, as shown in fig. 2 (first heat conduction band 80 is not shown in fig. 2): 4 first through holes 41 are arranged on the first cover plate, and at this time, 4 first heat conductive strips 80 need to be arranged.
Further, as an implementation manner of the embodiment of the present application, a second heat conducting strip 90 is disposed between the magnetic shielding device 40 and the first cold plate 20 and/or the first heat conducting hanging plate 60.
By providing the second heat conduction band 90 between the magnetic shielding device 40 and the first cold plate 20 and/or the first heat conduction hanging plate 60, the heat conduction efficiency of the magnetic shielding device 40 is improved, and the influence of the heat on the environmental temperature of the quantum chip 10 is further reduced.
Illustratively, as shown in fig. 1, 2 second heat conduction strips 90 are arranged between the magnetic shielding device 40 and the first cold plate 20; of course, the number of the second heat conductive strips 90 may be increased or decreased according to actual needs for a specific application. In particular, in the mounting, a bump may be disposed on the outer wall of the cover body of the magnetic shielding device 40, and a mounting hole may be disposed on the bump, so that the second heat conducting strip 90 is fixed on the bump by a screw, so as to implement the mounting of the second heat conducting strip 90 on the magnetic shielding device 40.
Further, as an implementation manner of the embodiment of the present application, the quantum computer further includes an interposer 30 for switching between the signal line connected to the quantum chip 10 and the electrical device 50, where the interposer 30 is disposed in the first temperature region and is located outside the magnetic shielding device 40.
By arranging the adapter plate 30, the electric device 50 and the signal wire connected with the quantum chip 10 are convenient to install, and meanwhile, the electric device 50 is concentrated on the adapter plate 30, so that heat generated by the electric device 50 is convenient to process in a concentrated mode.
Specifically, the electrical device 50 includes, but is not limited to, a parametric amplifier, a single-segment circulator, a dual-segment circulator.
Further, as an implementation of the embodiment of the present application, the adapter plate 30 is fixed on the first heat-conducting hanging plate 60.
By fixing the adapter plate 30 on the first heat-conducting hanging plate 60, heat generated by the power-on device 50 and the signal line of the adapter plate 30 is conducted to the first cold plate 20 through the first heat-conducting hanging plate 60, and the influence of the heat on the environmental temperature of the quantum chip 10 is reduced.
Further, as an implementation manner of the embodiment of the present application, a third heat conducting belt 100 is disposed between the adapter plate 30 and the first cold plate 20 and/or the first heat conducting hanging plate 60.
By arranging the third heat conducting strip 100 between the adapter plate 30 and the first cold plate 20 and/or the first heat conducting hanging plate 60, the heat conducting efficiency of the signal line and the electric device 50 on the adapter plate 30 is improved, and the influence of the heat on the environmental temperature of the quantum chip 10 is further reduced.
Illustratively, as shown in fig. 1, 2 third heat conducting strips 100 are disposed between the adapter plate 30 and the first cold plate 20; of course, the number of the third heat conductive tapes 100 may be increased or decreased according to actual needs in a specific application.
Further, as an implementation manner of the embodiment of the present application, the electrical device 50 is disposed on a second heat-conducting hanging board 70, and the second heat-conducting hanging board 70 is fixed on the adapter board 30.
In the present embodiment, the reason for providing the second heat conduction hanging plate 70 is that: with the increase of the quantum bits on the quantum chip 10, the number of the electric devices 50 connected with the quantum chip 10 is increased, and the surface of the adapter plate 30 has insufficient space to mount so many electric devices 50, if the electric devices 50 are directly hung and mounted on the adapter plate 30 through the signal wires, the signal wires bear the weight of the electric devices 50 and are easy to damage because the electric devices 50 have a certain weight, and the influence of the weight of the electric devices 50 on the signal wires connected with the electric devices is avoided by arranging the electric devices 50 on the second heat conducting hanging plate 70, and the heat generated by the electric devices 50 can be conducted to the first cold plate 20 through the adapter plate 30 and the first heat conducting hanging plate 60, so that the influence of the heat on the environmental temperature of the quantum chip 10 is further reduced.
Further, as an implementation manner of the embodiment of the present application, a fourth heat conduction band 110 is disposed between the second heat conduction hanging plate 70 and the first cold plate 20, and the fourth heat conduction band 110 is disposed close to the surface of the electrical device 50.
By arranging the fourth heat conduction band 110 between the second heat conduction hanging plate 70 and the first cooling plate 20 and arranging the fourth heat conduction band 110 close to the surface of the electrical device 50, the heat conduction efficiency of the electrical device 50 on the second heat conduction hanging plate 70 is improved, and the influence of heat on the environmental temperature of the quantum chip 10 is further reduced.
Illustratively, as shown in fig. 1, 2 fourth heat conductive strips 110 are disposed between the second heat conductive hanging plate 70 and the first cold plate 20 in fig. 1; of course, the number of the fourth heat conductive strips 110 may be increased or decreased according to actual needs in a specific application.
It should be noted that: the second, third and fourth heat conductive strips 90, 100, 110 referred to in this application are identical in performance to the first heat conductive strip 80, differing only in their size and their mounting locations.
In the description of the present specification, reference to the term "some embodiments" or "examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the utility model. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.
The foregoing is merely a preferred embodiment of the present utility model and is not intended to limit the present utility model in any way. Any person skilled in the art will make any equivalent substitution or modification to the technical solution and technical content disclosed in the utility model without departing from the scope of the technical solution of the utility model, and the technical solution of the utility model is not departing from the scope of the utility model.

Claims (10)

1. The quantum computer is characterized by comprising a dilution refrigerator, a quantum chip, a first heat conduction hanging plate and a first heat conduction belt, wherein the quantum chip, the first heat conduction hanging plate and the first heat conduction belt are arranged in a first temperature zone at the bottommost layer of the dilution refrigerator;
the packaging box of the quantum chip is mounted on the lower end face of the first heat conduction hanging plate, the upper end face of the first heat conduction hanging plate is fixed on a first cold plate of the first temperature zone, and a plurality of first heat conduction strips are arranged between the first cold plate and the packaging box of the quantum chip and/or the lower end face of the first heat conduction hanging plate.
2. The quantum computer of claim 1, wherein the first thermally conductive strip comprises a metal braid, a first metal plate, and a second metal plate, the first metal plate and the second metal plate being positioned at respective ends of the metal braid; the first metal plate is fixed on the packaging box of the quantum chip or the lower end face of the first heat conduction hanging plate, and the second metal plate is fixed on the first cold disc.
3. The quantum computer of claim 2, further comprising a magnetic shielding device covering an exterior of the quantum chip, the magnetic shielding device being secured to the first thermally conductive hanger plate.
4. A quantum computer according to claim 3, wherein the metal braid of the first heat conducting strip passes through and is arranged in one-to-one correspondence with a first through hole on the magnetic shielding device, the first through hole being for a signal line to connect the quantum chip through the first through hole.
5. A quantum computer according to claim 3, wherein a second heat conducting strip is provided between the magnetic shielding means and the first cold plate and/or the first heat conducting hanger plate.
6. The quantum computer of claim 3, further comprising an interposer for switching signal lines and electrical devices connected to the quantum chip, the interposer disposed within the first temperature region and external to the magnetic shielding device.
7. The quantum computer of claim 6, wherein the interposer is secured to the first thermally conductive suspension board.
8. The quantum computer of claim 7, wherein a third heat conducting strip is disposed between the interposer and the first cold plate and/or the first heat conducting hanging plate.
9. The quantum computer of claim 7, wherein the electrical device is disposed on a second thermally conductive suspension board, the second thermally conductive suspension board being secured to the interposer.
10. The quantum computer of claim 9, wherein a fourth thermally conductive strip is disposed between the second thermally conductive hanger plate and the first cold plate, the fourth thermally conductive strip being disposed proximate to the electrical device surface.
CN202322000862.1U 2023-07-26 2023-07-26 Quantum computer Active CN220305811U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322000862.1U CN220305811U (en) 2023-07-26 2023-07-26 Quantum computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322000862.1U CN220305811U (en) 2023-07-26 2023-07-26 Quantum computer

Publications (1)

Publication Number Publication Date
CN220305811U true CN220305811U (en) 2024-01-05

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202322000862.1U Active CN220305811U (en) 2023-07-26 2023-07-26 Quantum computer

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Country Link
CN (1) CN220305811U (en)

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