CN219917207U - LED chip - Google Patents
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- CN219917207U CN219917207U CN202320647683.4U CN202320647683U CN219917207U CN 219917207 U CN219917207 U CN 219917207U CN 202320647683 U CN202320647683 U CN 202320647683U CN 219917207 U CN219917207 U CN 219917207U
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Abstract
The utility model provides an LED chip, which is characterized in that through the matching design of a first insulating layer, a first electrode communication layer and a second insulating layer, the conductive substrate is directly and electrically connected with a second type semiconductor layer (P type semiconductor layer), and further, the conductive substrate can be used as a second electrode for the LED chip to be in contact with the outside, so that the heat generated by the LED chip on a light emitting table top is directly transmitted to the conductive substrate in the vertical direction, thereby being beneficial to heat dissipation and reducing the thermal resistance of the LED chip. Meanwhile, through the design of the through holes, a composite electrode structure with mutually combined upper and lower surfaces of the LED (namely, the mutual matching of the first electrode communication layer and the first electrode layer) is formed, so that current injection is better and more uniform, and the Auger composite problem caused by large current injection is effectively solved.
Description
Technical Field
The utility model relates to the field of light emitting diodes, in particular to an LED chip.
Background
The LED is used as a novel solid-state light source, and has the advantages of energy conservation, environmental protection, long service life, safe use, low voltage and modeling diversity. The traditional LED is a horizontal structure LED prepared on a sapphire substrate, and because the sapphire substrate is non-conductive, current is transversely transmitted in an epitaxial layer, a p electrode and an n electrode are positioned on the same side, and p-GaN is needed to be etched to prepare the p electrode, so that the light emitting area is reduced, meanwhile, the light shielding area is increased due to the existence of a metal electrode, and the light emitting efficiency of the LED is greatly reduced. Meanwhile, along with the shortening of the luminous wavelength of the LED, particularly the deep ultraviolet LED, the light TE mode emitted by the MQWs is gradually reduced, the TM mode duty ratio is increased, the TM mode is mainly parallel to the epitaxial layer and is mainly transmitted, side light emitting is mainly shown, the external quantum efficiency of the LED can be correspondingly reduced, and the TM light emitting effect of the conventional flip LED chip structure on the deep ultraviolet LED is poor.
For a III-V compound Light Emitting Diode (LED), especially a GaN system material ultraviolet, blue light and green light LED, a thin film type vertical structure LED chip can be prepared by a substrate transfer mode, a substrate stripping technology is generally adopted to remove a growth substrate (a sapphire substrate) of the LED by a laser stripping LLO technology, and an LED epitaxial layer is transferred onto a second substrate with better electric conduction and heat conduction properties, such as a high doped Si substrate and a metal substrate, so that the thin film type LED chip is prepared.
Currently, two types of vertical structure LED chip structures are mainly used in the industry, one is a conventional vertical structure LED chip, and the other is a second generation perforated vertical structure LED chip.
The traditional vertical structure LED is characterized in that an epitaxial layer is inversely adhered on a conductive substrate to serve as a P electrode, an interdigital electrode is prepared on the back (N surface) of the epitaxial layer to serve as an N electrode, the LED chip has good heat dissipation effect, but the interdigital electrode at the top has limitation on current expansion, and particularly the duty ratio of the top electrode is related to the contradiction between current expansion and light emitting area, and the two cannot be both in a compromise.
The second generation of perforated vertical structure LED has the advantages that through the N-type holes which are uniform in the epitaxial layer, current injection is better and more uniform, and the Auger recombination problem of large current injection is effectively improved, but because the LED epitaxial layer and the conductive substrate of the structure are mutually insulated by adopting a large-area insulating layer, heat generated by the LED can be transmitted to the conductive substrate in the vertical direction only through the insulating layer, so that the junction temperature and the thermal resistance of the LED are increased, and the LED chip structure has an optimized space.
In view of this, the present inventors have specifically devised an LED chip, which is generated by this scheme.
Disclosure of Invention
The utility model aims to provide an LED chip for solving the problem that the current expansion effect and the heat dissipation effect in the LED chip with a vertical structure cannot be achieved.
In order to achieve the above purpose, the technical scheme adopted by the utility model is as follows:
an LED chip, comprising:
the epitaxial lamination comprises a first type semiconductor layer, an active layer and a second type semiconductor layer which are stacked in sequence; the epitaxial lamination is etched to at least part of the first type semiconductor layer to form steps and a light-emitting table top, and the light-emitting table top is provided with a plurality of through holes exposing the first type semiconductor layer;
a second electrode layer disposed on the light emitting mesa and in contact with the second type semiconductor layer, the second electrode layer including a metal reflective layer;
the first electrode layer is arranged at the bottom of each through hole;
a first insulating layer covering the epitaxial stack and exposing at least part of the surfaces of the first electrode layer and the second electrode layer;
the first electrode communication layers are arranged in the through holes in a mode of being laminated on the exposed surfaces of the first electrode layers and extend to the surfaces of the light-emitting table top and the steps in a mode of being attached to the first insulating layers so as to realize mutual communication of the first electrode layers corresponding to the bottoms of the through holes; the first electrode communication layer positioned on the surface of the step is provided with an electrode lead-out area on the surface of one side close to the first semiconductor layer;
a second insulating layer covering the first electrode communication layer and maintaining an exposed surface of the second electrode layer;
the conductive substrate is in electrical contact with the exposed surface of the second electrode layer in an embedding way of the conductive bonding layer, and is arranged in an insulating way with the first electrode communication layer through the second insulating layer.
Preferably, an electrode thickening layer is further arranged on the surface of one side, away from the second type semiconductor layer, of the second electrode layer, and the electrode thickening layer is arranged away from the first electrode communication layer.
Preferably, each of the through holes is provided away from an edge of the LED chip.
Preferably, each through hole is located in a partial area of the LED chip, and the first electrode communication layer extends to the edge of the LED chip, so that the electrode lead-out area is disposed at the edge of the LED chip.
Preferably, a lead electrode for external contact is provided at the electrode lead-out region, and the lead electrode is circumferentially provided at a side surface of the first type semiconductor layer facing away from the active layer.
Preferably, each through hole is distributed in an array.
Preferably, the first electrode communication layers are communicated with each other by way of cross distribution.
Preferably, the first electrode communication layer extends to an edge of the LED chip; the electrode leading-out area is arranged on the first electrode communication layer corresponding to the edge of the LED chip.
Preferably, the second electrode layer comprises one or more of indium, tin, aluminum, gold, platinum, zinc, silver, titanium, lead, nickel.
Preferably, the conductive substrate is used as a second electrode for contacting the LED chip with the outside, and comprises a substrate composed of one or more of Au, ni, al, cu, W, si, se, gaAs.
Preferably, the first electrode communication layer includes a metal conductive layer.
Preferably, the first semiconductor layer has a roughened surface.
Preferably, the first type semiconductor layer includes an N type semiconductor layer, and the second type semiconductor layer includes a P type semiconductor layer.
As can be seen from the above technical solution, the LED chip provided by the present utility model includes: the semiconductor device comprises an epitaxial lamination, a second electrode layer, a first insulating layer, a first electrode communication layer, a second insulating layer and a conductive substrate. The epitaxial lamination is provided with a step and a light-emitting table top, and the light-emitting table top is provided with a plurality of through holes exposing the first semiconductor layer; the second electrode layer is arranged on the light-emitting table surface and is in contact with the second type semiconductor layer, and the second electrode layer comprises a metal reflecting layer; the first electrode layer is arranged at the bottom of each through hole; the first insulating layer covers the epitaxial lamination and exposes at least part of the surfaces of the first electrode layer and the second electrode layer; the first electrode communication layers are arranged in the through holes in a mode of being laminated on the exposed surface of the first electrode layer, and extend to the surface of the light-emitting table top and the step surface in a mode of being attached to the first insulating layer, so that the first electrode layers corresponding to the bottoms of the through holes are communicated with each other; the first electrode communication layer positioned on the surface of the step is provided with an electrode lead-out area on the surface of one side close to the first semiconductor layer; the second insulating layer covers the first electrode communication layer and keeps the exposed surface of the second electrode layer; the conductive substrate is in electrical contact with the exposed surface of the second electrode layer in an embedding way of the conductive bonding layer, and is in insulation arrangement with the first electrode communication layer through the second insulation layer. Based on the structure, through the matching design of the first insulating layer, the first electrode communication layer and the second insulating layer, the conductive substrate is directly and electrically connected with the second type semiconductor layer (P type semiconductor layer), and further, the conductive substrate can serve as a second electrode for the LED chip to be in contact with the outside, so that heat generated by the LED chip on the light emitting table top is directly transmitted to the conductive substrate in the vertical direction, heat dissipation is facilitated, and thermal resistance of the LED chip is reduced. Meanwhile, through the design of the through holes, a composite electrode structure with mutually combined upper and lower surfaces of the LED (namely, the mutual matching of the first electrode communication layer and the first electrode layer) is formed, so that current injection is better and more uniform, and the Auger composite problem caused by large current injection is effectively solved.
And secondly, an electrode thickening layer is further arranged on the surface of one side, away from the second type semiconductor layer, of the second electrode layer, and the electrode thickening layer is arranged away from the first electrode communication layer, so that the current expansion capacity of the second electrode layer is further improved, and the transverse resistance of the second electrode layer is reduced.
Finally, each through hole is arranged far away from the edge of the LED chip, further, each through hole is positioned in a partial area of the LED chip, and the first electrode communication layer extends to the edge of the LED chip; further, a lead electrode for external contact is provided at the electrode lead-out region, and the lead electrode is circumferentially provided at a surface of a side of the first-type semiconductor layer facing away from the active layer. Based on the method, the coverage area of the second electrode layer and/or the electrode thickening layer at the edge of the LED chip can be ensured, so that the uniformity of current injection of the light emitting table top is realized, and the effective light emitting area is ensured; meanwhile, based on the structure, the number of through holes can be reduced, and particularly, the reliability of LEDs is realized in the peripheral edge area of the chip; and the first electrode layer positioned on the upper surface of the first type semiconductor layer (namely the bottom of the through hole) and the lead electrode positioned on the lower surface of the first type semiconductor layer form a composite electrode to be mutually matched to jointly realize the uniform current expansion of the first type semiconductor layer side, so that the Auger recombination problem of high current injection is effectively solved, and the problem of current injection at the edge of the LED chip is better solved.
Drawings
In order to more clearly illustrate the embodiments of the present utility model or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present utility model, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of an LED chip according to embodiment 1 of the present utility model;
fig. 2 to 20 are schematic structural diagrams/schematic top views corresponding to steps of a method for manufacturing an LED chip according to an embodiment of the present utility model;
the symbols in the drawings illustrate: 1. growth substrate, 2, first type semiconductor layer, 3, active layer, 4, second type semiconductor layer, 5, step, 6, mesa, 6.1, through hole, 7, second electrode layer, 8, first electrode layer, 9, first insulating layer, 10, first electrode communication layer, 11, electrode thickening layer, 12, second insulating layer, 13, conductive type bonding layer, 14, conductive substrate, 15, lead electrode.
Detailed Description
In order to make the contents of the present utility model more clear, the contents of the present utility model will be further described with reference to the accompanying drawings. The present utility model is not limited to this specific embodiment. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
As shown in fig. 1, an LED chip includes:
an epitaxial stack including a first type semiconductor layer 2, an active layer 3, and a second type semiconductor layer 4 stacked in this order; the epitaxial lamination is etched to at least part of the first type semiconductor layer 2 to form a step 5 and a light-emitting table top 6, and the light-emitting table top 6 is provided with a plurality of through holes 6.1 exposing the first type semiconductor layer 2;
a second electrode layer 7 provided on the light emitting mesa 6 and in contact with the second type semiconductor layer 4, the second electrode layer 7 including a metal reflective layer;
a first electrode layer 8, wherein the first electrode layer 8 is arranged at the bottom of each through hole 6.1;
a first insulating layer 9, wherein the first insulating layer 9 covers the epitaxial lamination and exposes at least partial surfaces of the first electrode layer 8 and the second electrode layer 7;
a first electrode communication layer 10, which is disposed in each of the through holes 6.1 by being laminated on the exposed surface of the first electrode layer 8, and extends to the surface of the light emitting mesa 6 and the step 5 by being attached to the first insulating layer 9, so as to realize the mutual communication of the first electrode layers 8 corresponding to the bottoms of the through holes 6.1; and the first electrode communication layer 10 positioned on the surface of the step 5 is provided with an electrode extraction area on the surface of one side close to the first semiconductor layer 2;
a second insulating layer 12 that covers the first electrode communication layer 10 and maintains the exposed surface of the second electrode layer 7;
the conductive substrate 14 is electrically contacted with the exposed surface of the second electrode layer 7 by embedding the conductive bonding layer 13, and is insulated from the first electrode communication layer 10 by the second insulating layer 12.
It should be noted that the types of the first type semiconductor layer 2, the active layer 3 and the second type semiconductor layer 4 in the LED chip of the present embodiment may also be not limited, for example, the first type semiconductor layer 2 may be, but not limited to, an N type gallium nitride layer, and correspondingly, the second type semiconductor layer 4 may be, but not limited to, a P type gallium nitride layer.
In one embodiment of the present utility model, the first type semiconductor layer 2, the active layer 3 and the second type semiconductor layer 4 are applied as an ultraviolet LED chip structure.
In the embodiment of the present utility model, the size and number of the through holes 6.1 are not limited, and may be adaptively adjusted according to the product requirements (including size, light emitting parameters, etc.).
On the basis of the above-described embodiments, in one embodiment of the present utility model, an electrode thickening layer 11 is further provided on a side surface of the second electrode layer 7 facing away from the second type semiconductor layer 4, and the electrode thickening layer 11 is disposed away from the first electrode communication layer 10.
On the basis of the above-described embodiments, in one embodiment of the utility model, each of the through-holes 6.1 is arranged away from the edge of the LED chip.
On the basis of the above embodiment, in one embodiment of the present utility model, each through hole 6.1 is located in a partial area of the LED chip, and the first electrode communication layer 10 extends to the edge of the LED chip, so that the electrode lead-out area is disposed at the edge of the LED chip.
On the basis of the above-described embodiments, in one embodiment of the present utility model, a lead electrode 15 for external contact is provided at the electrode lead-out region, and the lead electrode 15 is circumferentially provided at a side surface of the first type semiconductor layer 2 facing away from the active layer 3.
On the basis of the above-described embodiments, in one embodiment of the utility model, the through holes 6.1 are distributed in an array.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the first electrode communication layers 10 communicate each other through the first electrode layers 8 in a cross-distribution manner.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the first electrode communication layer 10 extends to the edge of the LED chip; the electrode lead-out area is arranged on the first electrode communication layer 10 corresponding to the edge of the LED chip.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the second electrode layer 7 includes one or more of indium, tin, aluminum, gold, platinum, zinc, silver, titanium, lead, nickel.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the conductive substrate 14 is used as a second electrode for contacting the LED chip with the outside, and includes a substrate composed of one or more of Au, ni, al, cu, W, si, se, gaAs.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the first electrode communication layer 10 includes a metal conductive layer.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the first type semiconductor layer 2 has a roughened surface.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the first type semiconductor layer 2 includes an N type semiconductor layer, and the second type semiconductor layer 4 includes a P type semiconductor layer.
The embodiment of the utility model also provides a manufacturing method of the LED chip, which comprises the following steps:
s01, as shown in FIG. 2, providing a growth substrate 1;
fig. 2 is a schematic structural diagram corresponding to the execution of step S01.
Note that, in one of the embodiments of the present utility model, the growth substrate 1 includes, but is not limited to, a sapphire substrate.
S02, as shown in fig. 3, growing an epitaxial stack including at least a first type semiconductor layer 2, an active layer 3, and a second type semiconductor layer 4 stacked in order along the surface of the growth substrate 1;
fig. 3 is a schematic structural diagram corresponding to the execution of step S02.
In one embodiment of the present utility model, a buffer layer and a U-GaN layer for improving crystal quality may be further provided between the growth substrate 1 and the first type semiconductor layer 2.
It should be noted that the types of the first type semiconductor layer 2, the active layer 3 and the second type semiconductor layer 4 in the LED chip of the present embodiment may also be not limited, for example, the first type semiconductor layer 2 may be, but not limited to, an N type gallium nitride layer, and correspondingly, the second type semiconductor layer 4 may be, but not limited to, a P type gallium nitride layer.
S03, as shown in fig. 4 and 5, etching the epitaxial lamination to part of the first semiconductor layer 2 to form a step 5 and a light-emitting table top 6, wherein the light-emitting table top 6 is provided with a plurality of through holes 6.1 exposing the first semiconductor layer 2 and reserved with electrode lead-out areas;
fig. 4 is a schematic structural diagram corresponding to the execution of step S03;
fig. 5 is a schematic top view corresponding to the execution of step S03.
In the embodiment of the present utility model, the size and number of the through holes 6.1 are not limited, and may be adaptively adjusted according to the product requirements (including size, light emitting parameters, etc.).
On the basis of the above-described embodiments, in one embodiment of the utility model, the through holes 6.1 are distributed in an array.
S04, as shown in fig. 6 and 7, a second electrode layer 7 is formed, which is disposed on the light emitting mesa 6 and is in contact with the second semiconductor layer 4, and the second electrode layer 7 includes a metal reflective layer;
fig. 6 is a schematic structural diagram corresponding to the execution of step S04;
fig. 7 is a schematic top view corresponding to the execution of step S04.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the second electrode layer 7 includes one or more of indium, tin, aluminum, gold, platinum, zinc, silver, titanium, lead, nickel.
S05, as shown in fig. 8 and 9, manufacturing a first electrode layer 8, wherein the first electrode layer 8 is arranged at the bottom of each through hole 6.1;
fig. 8 is a schematic structural diagram corresponding to the execution of step S05;
fig. 9 is a schematic top view corresponding to the execution of step S05.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the first electrode layer 8 includes a metal conductive layer.
S06, as shown in fig. 10 and 11, manufacturing a first insulating layer 9, wherein the first insulating layer 9 covers the epitaxial lamination and exposes at least part of the surfaces of the first electrode layer 8 and the second electrode layer 7;
fig. 10 is a schematic structural diagram corresponding to the execution of step S06;
fig. 11 is a schematic top view corresponding to the execution of step S06.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the first insulating layer 9 includes, but is not limited to, a silicon oxide layer.
S07, as shown in fig. 12 and 13, a conductive first electrode communication layer 10 and an electrode thickening layer 11 are formed;
the first electrode communication layer 10 is disposed in each through hole 6.1 by being laminated on the exposed surface of the first electrode layer 8, and extends to the surfaces of the light emitting mesa 6 and the step 5 by being attached to the first insulating layer 9, so as to realize the mutual communication of the first electrode layers 8 corresponding to the bottoms of the through holes 6.1;
the electrode thickening layer 11 is disposed on the exposed surface of the second electrode layer 7, and the electrode thickening layer 11 is disposed away from the first electrode communication layer 10;
fig. 12 is a schematic structural diagram corresponding to the execution of step S07;
fig. 13 is a schematic plan view corresponding to the execution of step S07.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the first electrode communication layers 10 communicate each other through the first electrode layers 8 in a cross-distribution manner.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the first electrode communication layer 10 and the electrode thickening layer 11 each include a metal conductive layer.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the first electrode communication layer 10 and the electrode thickening layer 11 may be formed simultaneously.
S08, as shown in fig. 14 and 15, manufacturing a second insulating layer 12 that covers the first electrode communication layer 10 and exposes the electrode thickening layer 11;
fig. 14 is a schematic structural diagram corresponding to the execution of step S08;
fig. 15 is a schematic top view corresponding to the execution of step S08.
On the basis of the above embodiment, in one embodiment of the present utility model, the second insulating layer 12 includes, but is not limited to, a silicon oxide layer.
S09, as shown in fig. 16, a conductive substrate 14 is provided, which is electrically contacted with the exposed surface of the electrode thickening layer 11 by embedding the conductive bonding layer 13, and is insulated from the first electrode communication layer 10 by the second insulating layer 12;
fig. 16 is a schematic structural diagram corresponding to the execution of step S09.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the conductive substrate 14 is used as a second electrode for contacting the LED chip with the outside, and includes a substrate composed of one or more of Au, ni, al, cu, W, si, se, gaAs.
S10, as shown in FIG. 17, removing the growth substrate 1;
fig. 17 is a schematic structural diagram corresponding to the execution of step S10.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the growth substrate 1 is removed by laser lift-off.
S11, as shown in FIG. 18, the first type semiconductor layer 2 is provided with a roughened surface through a roughening process;
fig. 18 is a schematic structural diagram corresponding to the execution of step S11.
S12, as shown in FIG. 19, etching the first type semiconductor layer 2 at the step 5 to the first insulating layer 9, and continuing to remove the first insulating layer 9 to expose the first electrode communication layer 10, so that the first electrode communication layer 10 has an exposed surface serving as an electrode extraction region;
fig. 19 is a schematic structural diagram corresponding to the execution of step S12.
On the basis of the above embodiment, in one embodiment of the present utility model, the electrode lead-out area is disposed on the first electrode communication layer 10 corresponding to the edge of the LED chip.
S13, as shown in fig. 20, a lead electrode 15 is formed, which is provided in the electrode lead-out region and is brought into contact with the first electrode layer 8 through the first electrode communication layer 10.
Fig. 20 is a schematic structural diagram corresponding to the execution of step S13.
On the basis of the above embodiment, in one embodiment of the present utility model, each through hole 6.1 is located in the middle area of the LED chip, and the first electrode communication layer 10 extends to the edge of the LED chip, so that the electrode lead-out area is disposed at the edge of the LED chip.
On the basis of the above-described embodiments, in one embodiment of the present utility model, the lead electrode 15 is disposed around a side surface of the first type semiconductor layer 2 facing away from the active layer 3.
As can be seen from the above technical solution, the LED chip provided by the present utility model includes: the epitaxial layer stack, the second electrode layer 7, the first electrode layer 8, the first insulating layer 9, the first electrode communication layer 10, the second insulating layer 12, and the conductive substrate 14. The epitaxial lamination is provided with a step 5 and a light-emitting table top 6, and the light-emitting table top 6 is provided with a plurality of through holes 6.1 exposing the first semiconductor layer 2; the second electrode layer 7 is disposed on the light emitting mesa 6 and is in contact with the second semiconductor layer 4, and the second electrode layer 7 includes a metal reflective layer; the first electrode layer 8 is arranged at the bottom of each through hole 6.1; the first insulating layer 9 covers the epitaxial stack and exposes at least part of the surfaces of the first electrode layer 8 and the second electrode layer 7; the first electrode communication layer 10 is disposed in each through hole 6.1 by being laminated on the exposed surface of the first electrode layer 8, and extends to the surfaces of the light emitting mesa 6 and the step 5 by being attached to the first insulating layer 9, so as to realize the mutual communication of the first electrode layers 8 corresponding to the bottoms of the through holes 6.1; and the first electrode communication layer 10 positioned on the surface of the step 5 is provided with an electrode extraction area on the surface of one side close to the first semiconductor layer 2; the second insulating layer 12 covers the first electrode communication layer 10 and maintains the exposed surface of the second electrode layer 7; the conductive substrate 14 is electrically contacted with the exposed surface of the second electrode layer 7 by embedding the conductive bonding layer 13, and is insulated from the first electrode communication layer 10 by the second insulating layer 12. Based on this, through the cooperation design of the first insulating layer 9, the first electrode communication layer 10 and the second insulating layer 12, the conductive substrate 14 is directly and electrically connected with the second type semiconductor layer 4 (P type semiconductor layer), and further, the conductive substrate 14 can be used as a second electrode for contacting the LED chip with the outside, so that the heat generated by the LED chip on the light emitting mesa 6 is directly transmitted to the conductive substrate 14 in the vertical direction, thereby facilitating the heat dissipation and reducing the thermal resistance of the LED chip. Meanwhile, through the design of the through hole 6.1, a composite electrode structure with the upper surface and the lower surface of the LED combined with each other (namely, the mutual matching of the first electrode communication layer 10 and the first electrode layer 8) is formed, so that the current injection is better and more uniform, and the Auger composite problem caused by the large current injection is effectively solved.
Secondly, an electrode thickening layer 11 is further arranged on the surface of one side, away from the second type semiconductor layer 4, of the second electrode layer 7, and the electrode thickening layer 11 is arranged away from the first electrode communication layer 10, so that the current spreading capacity of the second electrode layer 7 is further improved, and the transverse resistance of the second electrode layer is reduced.
Finally, each through hole 6.1 is disposed far from the edge of the LED chip, further, each through hole 6.1 is located in a partial area of the LED chip, and the first electrode communication layer 10 extends to the edge of the LED chip, so that the electrode lead-out area is disposed at the edge of the LED chip; further, a lead electrode for external contact is provided at the electrode lead-out region, and the lead electrode is circumferentially provided at a surface of a side of the first-type semiconductor layer facing away from the active layer. Based on the above, the coverage area of the second electrode layer 7 and/or the electrode thickening layer 11 at the edge of the LED chip can be ensured, so that the uniformity of current injection of the light emitting table top is realized, and the effective light emitting area is ensured; meanwhile, based on the structure, the number of through holes 6.1 can be reduced, and particularly, the reliability of LEDs is realized in the peripheral edge area of the chip; and the first electrode layer 8 positioned on the upper surface of the first type semiconductor layer 2 (namely the bottom of the through hole 6.1) and the lead electrode 15 positioned on the lower surface of the first type semiconductor layer 4 form a composite electrode to mutually match and jointly realize the uniform current expansion of the first type semiconductor layer 2 side, thereby effectively improving the Auger recombination problem of large current injection and better solving the current injection problem of the edge of the LED chip.
The utility model also provides a manufacturing method of the LED chip, which has the advantages of simple and convenient process manufacture and convenient production while realizing the beneficial effects of the LED chip.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other.
It is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in an article or apparatus that comprises such element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present utility model. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the utility model. Thus, the present utility model is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (8)
1. An LED chip, comprising:
the epitaxial lamination comprises a first type semiconductor layer, an active layer and a second type semiconductor layer which are stacked in sequence; the epitaxial lamination is etched to at least part of the first type semiconductor layer to form steps and a light-emitting table top, and the light-emitting table top is provided with a plurality of through holes exposing the first type semiconductor layer;
a second electrode layer disposed on the light emitting mesa and in contact with the second type semiconductor layer, the second electrode layer including a metal reflective layer;
the first electrode layer is arranged at the bottom of each through hole;
a first insulating layer covering the epitaxial stack and exposing at least part of the surfaces of the first electrode layer and the second electrode layer;
the first electrode communication layers are arranged in the through holes in a mode of being laminated on the exposed surfaces of the first electrode layers and extend to the surfaces of the light-emitting table top and the steps in a mode of being attached to the first insulating layers so as to realize mutual communication of the first electrode layers corresponding to the bottoms of the through holes; the first electrode communication layer positioned on the surface of the step is provided with an electrode lead-out area on the surface of one side close to the first semiconductor layer;
a second insulating layer covering the first electrode communication layer and maintaining an exposed surface of the second electrode layer;
the conductive substrate is in electrical contact with the exposed surface of the second electrode layer in an embedding way of the conductive bonding layer and is arranged in an insulating way with the first electrode communication layer through the second insulating layer;
and an electrode thickening layer is further arranged on the surface of one side, away from the second type semiconductor layer, of the second electrode layer, and the electrode thickening layer is arranged away from the first electrode communication layer.
2. The LED chip of claim 1, wherein each of said through holes is disposed away from an edge of said LED chip.
3. The LED chip of claim 2, wherein each of said through holes is located in a partial region of said LED chip, and said first electrode communication layer extends to an edge of said LED chip such that said electrode lead-out area is disposed at an edge of said LED chip.
4. The LED chip of claim 3, wherein a lead electrode for external contact is provided at said electrode lead-out region, and said lead electrode is circumferentially provided at a side surface of said first semiconductor layer facing away from said active layer.
5. The LED chip of any of claims 1-4, wherein each of said vias is distributed in an array.
6. The LED chip of claim 5, wherein said first electrode communication layers communicate each other through a cross-distribution.
7. The LED chip of claim 1, wherein said first electrode communication layer comprises a metallic conductive layer.
8. The LED chip of claim 1, wherein said first type semiconductor layer has a roughened surface.
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|---|---|---|---|
| CN202320647683.4U CN219917207U (en) | 2023-03-29 | 2023-03-29 | LED chip |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320647683.4U CN219917207U (en) | 2023-03-29 | 2023-03-29 | LED chip |
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| CN219917207U true CN219917207U (en) | 2023-10-27 |
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