CN219842513U - Chip test fixture and device - Google Patents

Abstract

The utility model discloses a chip testing jig and device, and relates to the technical field of chip testing. The chip testing jig comprises a base, a conductive adhesive structure and a limiting frame; the base is provided with a test groove; the conductive adhesive structure is arranged in the test groove and comprises an elastic insulating layer and a plurality of conductive adhesive columns, the plurality of conductive adhesive columns are arranged in the elastic insulating layer at intervals and penetrate through the elastic insulating layer, the plurality of conductive adhesive columns are distributed in one-to-one correspondence with a plurality of test pins of the chip to be tested, and one end of each conductive adhesive column is used for connecting the corresponding test pin of the chip to be tested; the limiting frame is detachably arranged in the test groove, a through hole matched with the chip to be tested is formed in the limiting frame, and the limiting frame is used for limiting the chip to be tested. According to the chip testing jig, when the testing pins of the chip to be tested are in contact with the conductive adhesive columns, the elastic insulating layer can play a role in buffering, and the testing pins of the chip to be tested can play a role in protecting, so that the chip to be tested is prevented from being damaged.

Description

Chip test fixture and device

Technical Field

The present utility model relates to the field of chip testing technologies, and in particular, to a chip testing jig and a device.

Background

In the manufacturing process of the chip, functional test is required to be carried out on the chip, so that qualified products and defective products are screened out; during testing, a tester puts the chip to be tested into the testing equipment provided with the testing probes, and the testing probes are in one-to-one correspondence with the testing pins of the chip. This approach has the following problems: 1. when the chip pins are contacted with the probes, the chip pins are easy to damage; 2. the probe has long signal transmission distance due to the slender structure, signal interference exists, and the signal transmission is not stable enough; 3. the test probe has high price and high test cost; 4. alignment of the chip pins with the probes is cumbersome and there may be cases where the chip pins deviate from the probes.

Disclosure of Invention

The present utility model aims to solve at least one of the technical problems existing in the prior art. Therefore, the utility model provides a chip testing jig and a chip testing device, which can avoid damage to chip pins.

In one aspect, a chip test fixture according to an embodiment of the present utility model includes:

the base is provided with a test groove;

the conductive adhesive structure is arranged in the test groove and comprises an elastic insulating layer and a plurality of conductive adhesive columns, the conductive adhesive columns are arranged in the elastic insulating layer at intervals and penetrate through the elastic insulating layer, the conductive adhesive columns are distributed in one-to-one correspondence with a plurality of test pins of the chip to be tested, and one ends of the conductive adhesive columns are used for connecting the test pins corresponding to the chip to be tested;

the limiting frame is detachably arranged in the test groove, a through hole matched with the chip to be tested is formed in the limiting frame, and the limiting frame is used for limiting the chip to be tested.

According to some embodiments of the utility model, the conductive adhesive structure further comprises a support frame, and the elastic insulating layer has a plurality of elastic insulating layers, and the elastic insulating layers are arranged on the support frame at intervals.

According to some embodiments of the utility model, a positioning column is arranged in the test groove, and the limiting frame is provided with a positioning hole matched with the positioning column.

According to some embodiments of the utility model, the limit frame is provided with a plurality of threaded holes, and the limit frame can be fixed in the test slot through the cooperation of screws and the threaded holes.

According to some embodiments of the utility model, the chip testing jig further comprises a cover plate, the cover plate is movably connected with the base, and the cover plate can cover the base.

According to some embodiments of the utility model, one side of the cover plate is hinged with one side of the base, the other side of the cover plate is provided with a clip, and the other side of the base is provided with a clip rod matched with the clip; when the cover plate covers the base, the clip can clip the clip rod.

According to some embodiments of the utility model, a containing cavity and a pressing plate are arranged on one surface of the cover plate, which faces the base, a plurality of gaskets are arranged in the containing cavity, and the pressing plate is detachably arranged at an opening of the containing cavity.

On the other hand, the chip testing device according to the embodiment of the utility model comprises:

the chip test fixture according to the embodiment of the above aspect;

the chip testing jig is arranged on the testing main board, and the testing main board is electrically connected with the other ends of the conductive adhesive columns.

According to some embodiments of the utility model, the chip test apparatus further comprises a display screen electrically connected to the test motherboard.

According to some embodiments of the utility model, the chip test device further comprises a plurality of keys, and the keys are electrically connected with the test motherboard.

The chip testing jig and the device have the following beneficial effects: limiting the chip to be tested through a limiting frame, and ensuring that the test pins of the chip to be tested are aligned with the conductive adhesive columns accurately; the conductive adhesive column is arranged on the elastic insulating layer, so that when the test pin of the chip to be tested is contacted with the conductive adhesive column, the elastic insulating layer can play a certain role in buffering, the test pin of the chip to be tested can play a role in protecting, and the chip to be tested is prevented from being damaged; compared with the traditional probe, the conductive adhesive column has the advantages of lower cost, shorter signal transmission distance, smaller signal interference, relatively more stable signal transmission, and contribution to improving the test accuracy and reducing the cost.

Additional aspects and advantages of the utility model will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the utility model.

Drawings

The foregoing and/or additional aspects and advantages of the utility model will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:

FIG. 1 is a schematic diagram of a chip test fixture according to an embodiment of the present utility model;

FIG. 2 is a schematic diagram of a chip test fixture according to an embodiment of the present utility model with a limiting frame removed;

fig. 3 is a schematic structural diagram of a conductive adhesive structure according to an embodiment of the present utility model;

fig. 4 is a schematic structural diagram of a top view of a limiting frame according to an embodiment of the present utility model;

fig. 5 is a schematic structural diagram of a bottom view of a limiting frame according to an embodiment of the present utility model;

reference numerals:

base 100, test slot 110, reference column 120, conductive adhesive structure 200, elastic insulating layer 210, conductive adhesive column 220, support frame 230, limit frame 300, through hole 310, reference hole 320, threaded hole 330, cover plate 400, clip 410, clip lever 500, damping structure 600, and pressure plate 700.

Detailed Description

Reference will now be made in detail to the present embodiments of the present utility model, examples of which are illustrated in the accompanying drawings, wherein the accompanying drawings are used to supplement the description of the written description so that one can intuitively and intuitively understand each technical feature and overall technical scheme of the present utility model, but not to limit the scope of the present utility model.

In the description of the present utility model, a number means one or more, a number means two or more, and greater than, less than, exceeding, etc. are understood to not include the present number, and above, below, within, etc. are understood to include the present number. The description of the first and second is for the purpose of distinguishing between technical features only and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.

In the description of the present utility model, unless explicitly defined otherwise, terms such as arrangement, installation, connection, etc. should be construed broadly and the specific meaning of the terms in the present utility model can be reasonably determined by a person skilled in the art in combination with the specific contents of the technical scheme.

Referring to fig. 1 to 4, a chip test fixture according to an embodiment of the present utility model includes a base 100, a conductive adhesive structure 200, and a limiting frame 300; the base 100 is provided with a test slot 110; the conductive adhesive structure 200 is disposed in the test slot 110, the conductive adhesive structure 200 includes an elastic insulating layer 210 and a plurality of conductive adhesive columns 220, the plurality of conductive adhesive columns 220 are disposed in the elastic insulating layer 210 at intervals and penetrate through the elastic insulating layer 210, the plurality of conductive adhesive columns 220 are distributed in one-to-one correspondence with a plurality of test pins of the chip to be tested, and one end of each conductive adhesive column 220 is used for connecting the corresponding test pin of the chip to be tested; the limiting frame 300 is detachably disposed in the test slot 110, a through hole 310 adapted to the chip to be tested is formed in the limiting frame 300, and the limiting frame 300 is used for limiting the chip to be tested.

Specifically, when testing a chip to be tested, firstly selecting a limit frame 300 matched with the chip to be tested, and fixing the limit frame 300 in the test slot 110; then, placing the chip to be tested according to the through holes 310 of the limiting frame 300, so that the test pins of the chip to be tested are in one-to-one corresponding contact with the conductive adhesive columns 220; limiting the chip to be tested through the limiting frame 300, and ensuring that the test pins of the chip to be tested are aligned with the conductive adhesive columns 220 accurately; finally, the whole testing jig is placed on the testing main board, so that the other end of the conductive adhesive column 220 is electrically connected with the testing point of the testing main board, and the chip to be tested can be tested. Since the conductive adhesive column 220 is disposed on the elastic insulating layer 210, when the test pins of the chip to be tested are in contact with the conductive adhesive column 220, the elastic insulating layer 210 can play a role in buffering, protecting the test pins of the chip to be tested, and avoiding damage to the chip to be tested.

Therefore, the chip testing jig according to the embodiment of the utility model is convenient for the connection between the testing pins of the chip to be tested and the conductive adhesive column 220, and can protect the testing pins of the chip to be tested; meanwhile, compared with the traditional probe, the conductive adhesive column 220 has lower cost, shorter signal transmission distance, smaller signal interference and relatively more stable signal transmission, and is beneficial to improving the test accuracy and reducing the cost.

As shown in fig. 2, in some embodiments of the present utility model, the conductive adhesive structure 200 further includes a support frame 230, and the elastic insulating layer 210 has a plurality of elastic insulating layers 210 disposed on the support frame 230. As shown in fig. 2, in order to adapt to the test pins of the chip to be tested, a plurality of elastic insulating layers 210 are provided, so that the conductive adhesive columns 220 on the elastic insulating layers 210 are in one-to-one correspondence with the test pins of the chip to be tested; since the elastic insulating layer 210 has a plurality, the elastic insulating layer 210 is supported by the support frame 230, and thus the support frame 230 may have a hardness slightly greater than that of the elastic insulating layer 210.

The conductive adhesive column 220 is formed by metal particles and silica gel mixed together, the metal particles are used for forming a conductive path, and the elasticity of the silica gel further slows down the impact force when the chip pins are contacted with the conductive adhesive column 220, so that the chip pins are further protected.

As shown in fig. 2 and 4, in some embodiments of the present utility model, the positioning posts 120 are disposed in the test slot 110, and positioning holes 320 adapted to the positioning posts are disposed at corresponding positions on the limit frame 300. Through the cooperation of locating hole 320 and reference column 120, can realize the location to spacing frame 300 to the installation of convenient spacing frame 300 and the spacing of waiting to test the chip. As shown in fig. 2, one positioning column 120 is provided at each side of the test slot 110; as shown in fig. 5, positioning holes 320 are provided at corresponding positions on the limiting frame 300; when the limit frame 300 is installed, the locating column 120 and the locating hole 320 are used for locating, so that the installation position of the limit frame 300 is ensured to be accurate.

As shown in FIG. 3, in some embodiments of the present utility model, the stop frame 300 is provided with a plurality of threaded holes 330, and the stop frame 300 is fixed in the test slot 110 by the engagement of screws and threaded holes. By arranging the threaded holes 330 on the limit frame 300, the limit frame 300 can be fixed in the test slot 110 by matching the threaded holes 330 with screws; the spacing frame 300 is convenient to disassemble and assemble. It should be noted that, in addition to the threaded connection, the limit frame 300 may be fixed in the test slot 110 by a snap-fit manner, a vacuum manner, or the like, which is not limited thereto.

As shown in fig. 1, in some embodiments of the present utility model, the chip testing fixture further includes a cover 400, where the cover 400 is movably connected to the base 100, and the cover 400 can cover the base 100. When the chip to be tested is tested, the base 100 is covered by the cover plate 400, so that the test pins of the chip to be tested are ensured to be in close contact with the conductive adhesive columns 220, and poor contact between the test pins and the conductive adhesive columns is avoided, and the test process is prevented from being influenced; meanwhile, the cover plate 400 can prevent the test process of the chip to be tested from being disturbed.

As shown in fig. 1, in some embodiments of the present utility model, one side of a cover 400 is hinged to one side of a base 100, the other side of the cover 400 is provided with a clip 410, and the other side of the base 100 is provided with a clip lever 500 adapted to the clip 410; the clip 410 can clip the clip lever 500 when the cover plate 400 covers the base 100. When the cover plate 400 covers the base 100, the clamping rod 500 is buckled by the clamping buckle 410, so that the cover plate 400 is ensured to cover the base 100, and the limit frame 300 and the chip to be tested can be compressed; meanwhile, a damping structure 600 is provided at the hinge structure between the cover plate 400 and the base 100, and the damping structure 600 can prevent the cover plate 400 from being automatically covered in an opened state. It should be noted that, instead of using a hinged connection, the cover plate 400 and the base 100 may be movably connected by a snap connection, etc., which is not limited thereto.

As shown in fig. 1, in some embodiments of the present utility model, a receiving cavity and a pressing plate 700 are disposed on a surface of the cover plate 400 facing the base 100, a plurality of gaskets are disposed in the receiving cavity, and the pressing plate 700 is detachably disposed at an opening of the receiving cavity. Wherein, clamp plate 700 can be fixed in the opening part that holds the chamber through the fastening screw, is provided with one or more gasket in the inside that holds the chamber, when can adjust apron 400 and cover base 100 through the quantity of adjusting the gasket, clamp plate 700 treats the degree of compressing tightly of test chip to make this test fixture can adapt to the chip that awaits measuring of different thickness. According to the difference of the thickness of the chip to be tested, the number of the gaskets is adjusted, so that the chip to be tested can be tightly pressed, and the chip to be tested can be prevented from being damaged due to too large pressing degree.

On the other hand, the utility model also provides a chip testing device, which comprises the chip testing jig and the testing main board, wherein the chip testing jig and the testing main board are provided with a plurality of testing points, and the testing points are correspondingly connected with the other ends of the conductive adhesive columns 220 one by one.

When the chip to be tested is tested, the whole chip test jig is placed on the test main board, so that one end of the conductive adhesive column 220 is electrically connected with the test pins of the chip to be tested, and the other end of the conductive adhesive column is electrically connected with the test points of the test main board, and the chip to be tested can be tested through the test main board; the specific testing procedure is well known to those skilled in the art and will not be described in detail herein.

According to the chip testing device provided by the embodiment of the utility model, by adopting the chip testing jig, the connection between the testing pins of the chip to be tested and the conductive adhesive column 220 is facilitated, and the testing pins of the chip to be tested can be protected; meanwhile, compared with the traditional probe, the conductive adhesive column 220 has lower cost, shorter signal transmission distance, smaller signal interference and relatively more stable signal transmission, and is beneficial to improving the test accuracy and reducing the cost.

In some embodiments of the present utility model, the chip test apparatus further includes a display (not shown), and the display is electrically connected to the test motherboard. Through setting up the display screen to make the test mainboard can be with the test result of treating the chip that awaits measuring, show on the display screen, thereby make things convenient for the user to look over the test result directly perceivedly.

In some embodiments of the present utility model, the chip testing apparatus further includes a plurality of keys (not shown), and the keys are electrically connected to the testing motherboard. The keys may include a reset key, a test key, a power key, etc. for controlling the device to reset, test, switch on or off, etc., and through different keys, the test device is operated to execute corresponding actions.

In the description of the present specification, a description referring to the terms "one embodiment," "further embodiment," "some specific embodiments," or "some examples," etc., means that a particular feature, structure, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present utility model. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

While embodiments of the present utility model have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the spirit and principles of the utility model, the scope of which is defined by the claims and their equivalents.

Claims (10)

1. A chip test fixture, which is characterized by comprising:

the base is provided with a test groove;

the conductive adhesive structure is arranged in the test groove and comprises an elastic insulating layer and a plurality of conductive adhesive columns, the conductive adhesive columns are arranged in the elastic insulating layer at intervals and penetrate through the elastic insulating layer, the conductive adhesive columns are distributed in one-to-one correspondence with a plurality of test pins of the chip to be tested, and one ends of the conductive adhesive columns are used for connecting the test pins corresponding to the chip to be tested;

the limiting frame is detachably arranged in the test groove, a through hole matched with the chip to be tested is formed in the limiting frame, and the limiting frame is used for limiting the chip to be tested.

2. The die test fixture of claim 1, wherein the conductive adhesive structure further comprises a support frame, the elastic insulating layer has a plurality of elastic insulating layers, and the plurality of elastic insulating layers are spaced apart from each other on the support frame.

3. The chip testing jig according to claim 1, wherein a positioning column is arranged in the test groove, and the limit frame is provided with a positioning hole adapted to the positioning column.

4. The chip testing jig according to claim 1, wherein the limit frame is provided with a plurality of screw holes, and the limit frame can be fixed in the test slot by the cooperation of screws and the screw holes.

5. The die testing jig of claim 1, further comprising a cover plate movably connected to the base, the cover plate being capable of covering the base.

6. The chip testing jig according to claim 5, wherein one side of the cover plate is hinged with one side of the base, a clip is arranged on the other side of the cover plate, and a clip rod matched with the clip is arranged on the other side of the base; when the cover plate covers the base, the clip can clip the clip rod.

7. The die testing jig of claim 5, wherein a receiving cavity and a pressing plate are arranged on one surface of the cover plate facing the base, a plurality of gaskets are arranged in the receiving cavity, and the pressing plate is detachably arranged at an opening of the receiving cavity.

8. A chip testing apparatus, comprising:

the chip test fixture of any one of claims 1-7;

the chip testing jig is arranged on the testing main board, and the testing main board is electrically connected with the other ends of the conductive adhesive columns.

9. The chip testing apparatus of claim 8, further comprising a display screen electrically connected to the test motherboard.

10. The chip testing apparatus of claim 8, further comprising a plurality of keys, the keys being electrically connected to the test motherboard.