CN219496482U - Probe card for wafer test - Google Patents
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- CN219496482U CN219496482U CN202320427782.1U CN202320427782U CN219496482U CN 219496482 U CN219496482 U CN 219496482U CN 202320427782 U CN202320427782 U CN 202320427782U CN 219496482 U CN219496482 U CN 219496482U
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Abstract
The utility model provides a probe card for wafer test, comprising: the probe comprises a substrate, a structural member, a heat preservation layer and a probe; the structural member is fixed on the lower surface of the substrate and used for fixing the probe; the probe is fixed in the probe, and the probe exposes the tip of the probe; the heat preservation layer is arranged on the lower surface of the substrate, which is not covered by the structural member, so that heat exchange between the probe card and the surrounding environment is reduced, and the effect of keeping the temperature of the probe card is achieved. The heat insulation layer is arranged on the lower surface of the substrate, after the probe card is separated from the probe machine, the heat exchange between the substrate and the surrounding environment can be effectively reduced by the heat insulation layer, so that the effect of keeping the temperature of the substrate is achieved, and the temperature of the substrate is kept, namely the temperature of the probe card is kept directly, the temperature of the probe card can be kept by high-low temperature test, the effect of keeping the temperature of the probe card can be realized, and a large amount of preparation time in the test process is reduced, so that the test efficiency is effectively improved; in addition, the structure is very simple, is beneficial to process realization and has lower cost.
Description
Technical Field
The utility model relates to the technical field of semiconductor testing, in particular to a probe card for wafer testing.
Background
In the manufacture of semiconductor integrated circuit devices, semiconductor chips are generally obtained by forming a large number of integrated circuits on a wafer and dicing the wafer. The wafer in-wafer test, called CP test for short, is the last defense line before packaging, and the wafer passing the test enters a packaging cutting link, so that the CP detection quality is significant, and the standard directly influences the yield of the final testing link of the chip.
The CP test is mainly used for testing the electrical performance parameters of the crystal grains, and the functional and electrical parameter performance tests are carried out on the chips on the wafer through the cooperation of the probe station and the tester. The testing process mainly comprises the following steps: placing a wafer to be tested in a wafer frame box at the upper and lower wafer parts of a probe station, automatically loading the wafer onto a wafer carrying table (chuck), and vacuum-adsorbing the wafer on the wafer carrying table; the wafer is adsorbed by the wafer bearing table to carry out automatic alignment positioning so that the probe and the wafer testing area are in good contact; the testing machine loads the electric signals on the die to be tested through the probe card, tests the products and classifies the products according to the test results.
The role of the probe card in CP testing is to complete the electrical connection of the wafer pads or bumps to the tester. In the wafer CP testing stage, high/low temperature testing is typically performed to test the electrical properties of the wafer under extreme conditions. The traditional method is that the probe card is pricked on the wafer to be fully preheated or precooled, and the probe is retested after the deformation of the probe card is finished, so that about 2 hours of temperature pretreatment time is needed each time; in addition, if the probe card needs to be checked for needle marks or fails to be tested, the probe card needs to be lifted off a probe machine (Chuck) (a heat source), so that the probe card can recover from deformation due to temperature loss, and after the treatment is finished, the probe card needs to be pre-cooled or preheated again to be tested. These all severely extend the test time, reduce efficiency, and affect OEE. Currently, a solution to this problem is to mount a high temperature control system on the back of the probe card. The probe card can be heated continuously, so that the probe card is always kept in a fully preheated state, but the scheme can only be applied to wafer high-temperature test.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present utility model is to provide a probe card for wafer testing, which is used for solving the problems of low testing efficiency and the like caused by that the temperature of the probe card cannot be effectively maintained after the probe card is separated from a probe machine during the wafer CP testing in the prior art.
To achieve the above and other related objects, the present utility model provides a probe card for wafer testing, comprising: the probe comprises a substrate, a structural member, a heat preservation layer and a probe;
the structural member is fixed on the lower surface of the substrate and used for fixing the probe;
a probe is fixed in the probe, and the probe exposes the tip of the probe;
the heat preservation layer is arranged on the lower surface of the substrate, which is not covered by the structural member, so that heat exchange between the probe card and the surrounding environment is reduced, and the effect of keeping the temperature of the probe card is achieved.
Optionally, the probe card is an cantilever type probe card, the probe comprises a ceramic plate and a probe, the ceramic plate is fixed on the lower surface of the structural member, the probe penetrates through the ceramic plate and the structural member to be fixedly connected with the substrate, and the heat insulation layer is further arranged on the surface of the structural member, which is not covered by the ceramic plate.
Further, the material of the heat-insulating layer is consistent, and the heat-insulating layer is of an integrally formed structure, and the thickness of the heat-insulating layer is uniform or the thickness of the heat-insulating layer arranged on the lower surface of the substrate, which is not covered by the structural member, is greater than the thickness of the heat-insulating layer arranged on the surface of the structural member, which is not covered by the ceramic plate.
Further, the heat preservation layer is divided into a first heat preservation sub-layer and a second heat preservation sub-layer which are different in materials and are separated, wherein the first heat preservation sub-layer is arranged on the lower surface of the substrate, which is not covered by the structural member, and the second heat preservation sub-layer is arranged on the surface of the structural member, which is not covered by the ceramic plate.
Further, the first heat-insulating sub-layer is one of an aluminum silicate ceramic fiber layer, a zirconium-containing fiber layer, a mullite fiber layer, an aluminum oxide fiber layer, a silicon dioxide fiber layer, a silicon carbide fiber layer, a polyurethane layer, a damping gel layer, an aerogel layer, a polyethylene layer, a polyvinyl chloride layer, a polypropylene resin layer, a ceramic heat insulation plate and a nano heat-insulating material layer; the second heat preservation sublayer is one of an aluminum silicate ceramic fiber layer, a zirconium-containing fiber layer, a mullite fiber layer, an aluminum oxide fiber layer, a silicon dioxide fiber layer, a silicon carbide fiber layer, a polyurethane layer, a damping gel layer, an aerogel layer, a polyethylene layer, a polyvinyl chloride layer, a polypropylene resin layer and a nanometer heat insulation material layer.
Optionally, the probe card is a vertical probe card, the probe is detachably connected in the structural member, and the heat insulation layer is further arranged on the outer side wall of the structural member and the surface of the probe, which is outside the area where the probe is located, on the probe.
Further, the heat-insulating layer arranged on the lower surface of the substrate, which is not covered by the structural member, and the heat-insulating layer arranged on the outer side wall of the structural member are of an integrated structure, and the heat-insulating layer arranged on the probe surface outside the area where the probe is located on the probe is detachably connected with the probe.
Optionally, the heat-insulating layer is one of an aluminum silicate ceramic fiber layer, a zirconium-containing fiber layer, a mullite fiber layer, an aluminum oxide fiber layer, a silicon dioxide fiber layer, a silicon carbide fiber layer, a polyurethane layer, a damping gel layer, an aerogel layer, a polyethylene layer, a polyvinyl chloride layer, a polypropylene resin layer, a ceramic heat-insulating plate and a nano heat-insulating material layer.
Optionally, the lower surface of the heat insulation layer does not exceed the lower surface of the probe, and the substrate is a PCB.
Optionally, the heat insulation layer is fixed on the substrate through bolts.
As described above, the probe card for wafer test of the utility model has the advantages that the heat insulation layer is arranged on the lower surface of the substrate, after the probe card is separated from the probe machine, the heat exchange between the substrate and the surrounding environment can be effectively reduced by the heat insulation layer, so that the effect of keeping the temperature of the substrate is achieved, the temperature of the substrate is kept, namely the temperature of the probe card is kept directly, the temperature keeping effect of the probe card can be realized by high and low temperature tests, a large amount of preparation time in the test process can be reduced, and the test can enter a formal test link more quickly, so that the test efficiency is effectively improved; in addition, the structure is very simple, is beneficial to process realization and has lower cost.
Drawings
Fig. 1 is a schematic view showing a structure of a probe card for wafer testing according to a first example of the present utility model.
Fig. 2 is a schematic structural view of a probe card for wafer testing according to a second example of the present utility model.
Fig. 3 is a schematic structural view of a probe card for wafer testing according to a third example of the present utility model.
Fig. 4 is a schematic structural view of a probe card for wafer testing according to a fourth example of the present utility model.
Fig. 5 is a schematic structural view of a probe card for wafer testing according to a fifth example of the present utility model.
Fig. 6 is a schematic structural view of a probe card for wafer testing according to a sixth example of the present utility model.
Description of element reference numerals
10. Substrate board
11. Structural member
12. Probe head
120. Ceramic plate
121. Probe with a probe tip
122. Needle tip
13. Thermal insulation layer
130. First heat-insulating sublayer
131. Second heat-insulating sublayer
14. Reinforcing plate
Detailed Description
Further advantages and effects of the present utility model will become apparent to those skilled in the art from the disclosure of the present utility model, which is described by the following specific examples.
Please refer to fig. 1 to 6. It should be understood that the structures, proportions, sizes, etc. shown in the drawings are for illustration purposes only and should not be construed as limiting the utility model to the extent that it can be practiced, since modifications, changes in the proportions, or otherwise, used in the practice of the utility model, are not intended to be critical to the essential characteristics of the utility model, but are intended to fall within the spirit and scope of the utility model. Also, the terms such as "upper," "lower," "left," "right," "middle," and "a" and the like recited in the present specification are merely for descriptive purposes and are not intended to limit the scope of the utility model, but are intended to provide relative positional changes or modifications without materially altering the technical context in which the utility model may be practiced.
As shown in fig. 1 and 6, the present utility model provides a probe station for wafer testing, the probe card comprising: a substrate 10, a structural member 11, a heat insulation layer 13 and a probe 12;
wherein the structural member 11 is fixed on the lower surface of the base plate 10 and is used for fixing the probe 12;
a probe 121 is fixed in the probe 12, and the probe 12 exposes a tip 122 of the probe 121;
the heat-insulating layer 13 is disposed on the lower surface of the substrate 10, which is not covered by the structural member 11, so as to reduce heat exchange between the probe card and the surrounding environment, and achieve the effect of maintaining the temperature of the probe card.
The orientations of the upper, lower, etc. surfaces in this embodiment are based on the placement state of the probe card in the drawing as a reference. Generally, the area occupied by the probe head and the structural member is relatively small compared with the substrate, so that the area of the structural member and the probe head is relatively small compared with the substrate, namely, the substrate is the largest heat exchange source in the probe card.
In this embodiment, the heat insulation layer 13 is disposed on the lower surface of the substrate 10, after the probe card is separated from the probe machine, the heat insulation layer 13 can effectively reduce heat exchange between the substrate 10 and the surrounding environment, so as to achieve the effect of maintaining the temperature of the substrate 10, and since the surface area of the substrate 10 is relatively maximum, the temperature of the substrate 10 is maintained, that is, the temperature of the probe card is directly maintained, that is, when the wafer is in a low-temperature electrical test, the low-temperature state of the probe card can be effectively maintained under the action of the heat insulation layer, and when the wafer is in a high Wen Dianxing test, the high-temperature state of the probe card can be effectively maintained under the action of the heat insulation layer, and the high-temperature and low-temperature can achieve the effect of maintaining the temperature of the probe card. Thus, a large amount of preparation time in the test process can be reduced, and the test can enter a formal test link more quickly, so that the test efficiency is effectively improved; in addition, the structure is very simple, is beneficial to process realization and has lower cost.
As an example, the number of the probes 121 is plural, and 4 probes 121 are only shown as an illustration, in practice, the number of the probes 121 needs to be determined according to the circuit in the wafer, and the number of the probes 121 suitable for the wafer test is not particularly limited herein.
Currently, probe cards for wafer testing are classified into a cantilever type probe card and a vertical type probe card, wherein the cantilever type probe card and the vertical type probe card are distinguished by the type of the probe 121, the probe 121 is bent to form the cantilever type probe card, and the probe 121 is vertical to form the vertical type probe card.
Referring to fig. 1 to 5, a cantilever probe card is shown, in which a probe head 12 includes a ceramic plate 120 and probes 121, the ceramic plate 120 is fixed on the lower surface of the structural member 11, and the probes 121 penetrate through the ceramic plate 120 and the structural member 11 to be fixedly connected with the substrate 10. The size of the probe 12 in this structure is generally smaller than the size of the structural member 11, where the size refers to the surface area, so that the heat-insulating layer 13 is further provided on the surface of the structural member 11 not covered by the ceramic plate 120, as shown in fig. 2, including the outer side and the lower surface of the structural member 11. Of course, as shown in fig. 3, when the thickness of the insulating layer 13 on the surface of the substrate 10 is greater than the thickness of the structural member 11, the insulating layer 13 on the structural member 11 is the insulating layer 13 on the lower surface of the structural member 11. So as to further increase the heat preservation area of the heat preservation layer 13, reduce the heat exchange between the probe card and the surrounding environment, and further improve the heat preservation effect of the probe card.
As shown in fig. 1 to 5, the heat insulating layer 13 is fixed to the substrate 10 by bolts as an example, that is, when the heat insulating layer 13 is provided only on the surface of the substrate 10, the heat insulating layer 13 is fixed to the substrate 10 by bolts; when the heat-insulating layer 13 is disposed on the surface of the substrate 10 and the surface of the structural member 11, the heat-insulating layer 13 is fixed on the substrate 10 by bolts, and the heat-insulating layer 13 on the surface of the structural member 11 is fixed on the structural member 11 by coating.
As shown in fig. 2, when the heat-insulating layer 13 is disposed on the lower surface of the substrate 10 that is not covered by the structural member 11 and on the surface of the structural member 11 that is not covered by the ceramic plate 120, the material of the heat-insulating layer 13 may be a uniform and integrally formed structure and have a uniform thickness. That is, the insulating layer 13 below the substrate 10 is made of the same material as the insulating layer 13 on the structural member 11, and is formed integrally with the same thickness. However, as shown in fig. 3, the thickness of the insulating layer 13 provided on the lower surface of the substrate 10 not covered by the structural member 11 may be larger than the thickness of the insulating layer 13 provided on the lower surface of the structural member 11 not covered by the ceramic plate 120. When the heat insulating layer 13 provided on the lower surface of the substrate 10, which is not covered by the structural member 11, is identical to the heat insulating layer 13 provided on the surface of the structural member 11, which is not covered by the ceramic plate 120, the heat insulating layer 13 may be one of an aluminum silicate ceramic fiber layer, a zirconium-containing fiber layer, a mullite fiber layer, an aluminum oxide fiber layer, a silicon dioxide fiber layer, a silicon carbide fiber layer, a polyurethane layer, a damping gel layer, an aerogel layer, a polyethylene layer, a polyvinyl chloride layer, a polypropylene resin layer, a ceramic heat insulating plate, and a nano heat insulating material layer.
As shown in fig. 4 and 5, when the heat-insulating layer 13 is disposed on the lower surface of the substrate 10 that is not covered by the structural member 11 and on the surface of the structural member 11 that is not covered by the ceramic plate 120, the heat-insulating layer 13 may be formed of a first heat-insulating sub-layer 130 and a second heat-insulating sub-layer 131 that are made of different materials and are separated, wherein the first heat-insulating sub-layer 130 is disposed on the lower surface of the substrate 10 that is not covered by the structural member 11, and the second heat-insulating sub-layer 131 is disposed on the surface of the structural member 11 that is not covered by the ceramic plate 120. The thickness of the first thermal insulation sub-layer 130 and the second thermal insulation sub-layer 131 may be the same, as shown in fig. 4; the thicknesses of the first thermal insulation sub-layer 130 and the second thermal insulation sub-layer 131 may also be different, as shown in fig. 5, preferably, when the thicknesses of the first thermal insulation sub-layer 130 and the second thermal insulation sub-layer 131 are different, the thickness of the first thermal insulation sub-layer 130 is greater than the thickness of the second thermal insulation sub-layer 131. As an example, the first thermal insulation sub-layer 140 is one of an aluminum silicate ceramic fiber layer, a zirconium-containing fiber layer, a mullite fiber layer, an aluminum oxide fiber layer, a silicon dioxide fiber layer, a silicon carbide fiber layer, a polyurethane layer, a damping gel layer, an aerogel layer, a polyethylene layer, a polyvinyl chloride layer, a polypropylene resin layer, a ceramic thermal insulation board and a nano thermal insulation material layer; the second heat insulation sub-layer 141 is one of an aluminum silicate ceramic fiber layer, a zirconium-containing fiber layer, a mullite fiber layer, an aluminum oxide fiber layer, a silicon dioxide fiber layer, a silicon carbide fiber layer, a polyurethane layer, a damping gel layer, an aerogel layer, a polyethylene layer, a polyvinyl chloride layer, a polypropylene resin layer and a nano heat insulation material layer.
Referring to fig. 6, a structure of a vertical probe card is shown, in which a probe 12 is detachably connected to the structural member 11, and the heat insulation layer 13 is further disposed on the outer side wall of the structural member 11 and the surface of the probe outside the area where the probe is located on the probe 12. As a preferable example, the heat-insulating layer 13 provided on the lower surface of the substrate 10 not covered by the structural member 11 and the heat-insulating layer 13 provided on the outer side wall of the structural member 11 are integrally formed, and the heat-insulating layer 13 provided on the probe 12 on the probe surface other than the area where the probe 121 is located is detachably connected to the probe 12, for example, by a bolting method.
As shown in fig. 6, as an example, when the heat insulating layer 13 is provided on the substrate 10, the heat insulating layer 13 is fixed on the substrate 10 by bolts; when the heat-insulating layer 13 is disposed on the substrate 10 and the heat-insulating layer 13 integrally formed on the outer side wall of the structural member 11, the heat-insulating layer is fixed on the substrate 10 by bolts.
As shown in fig. 6, in the vertical probe card, the material of the heat insulating layer 13 may be selected from one of an aluminum silicate ceramic fiber layer, a zirconium-containing fiber layer, a mullite fiber layer, an aluminum oxide fiber layer, a silicon dioxide fiber layer, a silicon carbide fiber layer, a polyurethane layer, a damping gel layer, an aerogel layer, a polyethylene layer, a polyvinyl chloride layer, a polypropylene resin layer, a ceramic heat insulating plate, and a nano heat insulating material layer.
As shown in fig. 6, a reinforcing plate 14 is disposed on a surface of the substrate 10 away from the probe 12, and the reinforcing plate 14 serves as a reinforcing member of the substrate 10 for reinforcing the strength of the substrate 10.
As shown in fig. 1 to 6, the lower surface of the insulating layer 13 does not exceed the lower surface of the probe 12, as an example. To prevent the thermal insulation layer 13 from being too thick, so that the thermal insulation layer 13 is scratched to the wafer during wafer test, or the probe 12 is in poor contact with the wafer, and the test effect is affected.
As shown in fig. 1 to 6, the substrate 10 is typically a PCB circuit board, as an example.
In summary, the utility model provides a probe card for wafer test, by arranging the heat-insulating layer on the lower surface of the substrate, after the probe card is separated from the probe machine, the heat-insulating layer can effectively reduce heat exchange between the substrate and the surrounding environment, thereby achieving the effect of keeping the temperature of the substrate, and as the surface area of the substrate is relatively maximum, the temperature of the substrate is kept, namely the temperature of the probe card is kept, the effect of keeping the temperature of the probe card can be realized by high and low temperature test, so that a large amount of preparation time in the test process can be reduced, and the test can enter a formal test link more quickly, thereby effectively improving the test efficiency; in addition, the structure is very simple, is beneficial to process realization and has lower cost. Therefore, the utility model effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present utility model and its effectiveness, and are not intended to limit the utility model. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the utility model. Accordingly, it is intended that all equivalent modifications and variations of the utility model be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (10)
1. A probe card for wafer testing, the probe card comprising: the probe comprises a substrate, a structural member, a heat preservation layer and a probe;
the structural member is fixed on the lower surface of the substrate and used for fixing the probe;
a probe is fixed in the probe, and the probe exposes the tip of the probe;
the heat preservation layer is arranged on the lower surface of the substrate, which is not covered by the structural member, so that heat exchange between the probe card and the surrounding environment is reduced, and the effect of keeping the temperature of the probe card is achieved.
2. The probe card for wafer testing according to claim 1, wherein: the probe card is an cantilever type probe card, the probe comprises a ceramic plate and a probe, the ceramic plate is fixed on the lower surface of the structural member, the probe penetrates through the ceramic plate and the structural member to be fixedly connected with the substrate, and the heat insulation layer is further arranged on the surface of the structural member which is not covered by the ceramic plate.
3. The probe card for wafer testing according to claim 2, wherein: the heat-insulating layer is made of uniform materials, is of an integrated structure and is uniform in thickness; or the materials of the heat preservation layers are consistent, the heat preservation layers are of an integrated structure, and the thickness of the heat preservation layers arranged on the lower surface of the substrate, which is not covered by the structural member, is larger than that of the heat preservation layers arranged on the surface of the structural member, which is not covered by the ceramic plate.
4. The probe card for wafer testing according to claim 2, wherein: the heat preservation is divided into a first heat preservation sub-layer and a second heat preservation sub-layer which are different in materials and are separated, wherein the first heat preservation sub-layer is arranged on the lower surface of the substrate, which is not covered by the structural member, and the second heat preservation sub-layer is arranged on the surface of the structural member, which is not covered by the ceramic plate.
5. The probe card for wafer testing according to claim 4, wherein: the first heat preservation sublayer is one of an aluminum silicate ceramic fiber layer, a zirconium-containing fiber layer, a mullite fiber layer, an aluminum oxide fiber layer, a silicon dioxide fiber layer, a silicon carbide fiber layer, a polyurethane layer, a damping gel layer, an aerogel layer, a polyethylene layer, a polyvinyl chloride layer, a polypropylene resin layer, a ceramic heat insulation plate and a nano heat insulation material layer; the second heat preservation sublayer is one of an aluminum silicate ceramic fiber layer, a zirconium-containing fiber layer, a mullite fiber layer, an aluminum oxide fiber layer, a silicon dioxide fiber layer, a silicon carbide fiber layer, a polyurethane layer, a damping gel layer, an aerogel layer, a polyethylene layer, a polyvinyl chloride layer, a polypropylene resin layer and a nanometer heat insulation material layer.
6. The probe card for wafer testing according to claim 1, wherein: the probe card is a vertical probe card, the probe is detachably connected in the structural member, and the heat insulation layer is further arranged on the outer side wall of the structural member and the surface of the probe, except for the area where the probe is located, on the probe.
7. The probe card for wafer testing according to claim 6, wherein: the heat preservation layer arranged on the lower surface of the substrate, which is not covered by the structural member, and the heat preservation layer arranged on the outer side wall of the structural member are of an integrated structure, and the heat preservation layer arranged on the probe surface outside the area where the probe is arranged on the probe is detachably connected with the probe.
8. The probe card for wafer testing according to claim 1, 2 or 6, wherein: the heat preservation layer is one of an aluminum silicate ceramic fiber layer, a zirconium-containing fiber layer, a mullite fiber layer, an aluminum oxide fiber layer, a silicon dioxide fiber layer, a silicon carbide fiber layer, a polyurethane layer, a damping gel layer, an aerogel layer, a polyethylene layer, a polyvinyl chloride layer, a polypropylene resin layer, a ceramic heat insulation plate and a nano heat insulation material layer.
9. The probe card for wafer testing according to any one of claims 1 to 7, wherein: the lower surface of the heat preservation layer does not exceed the lower surface of the probe, and the substrate is a PCB.
10. The probe card for wafer testing according to claim 1, wherein: the heat preservation layer is fixed on the substrate through bolts.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320427782.1U CN219496482U (en) | 2023-03-08 | 2023-03-08 | Probe card for wafer test |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320427782.1U CN219496482U (en) | 2023-03-08 | 2023-03-08 | Probe card for wafer test |
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| Publication Number | Publication Date |
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| CN219496482U true CN219496482U (en) | 2023-08-08 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202320427782.1U Active CN219496482U (en) | 2023-03-08 | 2023-03-08 | Probe card for wafer test |
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| CN (1) | CN219496482U (en) |
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