CN218956721U - Diode array test circuit - Google Patents
Diode array test circuit Download PDFInfo
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- CN218956721U CN218956721U CN202222155896.3U CN202222155896U CN218956721U CN 218956721 U CN218956721 U CN 218956721U CN 202222155896 U CN202222155896 U CN 202222155896U CN 218956721 U CN218956721 U CN 218956721U
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Abstract
The utility model provides a diode array test circuit, which comprises a communication socket and a plurality of diode test unit circuits, wherein each diode test unit circuit comprises a first relay and a second relay, a pin 8 of the first relay and a pin 8 of the second relay are electrically connected with a pin 6 of the communication socket, a pin 1 of the first relay and a pin 1 of the second relay are electrically connected with a pin 20 of the communication socket, a pin 6 of the first relay is a semiconductor test leading-out end As, a pin 3 of the first relay is a semiconductor test leading-out end Af, a pin 6 of the second relay is a semiconductor test leading-out end Cs, and a pin 3 of the second relay is a semiconductor test leading-out end Cf; the diode array test circuit has higher flexibility, can be used for switching various test seats according to different device packages, and can be used for adapting various packaged devices.
Description
Technical Field
The utility model belongs to the technical field of electronic device verification, and particularly relates to a diode array test circuit.
Background
The components and parts are usually required to be tested for electrical performance before leaving factory, long-time idling or use, so as to ensure normal function of the components and parts, the diode belongs to the most common discrete components, the diode is used in circuits such as a switch, a voltage stabilizing circuit, a rectifying circuit, a limiting circuit, a protecting circuit and the like, the inside of the diode array is formed by combining a plurality of independent diode groups, and the performance of each diode is required to be tested independently during testing. The traditional method is time-consuming and labor-consuming for testing by test staff, and has high operation difficulty or even can not be manually operated when encountering devices with smaller sizes.
Many equipment manufacturers have similar auxiliary clamps for array devices at present, but the special performance is higher, the equipment can only be used by the manufacturers, and various packaged devices are layered with the rapid development of the semiconductor industry, and the equipment manufacturers can only meet the test of common packaged devices.
Disclosure of Invention
The utility model aims to solve the problems that the conventional diode test requires a tester to test each diode, which is time-consuming and labor-consuming, and has high operation difficulty and even can not be manually operated when encountering devices with smaller sizes.
In order to achieve the above object, the utility model provides a diode array test circuit, which comprises a communication socket and a plurality of diode test unit circuits, wherein the diode test unit circuits comprise a first relay and a second relay, the pin 8 of the first relay and the pin 8 of the second relay are electrically connected with the pin 6 of the communication socket, the pin 1 of the first relay and the pin 1 of the second relay are electrically connected with the pin 20 of the communication socket, the pin 6 of the first relay is a semiconductor test leading-out end As, the pin 3 of the first relay is a semiconductor test leading-out end Af, the pin 6 of the second relay is a semiconductor test leading-out end Cs, and the pin 3 of the second relay is a semiconductor test leading-out end Cf.
Further, 1 to 8 diode test unit circuits can be arranged.
Further, the types of the first relay and the second relay are TQ2-12V.
Further, the communication socket is a socket with DSUB1 of 25P.
Further, the diode array test circuit further comprises an European style mother seat.
The utility model has the advantages that: the diode array test circuit provided by the utility model has the advantages that the relay is controlled, each diode in the multi-path diode array is independently tested, the test error can be reduced in a Kelvin connection mode, the flexibility is higher, and various test seats can be switched according to different device packages, so that the adaptation to various packaged devices is realized.
The utility model will now be described in detail with reference to the drawings and examples.
Drawings
FIG. 1 is a schematic diagram of a diode array test circuit according to the present utility model.
Fig. 2 is a schematic diagram of pin definition of the euro socket.
Detailed Description
The following detailed description, structural features and functions of the present utility model are provided with reference to the accompanying drawings and examples in order to further illustrate the technical means and effects of the present utility model to achieve the predetermined objects.
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
In the description of the present utility model, it should be understood that the terms "center," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "aligned," "overlapping," "bottom," "inner," "outer," and the like indicate orientations or positional relationships based on the orientation or positional relationships shown in the drawings, merely to facilitate description of the present utility model and simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operate in a specific orientation, and therefore should not be construed as limiting the present utility model.
The terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second" may include one or more such features, either explicitly or implicitly; in the description of the present utility model, unless otherwise indicated, the meaning of "a plurality" is two or more.
Example 1
The embodiment provides a diode array test circuit as shown in fig. 1-2, which comprises a communication socket and a plurality of diode test unit circuits, wherein each diode test unit circuit can complete the test of one diode; the diode test unit circuit comprises a first relay and a second relay, wherein a pin 8 of the first relay and a pin 8 of the second relay are electrically connected with a pin 6 of the communication socket, a pin 1 of the first relay and a pin 1 of the second relay are electrically connected with a pin 20 of the communication socket, a pin 6 of the first relay is a semiconductor test leading-out end As, a pin 3 of the first relay is a semiconductor test leading-out end Af, a pin 6 of the second relay is a semiconductor test leading-out end Cs, and a pin 3 of the second relay is a semiconductor test leading-out end Cf; the test lead-out end As and the test lead-out end Af are anode lead-out ends, and the test lead-out end Cs and the test lead-out end Cf are cathode lead-out ends.
Furthermore, 1 to 8 diode test unit circuits can be arranged, that is, the diode array test circuit can complete the test of 8 paths of diodes at most; FIG. 2 is a schematic diagram of a circuit with a 2-way diode test cell connected thereto; when the diode test unit circuits are needed to be added, the diode test unit circuits with the corresponding paths are added according to the needs, and the pins 1 of the first relay and the pins 1 of the second relay of each path of diode test unit circuit are connected with the pins of the communication socket.
Further, the types of the first relay and the second relay are TQ2-12V.
Further, the communication socket is a socket with DSUB1 of 25P.
Further, the diode array test circuit further includes an euclidean socket, as shown in fig. 2, and U18 and U19 are two 32P euclidean sockets for switching different adapters; when the banana head is inserted into the adapter interface of the equipment in use, the 25P flat cable is used for the equipment to control the operation of the relay of the test board, and the number of channels is selected according to actual conditions, so that the test can be started.
The diode array test circuit controls the operation of the array through a 25P plug and socket, wherein the anodes of the relays are commonly connected with each other, and the diode array test circuit controls different relay access circuits by grounding the cathode of each relay. When the test program is edited before testing, the paths (default paths) needed to be used are checked according to the requirements, after the test program is edited, the proper adapter seats are selected to enable the anode and the cathode of the diode array to be in one-to-one correspondence with the anode and the cathode of the array, and the test circuit is sequentially arranged on each port according to the sequence of P1-P8 on the schematic diagram. And the normally open end of the relay is connected with the signal output end of the test equipment, the movable points are respectively connected with the single PN junction of the diode array, and the test is started after the test key is pressed.
In summary, according to the diode array test circuit, the relay is controlled to independently test each diode in the multi-path diode array, and the test error can be reduced in a Kelvin connection mode, so that the diode array test circuit has higher flexibility, can be used for switching various test seats according to different device packages, and is suitable for various packaged devices.
The foregoing is a further detailed description of the utility model in connection with the preferred embodiments, and it is not intended that the utility model be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the utility model, and these should be considered to be within the scope of the utility model.
Claims (5)
1. A diode array test circuit, characterized by: including communication socket, a plurality of diode test unit circuit, diode test unit circuit includes first relay, second relay, pin 8 of first relay, pin 8 of second relay all are connected with communication socket's pin 6 electricity, pin 1 of first relay, pin 1 of second relay all are connected with communication socket's pin 20 electricity, pin 6 of first relay is semiconductor test leading-out end As, pin 3 of first relay is semiconductor test leading-out end Af, pin 6 of second relay is semiconductor test leading-out end Cs, pin 3 of second relay is semiconductor test leading-out end Cf.
2. The diode array test circuit of claim 1, wherein: the number of the diode test unit circuits can be 1-8.
3. The diode array test circuit of claim 1, wherein: the types of the first relay and the second relay are TQ2-12V.
4. The diode array test circuit of claim 1, wherein: the communication socket is a socket with DSUB1 of 25P.
5. The diode array test circuit of claim 1, wherein: also comprises an European style female seat.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202222155896.3U CN218956721U (en) | 2022-08-16 | 2022-08-16 | Diode array test circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202222155896.3U CN218956721U (en) | 2022-08-16 | 2022-08-16 | Diode array test circuit |
Publications (1)
Publication Number | Publication Date |
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CN218956721U true CN218956721U (en) | 2023-05-02 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN202222155896.3U Active CN218956721U (en) | 2022-08-16 | 2022-08-16 | Diode array test circuit |
Country Status (1)
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CN (1) | CN218956721U (en) |
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2022
- 2022-08-16 CN CN202222155896.3U patent/CN218956721U/en active Active
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