CN218918849U - Integrated silicon carbide power unit - Google Patents
Integrated silicon carbide power unit Download PDFInfo
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- CN218918849U CN218918849U CN202222032451.6U CN202222032451U CN218918849U CN 218918849 U CN218918849 U CN 218918849U CN 202222032451 U CN202222032451 U CN 202222032451U CN 218918849 U CN218918849 U CN 218918849U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The utility model discloses an integrated silicon carbide power unit, comprising: the power unit is formed by welding the upper surface of the heat radiating unit and the lower surface of the double-sided copper-clad insulating board; the double-sided copper-clad insulating plate is formed with a silicon carbide wafer. The first negative electrode copper-clad surface is formed on the right side of the upper part of the upper surface of the double-sided copper-clad insulating plate; the second negative electrode copper-clad surface is formed on the left side of the upper part of the upper surface of the double-sided copper-clad insulating plate; the positive electrode copper-clad surface is formed on the upper part of the upper surface of the double-sided copper-clad insulating plate between the first negative electrode copper-clad surface and the second negative electrode copper-clad surface; the phase output copper-clad surface is formed on the upper surfaces of the double-sided copper-clad insulating plates below the first negative copper-clad surface, the second negative copper-clad surface and the positive copper-clad surface; the low-side driving plate is formed on the upper surface of the double-sided copper-clad insulating plate below the phase output copper-clad surface; the high-side driving plate is formed in the middle of the anode copper-clad surface. Compared with the existing standard module, the power unit saves the frame cost, reduces the transmission path of the third-generation semiconductor control signal, and improves the anti-interference capability of the signal.
Description
Technical Field
The utility model relates to the field of semiconductor manufacturing, in particular to an integrated silicon carbide power unit.
Background
IGBT module applications of silicon materials are now very popular, and an inverter unit composed of a general silicon device includes: the PCB is mounted above the IGBT, supported and fixed by the frame of the IGBT, and the signal terminals are connected into the PCB after being fixed by the signal frame and connected with driving signals on the driving board. The connection mode is the most economical and applicable connection mode in the process of mass verification in IGBT of silicon materials. However, since the switching speed of silicon carbide is tens or hundreds times that of a silicon device, a traditional connection mode is still adopted between a signal terminal of a power module and a driving plate, and the signal conduction path is too long, so that signals are easy to be disturbed, in order to solve the problem of interference, the switching speed of the power device can only be reduced, and further the switching speed of the power device cannot be fully exerted, and the exertion of the performance of the silicon carbide is restricted.
Disclosure of Invention
In the summary section, a series of simplified form concepts are introduced that are all prior art simplifications in the section, which are described in further detail in the detailed description section. The summary of the utility model is not intended to define the key features and essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
The utility model aims to provide an integrated silicon carbide power unit which is shorter in signal conduction path and can avoid signal interference compared with the prior art.
To solve the above technical problems, an integrated silicon carbide power unit includes:
the upper surface of the radiating unit D1 is welded with the lower surface of the double-sided copper-clad insulating plate S1;
a double-sided copper-clad insulating plate S1 formed with a silicon carbide wafer.
The form of the heat dissipation unit D1 is not limited, and can be a pin fin form, a closed water channel form, a plane bottom plate form and the like
The insulating material of the double-sided copper-clad insulating plate S1 is not limited, and may be ceramic material, SIN material, etc
The lower surface of the double-sided copper-clad insulating plate S1 is connected with the radiating unit in a welding mode, the welding mode is not limited, and the welding mode can be tin sheet welding, sintering welding and the like
Optionally, the integrated silicon carbide power unit is further improved, and the following electrical structure is formed on the upper surface of the double-sided copper-clad insulating plate S1;
a first negative electrode copper-clad surface S11 formed on the right side of the upper part of the upper surface of the double-sided copper-clad insulating plate S1;
a second negative electrode copper-clad surface S12 formed on the left side of the upper surface of the double-sided copper-clad insulating plate S1;
the first negative electrode copper-clad surface of the S11 is provided with a first negative electrode output terminal S111, and the first negative electrode copper-clad surface of the S12 is provided with a second negative electrode output terminal S121. The output terminal is not limited in form, and is a square copper column which is welded to the copper-clad surface of the negative electrode in a welding mode;
a positive electrode copper-clad surface S13 formed on the upper surface of the double-sided copper-clad insulating plate S1 between the first negative electrode copper-clad surface S11 and the second negative electrode copper-clad surface S12;
a phase output copper-clad surface S14 formed on the upper surface of the double-sided copper-clad insulating plate S1 below the first negative copper-clad surface S11, the second negative copper-clad surface S12, and the positive copper-clad surface S13;
a low-side drive plate S15 formed on the upper surface of the double-sided copper-clad insulation plate S1 below the phase output copper-clad surface S14;
the high-side driving plate S16 is formed in the middle of the positive electrode copper-clad surface S13.
Optionally, the integrated silicon carbide power unit is further improved, and a first negative output terminal S111 is formed on an upper portion of the first negative copper-clad surface S11.
Optionally, the integrated silicon carbide power unit is further improved, and a second negative output terminal S121 is formed on an upper portion of the second negative copper-clad surface S12.
Optionally, the integrated silicon carbide power unit is further improved, and the first positive electrode output terminal S131 is formed on the left side of the top of the positive electrode copper-clad surface S13;
a second positive electrode output terminal S132 formed on the right side of the top of the positive electrode copper-clad surface S13;
the high-side silicon carbide wafer group S133 is formed on the positive electrode copper-clad surface S13 below the high-side drive plate S16.
Optionally, the integrated silicon carbide power unit is further improved, the high-side silicon carbide wafer group S133 comprises N wafers connected in parallel, the base and emitter control signals of each wafer in the wafer group are connected to the bonding pad S161 on the high-side driving plate S16 from the wafer surface through bonding wires, and the emitter of each wafer in the high-side silicon carbide wafer group S133 is also connected to the phase output copper-clad surface S14 through bonding wires, wherein N is not less than 2. The number of wires is determined by the current flowing. The collector electrode of the wafer is connected with the anode copper-clad surface through welding, the welding mode is not limited, and the optimal connection mode is sintering connection.
Optionally, the integrated silicon carbide power unit is further improved, and the high-side driving board S16 comprises a driving circuit, a wire bonding pad S161 and a PCB S162;
the driving signal for driving the short circuit is connected to the wire bonding pad S161 through the PCB trace, the surface of the wire bonding pad S161 is subjected to the plating metal treatment, and the size of the wire bonding pad is greater than 3 times of the width of the wire bonding cable.
Optionally, the integrated silicon carbide power unit is further improved, and a phase output terminal S141 is formed in the middle of the phase output copper-clad surface S14;
a first low-side wafer set S142 formed on the left side of the phase output copper-clad surface S14;
the second low-side wafer set S143 is formed on the right side of the phase output copper-clad surface S14.
Optionally, the integrated silicon carbide power unit is further improved, the first low-side wafer set S142 and the second low-side wafer set S143 are formed by connecting N/2 wafers in parallel, the base and emitter control signals of each wafer in the wafer set are connected to the bonding pads S161 on the low-side driving plate S15 from the wafer surface through bonding wires, the emitters of each wafer are also connected to the first negative-electrode copper-clad surface S11 and the second negative-electrode copper-clad surface S12 through bonding wires, and the collector of the wafer is connected to the positive-electrode copper-clad surface through bonding wires, wherein the bonding number of the bonding wires is determined by the flowing current. The collecting electrodes of the wafer are connected through the anode copper-clad surface, the connection mode is not limited, and the optimal connection mode is silver sintering connection.
Compared with the existing standard module, the power unit does not need a signal terminal fixing frame, and the frame cost is saved. The transmission path of the third-generation semiconductor control signal is reduced, the anti-interference capability of the signal is improved, and the performance of the third-generation semiconductor device is exerted to the maximum extent.
Drawings
The accompanying drawings are intended to illustrate the general features of methods, structures and/or materials used in accordance with certain exemplary embodiments of the utility model, and supplement the description in this specification. The drawings of the present utility model, however, are schematic illustrations that are not to scale and, thus, may not be able to accurately reflect the precise structural or performance characteristics of any given embodiment, the present utility model should not be construed as limiting or restricting the scope of the numerical values or attributes encompassed by the exemplary embodiments according to the present utility model. The utility model is described in further detail below with reference to the attached drawings and detailed description:
fig. 1 is a schematic diagram of the structure of the present utility model.
Fig. 2 is a schematic diagram of a second embodiment of the present utility model.
Fig. 3 is a schematic diagram of a third embodiment of the present utility model.
Description of the reference numerals
Heat radiation unit D1
Double-sided copper-clad insulating board S1
First negative electrode copper-clad surface S11
First negative electrode output terminal S111
Second negative electrode output terminal S121
Second negative electrode copper-clad surface S12
Positive electrode copper-clad surface S13
First positive electrode output terminal S131
Second positive electrode output terminal S132
High-side silicon carbide wafer group S133
Phase output copper-clad surface S14
Low side driving plate S15
Phase output terminal S141
First low-side wafer set S142
Second low-side wafer set S143
High-side driving plate S16
Wire bonding pad S161
And a PCB S162.
Detailed Description
Other advantages and technical effects of the present utility model will become more fully apparent to those skilled in the art from the following disclosure, which is a detailed description of the present utility model given by way of specific examples. The utility model may be practiced or carried out in different embodiments, and details in this description may be applied from different points of view, without departing from the general inventive concept. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict. The following exemplary embodiments of the present utility model may be embodied in many different forms and should not be construed as limited to the specific embodiments set forth herein. It should be appreciated that these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the technical solution of these exemplary embodiments to those skilled in the art.
A first embodiment;
referring to fig. 1, the present utility model provides an integrated silicon carbide power cell comprising:
the upper surface of the radiating unit D1 is welded with the lower surface of the double-sided copper-clad insulating plate S1;
a double-sided copper-clad insulating plate S1 formed with a silicon carbide wafer.
A second embodiment;
referring to fig. 1 in combination with fig. 2, the present utility model provides an integrated silicon carbide power cell, comprising:
the upper surface of the radiating unit D1 is welded with the lower surface of the double-sided copper-clad insulating plate S1;
a double-sided copper-clad insulating plate S1 formed with a silicon carbide wafer, the upper surface of the double-sided copper-clad insulating plate S1 being formed with the following electrical structure;
a first negative electrode copper-clad surface S11 formed on the right side of the upper part of the upper surface of the double-sided copper-clad insulating plate S1;
a second negative electrode copper-clad surface S12 formed on the left side of the upper surface of the double-sided copper-clad insulating plate S1;
a positive electrode copper-clad surface S13 formed on the upper surface of the double-sided copper-clad insulating plate S1 between the first negative electrode copper-clad surface S11 and the second negative electrode copper-clad surface S12;
a phase output copper-clad surface S14 formed on the upper surface of the double-sided copper-clad insulating plate S1 below the first negative copper-clad surface S11, the second negative copper-clad surface S12, and the positive copper-clad surface S13;
a low-side drive plate S15 formed on the upper surface of the double-sided copper-clad insulation plate S1 below the phase output copper-clad surface S14;
the high-side driving plate S16 is formed in the middle of the positive electrode copper-clad surface S13.
A third embodiment;
referring to fig. 1 in combination with fig. 3, the present utility model provides an integrated silicon carbide power cell, comprising:
the upper surface of the radiating unit D1 is welded with the lower surface of the double-sided copper-clad insulating plate S1;
a double-sided copper-clad insulating plate S1 formed with a silicon carbide wafer, the upper surface of the double-sided copper-clad insulating plate S1 being formed with the following electrical structure;
a first negative electrode copper-clad surface S11 formed on the right side of the upper part of the upper surface of the double-sided copper-clad insulating plate S1;
a first negative electrode output terminal S111 formed on the upper portion of the first negative electrode copper-clad surface S11;
a second negative electrode copper-clad surface S12 formed on the left side of the upper surface of the double-sided copper-clad insulating plate S1;
a second negative electrode output terminal S121 formed on the upper portion of the second negative electrode copper-clad surface S12;
a positive electrode copper-clad surface S13 formed on the upper surface of the double-sided copper-clad insulating plate S1 between the first negative electrode copper-clad surface S11 and the second negative electrode copper-clad surface S12;
a first positive electrode output terminal S131 formed on the left side of the top of the positive electrode copper-clad surface S13;
a second positive electrode output terminal S132 formed on the right side of the top of the positive electrode copper-clad surface S13;
a high-side silicon carbide wafer group S133 formed on the positive copper-clad surface S13 at the lower part of the high-side drive plate S16; the high-side silicon carbide wafer group S133 comprises N wafers which are connected in parallel, wherein base and emitter control signals of each wafer in the wafer group are connected to a wire bonding pad S161 on a high-side driving plate S16 from the surface of the wafer through wire bonding, and an emitter of each wafer in the high-side silicon carbide wafer group S133 is also connected to a phase output copper-clad surface S14 through wire bonding, wherein N is more than or equal to 2;
a phase output copper-clad surface S14 formed on the upper surface of the double-sided copper-clad insulating plate S1 below the first negative copper-clad surface S11, the second negative copper-clad surface S12, and the positive copper-clad surface S13; a phase output terminal S141 formed in the middle of the phase output copper-clad surface S14;
a first low-side wafer set S142 formed on the left side of the phase output copper-clad surface S14;
a second low-side wafer group S143 formed on the right side of the phase output copper-clad surface S14;
the first low-side wafer group S142 and the second low-side wafer group S143 are formed by connecting N/2 wafers in parallel, the base electrode and the emitter electrode control signals of each wafer in the wafer group are connected to a wire bonding welding disk S161 on a low-side driving plate S15 from the surface of the wafer through wire bonding, the emitter electrode of each wafer is also connected to a first negative electrode copper-clad surface S11 and a second negative electrode copper-clad surface S12 through wire bonding, the collector electrode of the wafer is connected through a positive electrode copper-clad surface S13, and N is more than or equal to 2;
a low-side drive plate S15 formed on the upper surface of the double-sided copper-clad insulation plate S1 below the phase output copper-clad surface S14;
the high-side driving plate S16 is formed in the middle of the positive copper-clad surface S13, and the high-side driving plate S16 comprises a driving circuit, a wire bonding pad S161 and a PCB S162;
the driving signal driving the short circuit is connected to the routing pad S161 through the PCB trace.
Unless otherwise defined, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this utility model belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
The present utility model has been described in detail by way of specific embodiments and examples, but these should not be construed as limiting the utility model. Many variations and modifications may be made by one skilled in the art without departing from the principles of the utility model, which is also considered to be within the scope of the utility model.
Claims (9)
1. An integrated silicon carbide power cell, comprising:
the upper surface of the radiating unit (D1) is welded with the lower surface of the double-sided copper-clad insulating plate (S1);
and a double-sided copper-clad insulating plate (S1) on which a silicon carbide wafer is formed.
2. The integrated silicon carbide power cell of claim 1, wherein: the upper surface of the double-sided copper-clad insulating plate (S1) forms the following electrical structure;
a first negative electrode copper-clad surface (S11) formed on the right side of the upper surface of the double-sided copper-clad insulating plate (S1);
a second negative electrode copper-clad surface (S12) formed on the left side of the upper part of the upper surface of the double-sided copper-clad insulating plate (S1);
a positive electrode copper-clad surface (S13) formed on the upper surface of the double-sided copper-clad insulating plate (S1) between the first negative electrode copper-clad surface (S11) and the second negative electrode copper-clad surface (S12);
a phase output copper-clad surface (S14) formed on the upper surface of the double-sided copper-clad insulating plate (S1) below the first negative copper-clad surface (S11), the second negative copper-clad surface (S12) and the positive copper-clad surface (S13);
a low-side drive plate (S15) formed on the upper surface of the double-sided copper-clad insulating plate (S1) below the phase output copper-clad surface (S14);
and a high-side drive plate (S16) formed in the middle of the positive electrode copper-clad surface (S13).
3. An integrated silicon carbide power unit according to claim 2 wherein:
and a first negative electrode output terminal (S111) formed on the upper part of the first negative electrode copper-clad surface (S11).
4. An integrated silicon carbide power unit according to claim 2 wherein:
and a second negative electrode output terminal (S121) formed on the upper part of the second negative electrode copper-clad surface (S12).
5. An integrated silicon carbide power unit according to claim 2 wherein:
a first positive electrode output terminal (S131) formed on the left side of the top of the positive electrode copper-clad surface (S13);
a second positive electrode output terminal (S132) formed on the right side of the top of the positive electrode copper-clad surface (S13);
and a high-side silicon carbide wafer group (S133) formed on the positive-electrode copper-clad surface (S13) at the lower part of the high-side drive plate (S16).
6. The integrated silicon carbide power cell of claim 5, wherein: the high-side silicon carbide wafer group (S133) comprises N wafers which are connected in parallel, a base electrode control signal and an emitter electrode control signal of each wafer in the wafer group are connected onto a wire bonding pad (S161) on a high-side driving plate (S16) from the surface of the wafer through wire bonding, and an emitter electrode of each wafer in the high-side silicon carbide wafer group (S133) is also connected onto a phase output copper-clad surface (S14) through wire bonding, wherein N is more than or equal to 2.
7. An integrated silicon carbide power unit according to claim 2 wherein:
the high-side driving board (S16) comprises a driving circuit, a wire bonding pad (S161) and a PCB (S162);
the driving signal driving the short circuit is connected to the routing pad (S161) through the PCB trace.
8. An integrated silicon carbide power unit according to claim 2 wherein:
a phase output terminal (S141) formed in the middle of the phase output copper-clad surface (S14);
a first low-side wafer group (S142) formed on the left side of the phase output copper-clad surface (S14);
and a second low-side wafer group (S143) formed on the right side of the phase output copper-clad surface (S14).
9. The integrated silicon carbide power cell of claim 8, wherein:
the first low-side wafer group (S142) and the second low-side wafer group (S143) are formed by connecting N/2 wafers in parallel, the base electrode and the emitter electrode control signals of each wafer in the wafer group are connected to a wire bonding pad (S161) on a low-side driving plate (S15) from the surface of the wafer through wire bonding, the emitter electrode of each wafer is also connected to a first negative electrode copper-clad surface (S11) and a second negative electrode copper-clad surface (S12) through wire bonding, the collector electrode of the wafer is connected through a positive electrode copper-clad surface (S13), and N is more than or equal to 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222032451.6U CN218918849U (en) | 2022-08-03 | 2022-08-03 | Integrated silicon carbide power unit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222032451.6U CN218918849U (en) | 2022-08-03 | 2022-08-03 | Integrated silicon carbide power unit |
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| Publication Number | Publication Date |
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| CN218918849U true CN218918849U (en) | 2023-04-25 |
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| CN202222032451.6U Active CN218918849U (en) | 2022-08-03 | 2022-08-03 | Integrated silicon carbide power unit |
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