CN218887198U - P type IBC battery structure - Google Patents
P type IBC battery structure Download PDFInfo
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- CN218887198U CN218887198U CN202120607226.3U CN202120607226U CN218887198U CN 218887198 U CN218887198 U CN 218887198U CN 202120607226 U CN202120607226 U CN 202120607226U CN 218887198 U CN218887198 U CN 218887198U
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Abstract
The utility model discloses a P type IBC battery structure, the battery structure includes positive dereflection and passive film stromatolite, P type monocrystalline silicon base, back N type diffuse layer, back dereflection and passive film stromatolite that set gradually and sets up positive negative metal electrode on back dereflection and passive film stromatolite; the back surface of the P-type monocrystalline silicon substrate is provided with a polished surface, and the polished surface is a back N-type diffusion layer. The P-type IBC battery structure provided by the utility model is superposed with the Topcon high-efficiency process, and the efficiency is higher; the P-type monocrystalline silicon substrate is used as a P region, B doping is not needed on the front side and the back side, a mask and photoetching are not needed, the process steps are simple, the complicated process steps of the traditional IBC battery are reduced to 12 steps, the production cost is obviously reduced, and the commercial popularization of the IBC battery is facilitated.
Description
Technical Field
The utility model relates to a P type IBC battery structure belongs to solar cell production technical field.
Background
With the development of the photovoltaic industry, the demand for reducing cost and improving efficiency is increasingly urgent, wherein the improvement of the photoelectric conversion efficiency of a solar cell is one of the most important ways for reducing cost and improving efficiency. The current high-efficiency battery structure mainly comprises a Topcon battery, an HIT battery, an IBC battery and the like, wherein the battery structures all use N-type crystalline silicon as a substrate, and the IBC battery structure has good compatibility with other high-efficiency battery structures.
IBC cells are becoming increasingly popular because of the following advantages: (1) the front surface is not shaded, and the short-circuit current Isc is obviously improved; (2) The front surface is not in metal contact compounding, so that the open-circuit voltage Voc is favorably improved; (3) the method has good compatibility with other high-efficiency processes; (4) The assembly can realize two-dimensional packaging, the inter-chip distance is reduced, the generating power of the assembly in unit area is favorably improved, and the appearance is attractive; and (5) the thinning can be realized, and the silicon wafer cost is reduced. However, the conventional IBC cell has more than 20 process steps, is complex in process and high in cost, and is not suitable for commercial production.
Therefore, the method simplifies the process flow of the IBC battery, reduces the commercial production cost, and has very important significance for research and development personnel in the technical field.
SUMMERY OF THE UTILITY MODEL
Solve the technical problem, the utility model provides a P type IBC battery structure and technology preparation method reduces the complicated process steps of traditional IBC battery to 12 steps, and manufacturing cost reduces very obviously, is favorable to the commercialization popularization of IBC battery.
The utility model relates to a P type IBC battery structure, which comprises a front antireflection and passivation film lamination, a P type monocrystalline silicon substrate, a back N type diffusion layer, a back antireflection and passivation film lamination which are arranged in sequence, and positive and negative metal electrodes arranged on the back antireflection and passivation film lamination;
the back surface of the P-type monocrystalline silicon substrate is provided with a polished surface, and the polished surface is a back N-type diffusion layer.
Further, the P-type monocrystalline silicon substrate comprises a front surface and a back surface, and the front surface is constructed into a pyramid textured structure; the back structure is a pyramid suede and a polished surface which are arranged at intervals.
Further, the front antireflection and passivation film stack is one or more of aluminum oxide, silicon nitride and silicon oxynitride.
Furthermore, the back N-type diffusion layer comprises a silicon oxide layer and a P-doped polycrystalline silicon layer, and the back N-type diffusion layer is laminated and arranged on the back polished region of the monocrystalline silicon substrate.
Still further, the back side antireflection and passivation film stack is a combination of one or more of aluminum oxide, silicon nitride, and silicon oxynitride.
Furthermore, the back metal electrode comprises a positive electrode Al grid line and a negative electrode Ag grid line, the positive electrode Al grid line is arranged in the back suede area, and the negative electrode Ag grid line is arranged in the back polished area.
Compare with traditional IBC battery, the utility model provides a P type IBC battery structure possesses following beneficial effect:
1. the method is superposed with a Topcon efficient process, so that the efficiency is higher;
2. the P-type monocrystalline silicon substrate is used as a P region, B doping is not needed on the front side and the back side, a mask and photoetching are not needed, and the process steps are simple;
3. the positive electrode of the P area adopts Al slurry, the using amount of Ag slurry is reduced by 50%, and P-type monocrystalline silicon is used as a substrate, so that the production cost is obviously reduced.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings required for the use of the present invention will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without inventive efforts.
FIG. 1: the utility model provides a P type IBC battery structure sketch map;
FIG. 2: the utility model provides a P-type IBC battery process flow chart;
the silicon substrate is a P-type monocrystalline silicon substrate 1, a silicon oxide layer 2, a B-doped polycrystalline silicon layer 3, an antireflection and passivation film stack layer 4 on the front face, an aluminum grid line 5 on the positive electrode, a silver grid line 6 on the negative electrode and an antireflection and passivation film stack layer 7 on the back face.
Detailed Description
To make the objects, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings, and obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by the person skilled in the art without making creative efforts belong to the protection scope of the present invention.
The first embodiment is as follows:
the utility model provides a P type IBC battery structure, as shown in FIG. 1, include in proper order that positive dereflection and passive film stromatolite 4, P type monocrystalline silicon are basement 1, back N type diffusion layer, the back subtract reflection and passive film stromatolite 7 and set up the positive negative metal electrode on the passivation layer of the back.
The P-type monocrystalline silicon substrate comprises a front side and a back side, and the front side is constructed into a pyramid suede structure; the back structure is in a pyramid suede structure and the polishing surfaces are arranged at intervals;
the front antireflection and passivation film lamination 4 is one or more of aluminum oxide, silicon nitride and silicon oxynitride;
the back N-type diffusion layer comprises a silicon oxide layer 2 and a P-doped polycrystalline silicon layer 3, and is laminated and arranged on the polished area on the back of the monocrystalline silicon substrate;
the back antireflection and passivation film lamination layer 7 is one or more of aluminum oxide, silicon nitride and silicon oxynitride;
the back metal electrode comprises a positive electrode Al grid line 5 and a negative electrode Ag grid line 6, the positive electrode Al grid line 5 is arranged in the back suede area, and the negative electrode Ag grid line 6 is arranged in the back polished area.
Example two:
on the other hand, the utility model provides a technology preparation method of P type IBC battery, technology preparation method includes following process steps:
s01, cleaning and polishing a silicon wafer: carrying out chemical cleaning and alkali polishing on the P-type monocrystalline silicon substrate to remove a mechanical damage layer and pollutants on the surface of the silicon substrate and ensure that the front surface and the back surface of the substrate are relatively flat;
s02, depositing silicon oxide and amorphous silicon film layers on two sides: depositing a silicon oxide layer and an amorphous silicon layer on the front surface and the back surface of the polished substrate;
s03 back surface P diffusion and annealing: p doping treatment is carried out on the amorphous silicon layer on the back surface, then high-temperature annealing treatment is carried out, and the amorphous silicon is converted into a polycrystalline silicon film layer;
s04, back laser etching: patterning the back surface by using nanosecond or picosecond laser with the wavelength of 532 nm;
s05, removing the front side surface PSG: in the S02 and S03 processes, a phosphorosilicate glass layer, namely PSG, is formed on the front surface and the side surface of the substrate at the same time, and HF hydrofluoric acid is adopted for removing the PSG;
s06, alkaline texturing: using KOH potassium hydroxide or NaOH sodium hydroxide alkali solution to construct partial areas of the front surface and the back surface of the substrate into a pyramid suede structure;
s07 double-sided deposition of an AlOx aluminum oxide film layer: depositing a layer of compact aluminum oxide film on the front surface and the back surface of the substrate in an ALD (atomic layer deposition) mode;
s08, depositing an antireflection film layer on the back: depositing one or more laminated films of silicon nitride and silicon oxynitride on the back of the substrate in a PECVD (plasma enhanced chemical vapor deposition) mode;
s09, depositing an antireflection film layer on the front surface: depositing one or more laminated films of silicon nitride and silicon oxynitride on the front surface of the substrate in a PECVD (plasma enhanced chemical vapor deposition) mode;
s10, back laser film opening: opening the film of the back antireflection layer and the passivation film lamination by using nanosecond or picosecond laser with the wavelength of 532 nm;
s11, screen printing of positive and negative electrodes: printing negative electrode Ag paste on the N area, and printing positive electrode Al paste on the P area;
s12, sintering: sintering the positive electrode Al aluminum paste and the negative electrode Ag silver paste to form good ohmic contact;
further: in step S02, the thickness of the deposited silicon oxide layer is 1-2nm, and the thickness of the amorphous silicon layer is 80-250nm;
further: in the step S03, the sheet resistance of the polycrystalline silicon after high-temperature annealing treatment is 20-60ohm/sq;
further: in step S07, the thickness of the alumina film layer is 3-8nm.
The application provides a P-type IBC battery with simple process and low cost, which can be realized by adopting the process method.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Furthermore, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include the inherent elements. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element. In addition, parts of the above technical solutions provided in the embodiments of the present application, which are consistent with the implementation principles of corresponding technical solutions in the prior art, are not described in detail so as to avoid redundant description.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (4)
1. A P-type IBC battery structure is characterized by comprising a front antireflection and passivation film stack, a P-type monocrystalline silicon substrate, a back N-type diffusion layer, a back antireflection and passivation film stack and positive and negative metal electrodes arranged on the back antireflection and passivation film stack, wherein the front antireflection and passivation film stack, the P-type monocrystalline silicon substrate, the back N-type diffusion layer, the back antireflection and passivation film stack and the positive and negative metal electrodes are sequentially arranged;
the back surface of the P-type monocrystalline silicon substrate is provided with a polished surface, and the polished surface is a back N-type diffusion layer.
2. The P-type IBC battery structure of claim 1, wherein the P-type monocrystalline silicon substrate comprises a front surface and a back surface, and the front surface is constructed in a pyramid textured structure; the structure of the back surface is a pyramid suede and a polished surface which are arranged at intervals.
3. The P-type IBC cell structure of claim 1, wherein the back N-type diffusion layer comprises a silicon oxide layer and a P-doped polysilicon layer, and the stack is attached to the polished back region of the single-crystal silicon substrate.
4. The P-type IBC battery structure of claim 1, wherein said back metal electrode comprises a positive electrode Al grid line and a negative electrode Ag grid line, said positive electrode Al grid line is disposed on the back textured area, and said negative electrode Ag grid line is disposed on the back polished area.
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CN202120607226.3U CN218887198U (en) | 2021-03-25 | 2021-03-25 | P type IBC battery structure |
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CN202120607226.3U CN218887198U (en) | 2021-03-25 | 2021-03-25 | P type IBC battery structure |
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