CN218038283U

CN218038283U - Infrared receiving chip circuit with radio frequency signal interference resistance

Info

Publication number: CN218038283U
Application number: CN202222274104.4U
Authority: CN
Inventors: 冉启海; 王明江
Original assignee: Shenzhen Yusi Semiconductor Co ltd
Current assignee: Shenzhen Yusi Semiconductor Co ltd
Priority date: 2022-08-29
Filing date: 2022-08-29
Publication date: 2022-12-13
Anticipated expiration: 2032-08-29

Abstract

The utility model discloses an infrared receiving chip circuit with resist radio frequency signal interference, it relates to infrared receiving chip technical field. The infrared sensing diode is connected with the input end of the current-voltage conversion circuit, the preamplifier, the automatic gain amplifier, the gain limiting amplifier, the band-pass filter and the comparator are sequentially connected, the comparator is respectively connected with the integral shaper and the noise detection and gain control module, and the output end of the noise detection and gain control module is connected to the automatic gain amplifier; the output end of the integration shaper is connected with the grid electrode of the first NMOS tube, and the drain electrode of the first NMOS tube is connected with the OUT port of the chip. The utility model discloses reduce the low frequency noise interference component that chip gain amplification link produced because of wave form distortion for this system can not produce the wave form saturation distortion because of outside strong radio frequency interference signal at the band pass filter input, avoids exporting wrong signal, and application prospect is wide.

Description

Infrared receiving chip circuit with radio frequency signal interference resistance

Technical Field

The utility model relates to an infrared receiving chip technical field, concretely relates to infrared receiving chip circuit with resist radio frequency signal interference.

Background

The existing infrared signal receiving system comprises a chip internal system and a chip external infrared sensing diode, the system is widely applied and practical, and can well amplify and restore infrared useful signals, but the traditional infrared signal receiving system has the problem that radio frequency signal interference cannot be effectively inhibited. The infrared carrier signal frequency range is about 36Khz-40Khz, the bandpass filter within the system slice is typically centered at 36Khz or 38Khz or 40Khz and has a bandwidth of about 4.5Khz. Under the condition that the strength of external radio frequency interference signals is weak and radio frequency signals do not generate large waveform distortion in a chip, the band-pass filter in the system can effectively filter the radio frequency interference signals outside the carrier frequency. However, when the external radio frequency interference signal has strong strength, the waveform amplitude of the signal on the amplification link inside the chip is too large, and the waveform is distorted. The waveform distortion can cause radio frequency interference signals which are originally more than 1Ghz to generate derived low-frequency components, and some low-frequency components can possibly fall in the band-pass range of the infrared receiving system, so that the noise error output occurs at the output end of the system, and the signal transmission error rate is improved.

In order to solve the problem that the conventional infrared signal receiving system cannot effectively suppress the radio frequency interference signal, it is particularly necessary to design an infrared receiving chip circuit capable of resisting the radio frequency signal interference.

SUMMERY OF THE UTILITY MODEL

To exist not enough on the prior art, the utility model aims to provide an infrared receiving chip circuit that has resistance radiofrequency signal interference, simple structure, reasonable in design reduces the low frequency noise component that chip gain amplification link produced because of wave form distortion, can not export false signal because of outside radiofrequency signal interference, easily uses widely.

In order to achieve the above purpose, the present invention is realized by the following technical solution: an infrared receiving chip circuit with resistance to radio frequency signal interference comprises an infrared receiving chip and an infrared sensing diode, wherein the infrared receiving chip is connected with the infrared sensing diode, the infrared receiving chip comprises a current-voltage conversion circuit, a preamplifier, an automatic gain amplifier, a gain limiting amplifier, a band-pass filter, a comparator, an integral shaper, a noise detection and gain control module, a first NMOS (N-channel metal oxide semiconductor) tube and a first resistor, the infrared sensing diode is connected with the input end of the current-voltage conversion circuit, the output end of the current-voltage conversion circuit is connected with the input end of the preamplifier, the output end of the preamplifier is connected with the input end of the automatic gain amplifier, the output end of the automatic gain amplifier is connected with the input end of the gain limiting amplifier, the output end of the gain limiting amplifier is connected with the input end of the band-pass filter, the output end of the band-pass filter is connected with the input end of the comparator, the output ends of the comparator are respectively connected with the input ends of the integral shaper and the noise detection and gain control module, and the output end of the noise detection and gain control module is connected to the automatic gain amplifier; the output end of the integral shaper is connected with the grid electrode of the first NMOS tube, the drain electrode of the first NMOS tube is connected with the OUT port of the infrared receiving chip, the drain electrode of the first NMOS tube is also connected with one end of a first resistor, the other end of the first resistor is connected with the VCC port of the power supply of the infrared receiving chip, and the source electrode of the first NMOS tube is connected with the GND port of the infrared receiving chip.

Preferably, the gain limiting amplifier includes a first PMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a capacitor, and a second resistor, where the source of the first PMOS transistor, the source of the second PMOS transistor, and the drain of the fourth NMOS transistor are all connected to the positive output terminal of the automatic gain amplifier, the gate and the drain of the first PMOS transistor, the gate of the second PMOS transistor, and the gate of the second NMOS transistor are all connected to the drain of the second NMOS transistor, the drain of the second PMOS transistor is connected to the gate and the drain of the third NMOS transistor, the drain of the third NMOS transistor is connected to the gate of the fourth NMOS transistor through the second resistor, the gate of the fourth NMOS transistor is further connected to the positive terminal of the capacitor, and the negative terminal of the capacitor, the source of the fourth NMOS transistor, the source of the second NMOS transistor, and the source of the third NMOS transistor are all connected to the negative output terminal of the automatic gain amplifier.

The utility model has the advantages that: the circuit effectively reduces low-frequency noise interference components generated by a chip gain amplification link due to waveform distortion, so that the system can not generate waveform saturation distortion at the input end of a band-pass filter due to external strong radio-frequency interference signals, output error signals are avoided, the reliability is good, and the application prospect is wide.

Drawings

The present invention will be described in detail with reference to the accompanying drawings and specific embodiments;

FIG. 1 is a block diagram of the present invention;

fig. 2 is a circuit diagram of the gain limiting amplifier of the present invention.

Detailed Description

In order to make the utility model realize, the technical means, the creation characteristics, the achievement purpose and the efficacy are easy to understand and understand, the utility model is further explained by combining the specific implementation mode.

Referring to fig. 1-2, the following technical solutions are adopted in the present embodiment: an infrared receiving chip circuit resisting radio frequency signal interference comprises an infrared receiving chip 1 and an infrared sensing diode 2, wherein the infrared receiving chip 1 is connected with the infrared sensing diode 2, the infrared receiving chip 1 comprises a current-voltage conversion circuit 101, a preamplifier 102, an automatic gain amplifier 103, a gain limiting amplifier 104, a band-pass filter 105, a comparator 106, an integral shaper 107, a noise detection and gain control module 108, a first NMOS tube M1 and a first resistor R1, the infrared sensing diode 2 is connected with the input end of the current-voltage conversion circuit 101, the output end of the current-voltage conversion circuit 101 is connected with the input end of the preamplifier 102, the output end of the preamplifier 102 is connected with the input end of the automatic gain amplifier 103, the output end of the automatic gain amplifier 103 is connected with the input end of the gain limiting amplifier 104, the output end of the gain limiting amplifier 104 is connected with the input end of the band-pass filter 105, the output end of the band-pass filter 105 is connected with the input end of the comparator 106, the output end of the comparator 106 is respectively connected with the input ends of the integral shaper 107 and the noise detection and gain control module 108, and the output end of the noise detection and gain control module 108 are connected to the automatic gain control module 103; the output end of the integral shaper 107 is connected with the grid electrode of the first NMOS tube M1, the drain electrode of the first NMOS tube M1 is connected with the OUT port of the infrared receiving chip 1, the drain electrode of the first NMOS tube M1 is also connected with one end of a first resistor R1, the other end of the first resistor R1 is connected with the VCC port of the infrared receiving chip 1, and the source electrode of the first NMOS tube M1 is connected with the GND port of the infrared receiving chip 1.

The gain limiting amplifier 104 of this embodiment includes a first PMOS transistor M2, a second PMOS transistor M3, a second NMOS transistor M4, a third NMOS transistor M5, a fourth NMOS transistor M6, a capacitor C1 and a second resistor R2, wherein the source of the first PMOS transistor M2, the source of the second PMOS transistor M3 and the drain of the fourth NMOS transistor M6 are all connected to the positive output terminal of the automatic gain amplifier 103, the gate and the drain of the first PMOS transistor M2, the gate of the second PMOS transistor M3 and the gate of the second NMOS transistor M4 are all connected to the drain of the second NMOS transistor M4, the drain of the second PMOS transistor M3 is respectively connected to the gate and the drain of the third NMOS transistor M5, the drain of the third NMOS transistor M5 is connected to the second resistor R2 and the gate of the fourth NMOS transistor M6, the gate of the fourth NMOS transistor M6 is further connected to the positive terminal of the capacitor C1, and the negative terminal of the capacitor C1, the source of the fourth NMOS transistor M6, the source of the second NMOS transistor M4 and the source of the third NMOS transistor M5 are all connected to the negative output terminal of the automatic gain amplifier 103.

The working principle of the specific embodiment is as follows: the infrared sensing diode 2 receives an infrared carrier signal containing useful information, converts the infrared carrier signal into an electric signal and inputs the electric signal to an input IN end of the infrared receiving chip 1, the input signal converts the input current signal into a voltage signal IN the chip through a current-voltage conversion circuit 101, the voltage signal is amplified through a preamplifier 102 and an automatic gain amplifier 103, a gain limiting amplifier 104 is used as a load of the automatic gain amplifier 103, when the amplitude of the output signal of the automatic gain amplifier 103 is overlarge to generate slight saturation distortion, the gain limiting amplifier 104 can adjust self-generated impedance to be reduced and maintain for a period of time, so that the amplitude of the output signal of the automatic gain amplifier 103 is reduced, and the amplitude of the output signal of the automatic gain amplifier 103 is prevented from being seriously saturated distortion. Then, the output signal of the gain limiting amplifier 104 is filtered by a band-pass filter 105, and is converted into a digital signal by a comparator 106, and a useful signal in the carrier is restored and shaped by an integration shaper 107, and is amplified and output to an output OUT port of the chip by a first NMOS transistor M1 and a first resistor R1.

In the system, the automatic gain amplifier 103 may read the digital signal output by the comparator 106, determine whether the signal is a useful signal or radio frequency interference noise, and control the gain of the automatic gain amplifier 103 based on the determination, so that the noise is suppressed and the useful signal can be amplified and output. The working principle of the automatic gain amplifier 103 is as follows: when the output amplitude of the automatic gain amplifier 103 exceeds the sum of the threshold voltage of the first PMOS transistor M2 and the threshold voltage of the second NMOS transistor M4, the two MOS transistors of the first PMOS transistor M2 and the second NMOS transistor M4 are turned on and operate in the sub-threshold region, and at this time, the output signal of the automatic gain amplifier 103 generates slight saturation distortion. The first PMOS transistor M2 generates a current flowing from the source to the drain, and the current is mirrored into the second PMOS transistor M3 and the third NMOS transistor M5, so that the gate-drain voltage of the third NMOS transistor M5 is raised. The gate-drain voltage of the third NMOS transistor M5 is filtered by the second resistor R2 and the capacitor C1 and then is sent to the fourth NMOS transistor M6, so that the fourth NMOS transistor M6 is turned on, and the equivalent resistance between the positive and negative output terminals of the automatic gain amplifier 103 is reduced, thereby reducing the output amplitude thereof and avoiding saturation distortion. Since the RC time constant of the second resistor R2 and the capacitor C1 is typically 5ms, the equivalent on-resistance set by the fourth NMOS transistor M6 is maintained for a period of time.

The specific implementation mode is based on the existing traditional infrared signal receiving system, the anti-distortion gain limiting amplifier capable of preventing distortion caused by overlarge waveform amplitude is additionally arranged at the front end of the band-pass filter, when a chip has a large radio frequency interference signal outside, the circuit can prevent a high-frequency signal from generating amplitude saturation distortion at an input node of the band-pass filter, and reduce low-frequency noise interference components generated by the chip gain amplification link due to waveform distortion, so that the infrared receiving chip system is not influenced by an external strong radio frequency interference signal to output an error signal, and the infrared receiving chip system has a wide market application prospect.

The foregoing shows and describes the basic principles and principal features of the invention, together with the advantages thereof. It should be understood by those skilled in the art that the present invention is not limited to the above embodiments, and the above embodiments and descriptions are only illustrative of the principles of the present invention, and that various changes and modifications may be made without departing from the spirit and scope of the present invention, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims

1. An infrared receiving chip circuit resisting radio frequency signal interference is characterized by comprising an infrared receiving chip (1) and an infrared sensing diode (2), wherein the infrared receiving chip (1) is connected with the infrared sensing diode (2), the infrared receiving chip (1) comprises a current-voltage conversion circuit (101), a preamplifier (102), an automatic gain amplifier (103), a gain limiting amplifier (104), a band-pass filter (105), a comparator (106), an integral shaper (107), a noise detection and gain control module (108), a first NMOS (N-channel metal oxide semiconductor) tube (M1) and a first resistor (R1), the infrared sensing diode (2) is connected with the input end of the current-voltage conversion circuit (101), the output end of the current-voltage conversion circuit (101) is connected with the input end of the preamplifier (102), the output end of the preamplifier (102) is connected with the input end of the automatic gain amplifier (103), the output end of the automatic gain amplifier (103) is connected with the input end of the gain limiting amplifier (104), the output end of the gain limiting amplifier (104) is connected with the input end of the band-pass filter (105), the output end of the comparator (106) is connected with the input end of the integrator shaper (107), and the output end of the comparator (106) is connected with the input end of the integrator shaper (106), the input end of the noise detection and gain control module (108) is connected, and the output end of the noise detection and gain control module (108) is connected to the automatic gain amplifier (103); the output end of the integral shaper (107) is connected with the grid electrode of the first NMOS tube (M1), the drain electrode of the first NMOS tube (M1) is connected with an OUT port of the infrared receiving chip (1), the drain electrode of the first NMOS tube (M1) is also connected with one end of the first resistor (R1), the other end of the first resistor (R1) is connected with a power supply VCC port of the infrared receiving chip (1), and the source electrode of the first NMOS tube (M1) is connected with a GND port of the infrared receiving chip (1).

2. The infrared receiving chip circuit with the function of resisting radio frequency signal interference as claimed in claim 1, wherein the gain limiting amplifier (104) includes a first PMOS transistor (M2), a second PMOS transistor (M3), a second NMOS transistor (M4), a third NMOS transistor (M5), a fourth NMOS transistor (M6), a capacitor (C1), and a second resistor (R2), the source of the first PMOS transistor (M2), the source of the second PMOS transistor (M3), and the drain of the fourth NMOS transistor (M6) are all connected to the positive output terminal of the automatic gain amplifier (103), the gate and the drain of the first PMOS transistor (M2), the gate of the second PMOS transistor (M3), and the gate of the second NMOS transistor (M4) are all connected to the drain of the second NMOS transistor (M4), the drain of the second PMOS transistor (M3) is respectively connected to the gate and the drain of the third NMOS transistor (M5), the drain of the third NMOS transistor (M5) is connected to the source of the second NMOS transistor (R2), the source of the fourth NMOS transistor (M6), and the gate of the third NMOS transistor (M2) is connected to the negative output terminal of the second NMOS transistor (M1), and the drain of the fourth NMOS transistor (M6).