CN108736967B - Infrared receiving chip circuit and infrared receiving system - Google Patents
Infrared receiving chip circuit and infrared receiving system Download PDFInfo
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- CN108736967B CN108736967B CN201810446400.3A CN201810446400A CN108736967B CN 108736967 B CN108736967 B CN 108736967B CN 201810446400 A CN201810446400 A CN 201810446400A CN 108736967 B CN108736967 B CN 108736967B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/11—Arrangements specific to free-space transmission, i.e. transmission through air or vacuum
- H04B10/112—Line-of-sight transmission over an extended range
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
- H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/66—Non-coherent receivers, e.g. using direct detection
- H04B10/69—Electrical arrangements in the receiver
- H04B10/693—Arrangements for optimizing the preamplifier in the receiver
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/66—Non-coherent receivers, e.g. using direct detection
- H04B10/69—Electrical arrangements in the receiver
- H04B10/697—Arrangements for reducing noise and distortion
Abstract
The invention provides an infrared receiving chip circuit, which comprises an infrared sensing diode and a chip internal system; the system in the chip comprises an input end, an electromagnetic wave reflection unit, a preamplifier, a gain variable amplifier, a band-pass filter, a comparator, an integrator, a Schmitt trigger, a first transistor, an output end and an automatic gain control unit, wherein the input end, the electromagnetic wave reflection unit, the preamplifier, the gain variable amplifier, the band-pass filter, the comparator, the integrator, the Schmitt trigger, the first transistor, the output end and the automatic gain control unit are sequentially and electrically connected; the gate terminal of the first transistor is connected to the output of the schmitt trigger, the source terminal thereof is connected to the ground terminal, the drain terminal thereof is connected to the output terminal and the drain terminal thereof is connected to the power source terminal through a series connection of a overvoltage resistor. The invention also provides an infrared receiving system comprising the infrared receiving chip circuit. Compared with the related technology, the infrared receiving chip circuit and the infrared receiving system have the advantages of strong anti-interference performance, good reliability and high accuracy.
Description
Technical Field
The invention relates to the technical field of chips, in particular to an infrared receiving chip circuit and an infrared receiving system.
Background
With the development of the information age, various wireless communications have become mainstream. The infrared receiving chip circuit is the main part of signal receiving in wireless communication.
In the related art infrared receiving chip circuit, the digital signal output by the comparator is read by the automatic gain control module and is judged whether to be noise or a useful signal. When the infrared receiving chip circuit is weak in external interference signal intensity, especially electromagnetic wave interference, and the interference signal cannot generate large waveform distortion in the infrared receiving chip, the band-pass filter in the infrared receiving chip can effectively filter most interference signals.
However, when the strength of the external interference signal is strong, the waveform amplitude of the signal on the amplification link inside the chip is too large, which causes waveform distortion. And the waveform distortion can generate harmonic low-frequency components, and part of the low-frequency components can fall in the band-pass range of the infrared receiving chip circuit, so that the output end of the infrared receiving chip circuit generates noise and error output, and the signal transmission error rate is increased.
Therefore, it is necessary to provide a new infrared receiving chip circuit and an infrared receiving system to solve the above problems.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides an infrared receiving chip circuit and an infrared receiving system which have strong anti-interference performance, good reliability and high accuracy.
In order to solve the above technical problem, the present invention provides an infrared receiving chip circuit, including:
the infrared sensing diode is used for receiving an infrared carrier signal and converting the infrared carrier signal into a carrier electric signal; the chip internal system is used for carrying out signal optimization processing on the carrier electric signal and outputting the carrier electric signal;
the system inside a chip includes:
an input for receiving the carrier electrical signal;
the electromagnetic wave reflection unit is used for receiving the carrier electric signal and performing electromagnetic wave interference signal reflection processing on the carrier electric signal;
the preamplifier is used for carrying out pre-amplification treatment on the carrier electric signal after being treated by the electromagnetic wave reflection unit;
the gain variable amplifier is used for amplifying the carrier electric signal processed by the pre-amplifier;
the band-pass filter is used for filtering the carrier electric signal processed by the gain variable amplifier;
the comparator is used for carrying out digital signal conversion processing on the carrier electric signal processed by the band-pass filter;
the automatic gain control unit is used for judging whether the carrier electric signal processed by the comparator is interference noise or not and feeding back the interference noise to the gain variable amplifier so as to control the gain output of the gain variable amplifier;
the integrator is used for restoring the carrier electric signal processed by the comparator;
the Schmitt trigger is used for shaping the carrier electric signal processed by the integrator;
the first transistor is used for amplifying the carrier electric signal processed by the Schmitt trigger and outputting the carrier electric signal; and
an output end;
the gate terminal of the first transistor is connected to the output of the schmitt trigger, the source terminal of the first transistor is connected to the ground terminal, the drain of the first transistor is connected to the output terminal and the drain of the first transistor is connected to the power supply terminal through a series overvoltage resistor.
Preferably, the electromagnetic wave reflection unit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, and a second transistor;
a first end of the first resistor is connected to the output of the infrared sensing diode, and a second end of the first resistor is respectively connected to a first end of the second resistor and a first end of the third resistor;
the second end of the second resistor is connected to the first end of the fifth resistor and the first end of the second capacitor respectively;
a second end of the third resistor is connected to a first end of the fourth resistor, a first end of the sixth resistor and a first end of the first capacitor respectively;
a second terminal of the fourth resistor is connected to a source terminal of the second transistor;
a second end of the fifth resistor is connected to a second end of the seventh resistor, a second end of the first capacitor, a second end of the third capacitor, and a first end of the fifth capacitor, respectively;
a second end of the sixth resistor is connected to a first end of the seventh resistor, a second end of the second capacitor, a first end of the third capacitor, and a first end of the fourth capacitor, respectively;
a second end of the fourth capacitor is connected to the positive input end of the preamplifier, and a second end of the fifth capacitor is connected to the negative input end of the preamplifier;
a drain terminal of the second transistor is connected to a power supply terminal, and a gate terminal of the second transistor is connected to a drain terminal of the second transistor.
Preferably, the first transistor and the second transistor are both NMOS transistors.
Preferably, the infrared receiving chip circuit further includes a gain suppressing unit, connected between the gain variable amplifier and the band-pass filter, for performing waveform distortion gain suppression processing on the carrier electrical signal processed by the gain variable amplifier.
Preferably, the gain suppressing unit includes an eighth resistor, a sixth capacitor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a seventh transistor;
a source terminal of the third transistor, a source terminal of the sixth transistor, and a source terminal of the seventh transistor are respectively connected to a positive output terminal of the gain variable amplifier;
a source terminal of the fourth transistor, a source terminal of the fifth transistor, a source terminal of the seventh transistor, and a negative terminal of the sixth capacitor are respectively connected to a negative output terminal of the gain variable amplifier;
a gate terminal of the third transistor is connected to a drain terminal of the third transistor, a gate terminal of the sixth transistor, a drain terminal of the fourth transistor, and a gate terminal of the fourth transistor, respectively;
a drain terminal of the sixth transistor is connected to a gate terminal of the fifth transistor, a drain terminal of the fifth transistor, and a first terminal of the eighth resistor, respectively;
a second end of the eighth resistor is connected to a positive terminal of the sixth capacitor and a gate terminal of the seventh transistor, respectively;
a source terminal of the seventh transistor and a drain terminal of the seventh transistor are respectively connected to an input of the band pass filter.
Preferably, the third transistor and the sixth transistor are both PMOS transistors; the fourth transistor, the fifth transistor, and the seventh transistor are all NMOS transistors.
The invention also provides an infrared receiving system which comprises the infrared receiving chip circuit provided by the invention.
Compared with the prior art, the infrared receiving chip circuit and the infrared receiving system have the advantages that the electromagnetic wave reflection unit is additionally arranged at the front end of the preamplifier, the carrier electric signal is received through the electromagnetic wave reflection unit, the electromagnetic wave interference signal reflection processing is carried out on the carrier electric signal, the electromagnetic wave interference signal entering the infrared receiving chip circuit is effectively reflected, the problem that the output of the infrared receiving chip circuit outputs an error signal due to the interference of an external electromagnetic wave signal is further avoided, the anti-interference capability, particularly the anti-electromagnetic wave interference capability, of the infrared receiving chip circuit and the infrared receiving system is improved, and the reliability and the accuracy of the infrared receiving chip circuit and the infrared receiving system are further improved. In addition, the infrared receiving chip circuit is additionally provided with the gain suppression unit between the gain variable amplifier and the band-pass filter, and the gain suppression unit is used for performing waveform distortion gain suppression processing on the carrier electric signal processed by the gain variable amplifier, so that the anti-interference capability, especially the anti-WIFI interference capability, of the infrared receiving chip circuit and the infrared receiving system is improved, and the comprehensive anti-interference capability and reliability of the infrared receiving chip circuit and the infrared receiving system are further improved.
Drawings
The present invention will be described in detail below with reference to the accompanying drawings. The foregoing and other aspects of the invention will become more apparent and more readily appreciated from the following detailed description, taken in conjunction with the accompanying drawings. In the drawings:
FIG. 1 is a block diagram of an infrared receiving chip circuit according to the present invention;
fig. 2 is a circuit configuration diagram of the electromagnetic wave reflecting unit of fig. 1;
fig. 3 is a circuit configuration diagram of the gain suppressing unit in fig. 1.
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings.
The embodiments/examples described herein are specific embodiments of the present invention, are intended to be illustrative of the concepts of the present invention, are intended to be illustrative and exemplary, and should not be construed as limiting the embodiments and scope of the invention. In addition to the embodiments described herein, those skilled in the art will be able to employ other technical solutions which are obvious based on the disclosure of the claims and the specification of the present application, and these technical solutions include those which make any obvious replacement or modification of the embodiments described herein, and all of which are within the scope of the present invention.
Referring to fig. 1, the present invention provides an infrared receiving chip circuit 100, and the present invention provides an infrared receiving chip circuit 100, which includes an infrared sensing diode 1 and an in-chip system 2 electrically connected to the infrared sensing diode 1.
The infrared sensing diode 1 is used for receiving an infrared carrier signal and converting the infrared carrier signal into a carrier electric signal. The system 2 in the chip is configured to perform signal optimization processing on the carrier electrical signal and output the carrier electrical signal.
Specifically, the system 2 inside the chip includes an input terminal IN, an electromagnetic wave reflection unit 21, a Pre-amplifier (Pre-amp) 22, a Variable Gain Amplifier (VGA) 23, a gain suppression unit 24, a Band Pass Filter (BPF) 25, a Comparator (Comparator)26, an Integrator (Integrator)27, a Schmitt trigger (Schmitt trigger)28, a first transistor M1, an output terminal OUT, and an Automatic gain control unit (AGC) 29 connected between an output of the Comparator 26 and an input of the gain variable amplifier 23, which are electrically connected IN sequence.
The gate terminal of the first transistor M1 is connected to the output of the schmitt trigger 28, the source terminal of the first transistor M1 is connected to the ground GND, the drain of the first transistor M1 is connected to the output terminal OUT and the drain of the first transistor M1 is connected to the power supply terminal VDD through a series-connected overvoltage resistor R.
It should be noted that the input terminal IN, the preamplifier 22, the gain variable amplifier 23, the band pass filter 25, the comparator 26, the integrator 27, the schmitt trigger 28, the first transistor M1, the output terminal OUT, and the automatic gain control unit 29 may implement the signal receiving and transmitting functions of the infrared receiving chip circuit 100. The electromagnetic wave reflection means 21 and the gain suppression means 24 are for effectively improving the anti-interference capability of the infrared receiving chip circuit 100, so that the reliability is better and the accuracy is higher.
Wherein, the electromagnetic wave reflection unit 21 can reflect most interference signals, especially electromagnetic wave interference signals; the gain suppressing unit 24 may filter most of the interference signals and suppress the amplified output of part of the interference signals, especially filter WIFI interference signals.
That is, in the infrared receiving chip circuit 100 of the present invention, in order to achieve the anti-interference capability and signal accuracy, only the electromagnetic wave reflecting unit 21, only the gain suppressing unit 24, or both the electromagnetic wave reflecting unit 21 and the gain suppressing unit 24 may be added, and these three schemes can solve the technical problems mentioned in the present invention.
In the present embodiment, the electromagnetic wave reflection means 21 and the gain suppression means 24 are added at the same time as an example.
The infrared sensing diode 1 receives an infrared carrier signal and converts it into a carrier electrical signal. The input end IN receives the carrier electrical signal and transmits the carrier electrical signal to the electromagnetic wave reflection unit 21, and after the electromagnetic wave reflection unit 21 receives the carrier electrical signal, the electromagnetic wave reflection unit performs electromagnetic wave interference signal reflection processing on the carrier electrical signal.
As shown in fig. 2, in detail, the electromagnetic wave reflecting unit 21 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, and a second transistor M2.
A first end of the first resistor R1 is connected to the output of the ir sensing diode 1, and a second end of the first resistor R1 is connected to a first end of the second resistor R2 and a first end of the third resistor R3, respectively; a second end of the second resistor R2 is respectively connected to a first end of the fifth resistor R5 and a first end of a second capacitor C2; a second end of the third resistor R3 is connected to a first end of the fourth resistor R4, a first end of the sixth resistor R6 and a first end of the first capacitor C1, respectively; a second terminal of the fourth resistor R4 is connected to a source terminal of the second transistor M2; a second end of the fifth resistor R5 is connected to a second end of the seventh resistor R7, a second end of the first capacitor C1, a second end of the third capacitor C3, and a first end of the fifth capacitor C5, respectively; a second end of the sixth resistor R6 is connected to a first end of the seventh resistor R7, a second end of the second capacitor C2, a first end of the third capacitor C3, and a first end of the fourth capacitor C4, respectively; a second terminal of the fourth capacitor C4 is connected to the positive input terminal of the preamplifier 22, and a second terminal of the fifth capacitor C5 is connected to the negative input terminal of the preamplifier 22; a drain terminal of the second transistor M2 is connected to a power source terminal VDD, and a gate terminal of the second transistor M2 is connected to a drain terminal of the second transistor M2.
In this embodiment, specifically, the first transistor M1 and the second transistor M2 are both NMOS transistors.
As shown in fig. 1, the preamplifier 22 performs a pre-amplification process on the carrier electrical signal processed by the electromagnetic wave reflection unit 21.
The gain variable amplifier 23 amplifies the carrier electrical signal processed by the preamplifier 22.
The gain suppressing unit 24 performs waveform distortion gain suppression processing on the carrier electric signal processed by the gain variable amplifier 23.
As shown in fig. 3, in detail, the gain suppressing unit 24 includes an eighth resistor R8, a sixth capacitor C6, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, and a seventh transistor M7.
A source terminal of the third transistor M3, a source terminal of the sixth transistor M6, and a source terminal of the seventh transistor M7 are respectively connected to the positive output terminal of the gain variable amplifier 23; a source terminal of the fourth transistor M4, a source terminal of the fifth transistor M5, a source terminal of the seventh transistor M7 and a negative terminal of the sixth capacitor C6 are respectively connected to the negative output terminal of the gain variable amplifier 23; a gate terminal of the third transistor M3 is connected to a drain terminal of the third transistor M3, a gate terminal of the sixth transistor M6, a drain terminal of the fourth transistor M4 and a gate terminal of the fourth transistor M4, respectively; a drain terminal of the sixth transistor M6 is connected to a gate terminal of the fifth transistor M5, a drain terminal of the fifth transistor M5, and a first terminal of the eighth resistor R8, respectively; a second end of the eighth resistor R8 is respectively connected to the positive terminal of the sixth capacitor C6 and the gate terminal of the seventh transistor M7; a source terminal of the seventh transistor M7 and a drain terminal of the seventh transistor M7 are connected to the input of the band pass filter 25, respectively.
In the description of the present embodiment, in the description of the two ends of the electronic component such as the resistor, the capacitor, and the like, if the component has positive and negative polarities, the first end is the positive end, and the second end is the negative end; if the positive polarity and the negative polarity are not distinguished, the first end and the second end are defined in sequence according to the flow direction of the electric signal, so that the description is convenient.
In this embodiment, it is preferable that the third transistor M3 and the sixth transistor M6 are both PMOS transistors; the fourth transistor M4, the fifth transistor M5, and the seventh transistor M7 are all NMOS transistors.
With continued reference to fig. 1, the band-pass filter 25 performs filtering processing on the carrier electrical signal processed by the gain variable amplifier 23. In this case, the band-pass filter 25 receives the carrier electrical signal subjected to the waveform distortion gain suppression processing by the gain suppression unit 24 and performs the filtering processing on the carrier electrical signal, according to the setting of the gain suppression unit 24.
The comparator 26 performs digital signal conversion processing on the carrier electric signal processed by the band-pass filter 25.
The automatic gain control unit 29 determines whether the carrier electrical signal processed by the comparator 26 is interference noise and feeds back the interference noise to the variable gain amplifier 23 to control the gain output of the variable gain amplifier 23.
The integrator 27 restores the carrier electric signal processed by the comparator 26.
The schmitt trigger 28 shapes the carrier electrical signal processed by the integrator 27.
The first transistor M1 amplifies and outputs the carrier electric signal processed by the schmitt trigger 28.
The output terminal OUT receives the carrier electrical signal processed by the first transistor M1 and outputs the carrier electrical signal, thereby implementing the output of the infrared receiving chip circuit 100.
The following is further explained from the overall circuit:
the ir sense diode 1 receives an ir carrier signal containing a desired signal (target signal) and converts it into a carrier electrical signal which is input to the input terminal IN of the system-IN-chip 2.
When a strong electromagnetic wave interference signal exists at the input terminal IN of the system-IN-chip 2, the electromagnetic wave reflection unit 21 can adjust the self-generated impedance matching, so that most of the electromagnetic wave interference signal is reflected back without generating harmonic distortion on the amplification link of the system-IN-chip 2, thereby affecting the reception of a useful signal (target signal). Then, the electromagnetic wave reflection unit 21 outputs a carrier electrical signal containing useful information, and the carrier electrical signal is amplified by the preamplifier 22 and the gain variable amplifier 23, filtered by the band-pass filter 25, then converted into a digital signal by the comparator 26, restored by the integrator 27, and finally amplified by the schmitt trigger 28 and the first transistor M1(NMOS transistor) and the overvoltage resistor R and output to the output terminal OUT.
In the system 2, the automatic gain control unit 29 may read the digital signal of the carrier electrical signal output by the comparator 26 and determine whether the signal is a useful signal or ambient light interference noise, and based on the determination, feed back the signal to the gain variable amplifier 23 to control the gain of the gain variable amplifier 23, so that the noise is suppressed and the useful signal can be amplified and output.
Due to the arrangement of the electromagnetic wave reflection unit 21, when the infrared receiving chip circuit 100 has a large electromagnetic wave interference signal, the electromagnetic wave reflection unit 21 can prevent the high frequency signal from generating amplitude saturation distortion at the input node of the band-pass filter 25, so as to prevent a low frequency interference component from being generated, further prevent the infrared receiving chip circuit 100 from being influenced by an external strong electromagnetic wave interference signal, and improve the reliability and accuracy of the infrared receiving chip circuit 100.
The principle of the electromagnetic wave reflecting means 21 is as follows: in order to effectively suppress the radiation and conduction of electromagnetic waves and higher harmonics, the maxwell theory of electromagnetic waves is utilized to adjust the reflection coefficient S11 input by the electromagnetic wave reflection unit 21, so that the S11 value of the electromagnetic interference signal is large, the input matching of the electromagnetic interference signal is poor, and most of the electromagnetic interference signal can be reflected out and cannot enter the infrared receiving chip circuit 100. Low-frequency interference components generated at the input of the band-pass filter 25 due to external strong electromagnetic wave interference signals are avoided, and false output generated by the infrared receiving chip circuit 100 under the external strong electromagnetic wave interference signals is avoided, that is, the anti-interference, especially anti-electromagnetic interference (EMI) capability of the infrared receiving chip circuit 100 is greatly improved.
In addition, the following is explained in conjunction with the gain suppressing unit 24:
the carrier electric signal is input to the infrared receiving chip circuit 100, and amplified by the preamplifier 22 and the gain variable amplifier 23. The gain suppressing unit 24 is used as a load of the gain variable amplifier 23, and when the amplitude of the output signal of the gain variable amplifier 23 is too large and slight saturation distortion is generated, the gain suppressing unit 24 may adjust the self-generated impedance to decrease and maintain for a period of time, so that the amplitude of the output signal of the gain variable amplifier 23 decreases, and severe saturation distortion of the amplitude is simulated. Then, the output signal of the gain suppression unit 24 is filtered by the band-pass filter 25, then converted into a digital signal by the comparator 26, and then restored by the integrator 27 to a useful signal in the carrier electrical signal, and finally shaped by the schmitt trigger 28 and amplified by the first transistor M1 and the overvoltage resistor R to be output to the output terminal OUT. In the infrared receiving chip circuit 100, the automatic gain control unit 29 may read the digital signal of the carrier electrical signal outputted from the comparator 26 and determine whether the signal is a desired signal or ambient light interference noise, and based on the determination, feed back the signal to the gain variable amplifier 23 to control the gain of the gain variable amplifier 23, so that the noise is suppressed and the desired signal can be amplified and outputted.
Due to the arrangement of the gain suppression unit 24, when a large WIFI interference signal exists outside the infrared receiving chip circuit 100, the gain suppression unit 24 can prevent a high-frequency signal from generating amplitude saturation distortion at an input node of the band-pass filter 25, so as to prevent a low-frequency interference component from being generated, and further prevent the infrared receiving chip circuit 100 from being affected by an external strong WIFI interference signal.
The principle of the gain suppression unit 24 is as follows: when the output amplitude of the gain variable amplifier 23 exceeds the sum of the threshold voltage of the third transistor M3 and the threshold voltage of the fourth transistor M4, the MOS transistors of the third transistor M3 and the fourth transistor M4 are turned on and operate in a sub-threshold region. At this time, the output signal of the gain variable amplifier 23 generates slight saturation distortion. The third transistor M3 generates a current flowing from its source terminal to its drain terminal, which is mirrored in the sixth transistor M6 and the fifth transistor M5, raising the gate-drain voltage of the fifth transistor M5. The gate-drain voltage of the fifth transistor M5 is filtered by the eighth resistor R8 and the sixth capacitor C6 and then is supplied to the seventh transistor M7, so that the seventh transistor M7 is turned on, and the equivalent resistance between the positive and negative output terminals of the gain variable amplifier 23 is reduced, thereby reducing the output amplitude thereof and avoiding saturation distortion. Since the RC time constant of the eighth resistor R8 and the sixth capacitor C6 is typically 5ms, the equivalent on-resistance of the seventh transistor M7 is maintained for a period of time.
The gain suppressing unit 24 is configured such that the infrared receiving chip circuit 100 does not generate waveform saturation distortion at the input of the band pass filter 25 due to the external strong WIFI interference signal. Therefore, low-frequency interference components are prevented from being generated, and the infrared receiving chip circuit 100 is not affected by external strong WIFI interference signals.
In the infrared receiving chip circuit 100 of the present invention, the electromagnetic wave reflection unit 21 and the gain suppression unit 24 are added to the circuit at the same time in this embodiment, so that the infrared receiving chip circuit 100 has stronger interference resistance, better reliability and higher accuracy.
The present invention also provides an infrared receiving system (not shown), which comprises the above infrared receiving chip circuit provided by the present invention.
Compared with the prior art, the infrared receiving chip circuit and the infrared receiving system have the advantages that the electromagnetic wave reflection unit is additionally arranged at the front end of the preamplifier, the carrier electric signal is received through the electromagnetic wave reflection unit, the electromagnetic wave interference signal reflection processing is carried out on the carrier electric signal, the electromagnetic wave interference signal entering the infrared receiving chip circuit is effectively reflected, the problem that the output of the infrared receiving chip circuit outputs an error signal due to the interference of an external electromagnetic wave signal is further avoided, the anti-interference capability, particularly the anti-electromagnetic wave interference capability, of the infrared receiving chip circuit and the infrared receiving system is improved, and the reliability and the accuracy of the infrared receiving chip circuit and the infrared receiving system are further improved. In addition, the infrared receiving chip circuit is additionally provided with the gain suppression unit between the gain variable amplifier and the band-pass filter, and the gain suppression unit is used for performing waveform distortion gain suppression processing on the carrier electric signal processed by the gain variable amplifier, so that the anti-interference capability, especially the anti-WIFI interference capability, of the infrared receiving chip circuit and the infrared receiving system is improved, and the comprehensive anti-interference capability and reliability of the infrared receiving chip circuit and the infrared receiving system are further improved.
It should be noted that the above-mentioned embodiments described with reference to the drawings are only intended to illustrate the present invention and not to limit the scope of the present invention, and it should be understood by those skilled in the art that modifications and equivalent substitutions can be made without departing from the spirit and scope of the present invention. Furthermore, unless the context indicates otherwise, words that appear in the singular include the plural and vice versa. Additionally, all or a portion of any embodiment may be utilized with all or a portion of any other embodiment, unless stated otherwise.
Claims (6)
1. An infrared receiving chip circuit comprising:
the infrared sensing diode is used for receiving an infrared carrier signal and converting the infrared carrier signal into a carrier electric signal; the chip internal system is used for carrying out signal optimization processing on the carrier electric signal and outputting the carrier electric signal;
characterized in that, the chip internal system includes:
an input for receiving the carrier electrical signal;
the electromagnetic wave reflection unit is used for receiving the carrier electric signal and performing electromagnetic wave interference signal reflection processing on the carrier electric signal; the electromagnetic wave reflection unit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a second transistor; a first end of the first resistor is connected to the output of the infrared sensing diode, and a second end of the first resistor is respectively connected to a first end of the second resistor and a first end of the third resistor; the second end of the second resistor is connected to the first end of the fifth resistor and the first end of the second capacitor respectively; a second end of the third resistor is connected to a first end of the fourth resistor, a first end of the sixth resistor and a first end of the first capacitor respectively; a second terminal of the fourth resistor is connected to a source terminal of the second transistor; a second end of the fifth resistor is connected to a second end of the seventh resistor, a second end of the first capacitor, a second end of the third capacitor, and a first end of the fifth capacitor, respectively; a second end of the sixth resistor is connected to a first end of the seventh resistor, a second end of the second capacitor, a first end of the third capacitor, and a first end of the fourth capacitor, respectively; a drain terminal of the second transistor is connected to a power supply terminal, and a gate terminal of the second transistor is connected to a drain terminal of the second transistor;
the preamplifier is used for carrying out pre-amplification treatment on the carrier electric signal after being treated by the electromagnetic wave reflection unit; a second end of the fourth capacitor is connected to the positive input end of the preamplifier, and a second end of the fifth capacitor is connected to the negative input end of the preamplifier;
the gain variable amplifier is used for amplifying the carrier electric signal processed by the pre-amplifier;
the band-pass filter is used for filtering the carrier electric signal processed by the gain variable amplifier;
the comparator is used for carrying out digital signal conversion processing on the carrier electric signal processed by the band-pass filter;
the automatic gain control unit is used for judging whether the carrier electric signal processed by the comparator is interference noise or not and feeding back the interference noise to the gain variable amplifier so as to control the gain output of the gain variable amplifier;
the integrator is used for restoring the carrier electric signal processed by the comparator;
the Schmitt trigger is used for shaping the carrier electric signal processed by the integrator;
the first transistor is used for amplifying the carrier electric signal processed by the Schmitt trigger and outputting the carrier electric signal; and
an output end;
the gate terminal of the first transistor is connected to the output of the schmitt trigger, the source terminal of the first transistor is connected to the ground terminal, the drain of the first transistor is connected to the output terminal and the drain of the first transistor is connected to the power supply terminal through a series overvoltage resistor.
2. The infrared receiving chip circuit according to claim 1, wherein the first transistor and the second transistor are each an NMOS transistor.
3. The infrared receiving chip circuit according to claim 1, further comprising a gain suppressing unit connected between the gain variable amplifier and the band-pass filter, for performing waveform distortion gain suppression processing on the carrier electric signal processed by the gain variable amplifier.
4. The infrared receiving chip circuit according to claim 3, wherein the gain suppressing unit includes an eighth resistor, a sixth capacitor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a seventh transistor;
a source terminal of the third transistor, a source terminal of the sixth transistor, and a source terminal of the seventh transistor are respectively connected to a positive output terminal of the gain variable amplifier;
a source terminal of the fourth transistor, a source terminal of the fifth transistor, a source terminal of the seventh transistor, and a negative terminal of the sixth capacitor are respectively connected to a negative output terminal of the gain variable amplifier;
a gate terminal of the third transistor is connected to a drain terminal of the third transistor, a gate terminal of the sixth transistor, a drain terminal of the fourth transistor, and a gate terminal of the fourth transistor, respectively;
a drain terminal of the sixth transistor is connected to a gate terminal of the fifth transistor, a drain terminal of the fifth transistor, and a first terminal of the eighth resistor, respectively;
a second end of the eighth resistor is connected to a positive terminal of the sixth capacitor and a gate terminal of the seventh transistor, respectively;
a source terminal of the seventh transistor and a drain terminal of the seventh transistor are respectively connected to an input of the band pass filter.
5. The infrared receiving chip circuit according to claim 4, wherein the third transistor and the sixth transistor are both PMOS transistors; the fourth transistor, the fifth transistor, and the seventh transistor are all NMOS transistors.
6. An infrared receiving system comprising the infrared receiving chip circuit according to any one of claims 1 to 5.
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| CN201810446400.3A CN108736967B (en) | 2018-05-11 | 2018-05-11 | Infrared receiving chip circuit and infrared receiving system |
| PCT/CN2018/110807 WO2019214164A1 (en) | 2018-05-11 | 2018-10-18 | Infrared receiving chip circuit and infrared receiving system |
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| CN201810446400.3A CN108736967B (en) | 2018-05-11 | 2018-05-11 | Infrared receiving chip circuit and infrared receiving system |
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| CN113328764B (en) * | 2021-06-04 | 2022-10-28 | 深圳诺博医疗科技有限公司 | Intelligent empty box detection system and intelligent empty box detection method |
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| WO2019214164A1 (en) | 2019-11-14 |
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