CN217981738U - Square flat type packaged chip testing device - Google Patents
Square flat type packaged chip testing device Download PDFInfo
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- CN217981738U CN217981738U CN202222047396.8U CN202222047396U CN217981738U CN 217981738 U CN217981738 U CN 217981738U CN 202222047396 U CN202222047396 U CN 202222047396U CN 217981738 U CN217981738 U CN 217981738U
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Abstract
The utility model discloses a flat encapsulated chip testing arrangement of square, include: the testing device comprises a testing body, a first limiting hole and a second limiting hole, wherein the testing body is hollow to form an accommodating cavity, a plurality of first limiting holes are formed in the testing body, at least one side of the testing body is provided with a through hole, and the through hole is communicated with the accommodating cavity; the floating plate is arranged in the accommodating cavity and can float up and down in the accommodating cavity, and a channel is formed in the bottom of the floating plate and communicated with the accommodating cavity; the bottom plate is arranged in the accommodating cavity and is positioned below the floating plate, and a plurality of second limiting holes are formed in the bottom plate; the elastic mechanism is arranged between the floating plate and the bottom plate; the probe assembly comprises a plurality of probes, one end of each probe is limited in the first limiting hole, the other end of each probe is limited in the second limiting hole through the containing cavity, and the probes are close to the channels. The utility model discloses can keep in the invariable input device of liquid nitrogen or refrigerant, keep the probe to reach low temperature at floating plate bottom circulation, make the chip that awaits measuring satisfy the low temperature test requirement, with low costs, longe-lived, test yield height.
Description
Technical Field
The utility model relates to a chip testing technical field especially relates to a flat type of square encapsulation chip testing arrangement.
Background
QFP is an abbreviation of Quad Flat Package and refers to a square Flat chip. Because the QFP series chip needs to work and operate in a low cold region, namely the environment for applying the chip is a low-temperature occasion. Before the chip leaves the factory, the chip needs to be tested at low temperature, and whether the chip can meet the requirements of a low-temperature use environment or not is judged. When the chip is tested manually, the chip to be tested is subjected to fan heat dissipation, the cooling effect is poor, and the requirement of low-temperature environment testing below-40 ℃ cannot be met. Automatic test chip equipment is provided to improve the test efficiency, and the existing fan heat dissipation mode cannot be compatible with the automatic test equipment and cannot meet the low-temperature test requirement.
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide a square flat type encapsulation chip testing device, which is not enough for the prior art.
In order to achieve the above object, an embodiment of the present invention provides the following technical solutions:
a square flat type packaged chip testing device comprises:
the testing device comprises a testing body, a first limiting hole and a second limiting hole, wherein the testing body is hollow to form an accommodating cavity, a plurality of first limiting holes are formed in the testing body, at least one side of the testing body is provided with a through hole, and the through hole is communicated with the accommodating cavity;
the floating plate is arranged in the accommodating cavity and can float up and down in the accommodating cavity, and a channel is formed in the bottom of the floating plate and communicated with the accommodating cavity;
the bottom plate is arranged in the accommodating cavity and positioned below the floating plate, and a plurality of second limiting holes are formed in the bottom plate;
the elastic mechanism is arranged between the floating plate and the bottom plate;
the probe assembly comprises a plurality of probes, one end of each probe is limited in the first limiting hole, the other end of each probe is limited in the second limiting hole through the accommodating cavity, and the probes are close to the channels.
As a further improvement of the utility model, the passageway includes that first logical groove leads to the groove with the second, first logical groove leads to the crossing intercommunication in groove with the second.
As a further improvement of the utility model, the first through groove communicates with the second through groove vertically and horizontally.
As a further improvement of the utility model, the upper end of the floating plate is provided with at least one convex plate.
As a further improvement, the floating plate extends outward and has at least one lug, the inside of test body is provided with at least one spacing groove, the lug is put into the spacing inslot.
As a further improvement, the first spacing hole, the spacing hole of second are the step hole, the upper portion aperture in first spacing hole is little, the lower part aperture is big, the upper portion aperture in the spacing hole of second is big, the lower part aperture is little.
As a further improvement of the utility model, it includes first cavity, second cavity, third cavity, the fourth cavity that down sets gradually from the last to hold the chamber, form first step face between first cavity and the second cavity, form second step face between second cavity and the third cavity, form spacing portion between first step face and the second step face, first spacing hole is seted up in spacing portion, form third step face between third cavity and the fourth cavity.
As a further improvement of the present invention, it is a plurality of the first spacing holes and a plurality of the second spacing holes are all surrounded to form a square.
As a further improvement of the present invention, the bottom plate is located in the fourth cavity and locked to the third step surface by at least one screw.
As a further improvement, the third step surface is provided with at least one positioning pin, be provided with at least one pinhole in the bottom plate, the positioning pin stretches into the pinhole.
The utility model has the advantages that:
the utility model discloses can keep in the invariable input testing arrangement of liquid nitrogen or refrigerant, keep the probe to reach low temperature in floating plate bottom circulation, make the chip that awaits measuring satisfy the low temperature test requirement, with low costs, longe-lived, test yield height, and be convenient for change and maintain.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is an exploded schematic view of a preferred embodiment of the present invention;
FIG. 2 is an enlarged view of A in FIG. 1;
FIG. 3 is an enlarged view of B in FIG. 1;
fig. 4 is a top view of the probe of the preferred embodiment of the present invention before pressing;
FIG. 5 is a sectional view taken along line J-J of FIG. 4;
FIG. 6 is a cross-sectional view taken along line E-E of FIG. 4;
fig. 7 is a top view of the probe of the preferred embodiment of the present invention after being pressed;
FIG. 8 is a cross-sectional view taken along line D-D of FIG. 7;
in the figure: 10. the testing device comprises a testing body, 101, an accommodating cavity, 102, a first limiting hole, 103, a through hole, 104, a limiting groove, 111, a first cavity, 112, a second cavity, 113, a third cavity, 114, a fourth cavity, 115, a first step surface, 116, a second step surface, 117, a limiting part, 118, a third step surface, 119, a positioning pin, 120, a bolt, 121, a nut, 20, a floating plate, 201, a channel, 202, a first through groove, 203, a second through groove, 204, a first side wall, 205, a second side wall, 206, a convex plate, 207, a convex block, 30, a bottom plate, 301, a second limiting hole, 302, a screw, 303, a pin hole, 40, a probe, 50, a spring, 60, a chip to be tested, 601 and a pin.
Detailed Description
In order to make the technical solutions in the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, but not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts shall belong to the protection scope of the present invention.
Referring to fig. 1 to 3, an embodiment of the present application discloses a testing apparatus for a square flat type packaged chip, including: the testing device comprises a testing body 10, wherein an accommodating cavity 101 is formed in the testing body 10 in a hollow mode, a plurality of first limiting holes 102 are formed in the testing body 10, at least one side of the testing body 10 is provided with a through hole 103, and the through hole 103 is communicated with the accommodating cavity 101; the floating plate 20 is arranged in the accommodating cavity 101 and can float up and down in the accommodating cavity 101, a channel 201 is formed at the bottom of the floating plate 20, and the channel 201 is communicated with the accommodating cavity 101; the bottom plate 30 is arranged in the accommodating cavity 101 and is positioned below the floating plate 20, and a plurality of second limiting holes 301 are formed in the bottom plate 30; an elastic mechanism provided between the floating plate 20 and the bottom plate 30; the probe assembly comprises a plurality of probes 40, one end of each probe 40 is limited in the first limiting hole 102, the other end of each probe 40 is limited in the second limiting hole 301 through the accommodating cavity 101, and the probes 40 are close to the channels 201. The cooling medium can get into from through-hole 103 and hold chamber 101 reentrant passageway 201, because the setting of passageway 201, can avoid the mixed and disorderly diffusion of cooling medium, but gather in passageway 201, at passageway 201 inner loop, keep invariable low temperature, and probe 40 is close to with passageway 201, air conditioning is by passageway 201 direct flow to probe 40, cool down probe 40, the chip that awaits measuring is placed in floating plate 20 top, the pin of the chip that awaits measuring contacts with probe 40 when testing, reduce the temperature of the chip that awaits measuring, make the chip that awaits measuring reach the low temperature test requirement.
In the present embodiment, the channel 201 includes a first through groove 202 and a second through groove 203, and the first through groove 202 and the second through groove 203 intersect and communicate. The first through-groove 202 penetrates through two first side walls 204 of the floating plate 20, and the second through-groove 203 penetrates through two second side walls 205 of the floating plate 20. In this way, when the cooling medium enters the first through groove 202 through the through hole 103, flows to the intersection of the first through groove 202 and the second through groove 203, continues to flow along the first through groove 202 and to the second through groove 203, and then flows through the probe 40 corresponding to the first through groove 202 and the second through groove 203.
In order to further improve the rapidity of the flow of the cooling medium, the first through groove 202 and the second through groove 203 are preferably communicated in a crisscross manner, and the first through groove 202 and the second through groove 203 are preferably communicated in a cross manner.
In order to facilitate the limiting of the chip to be tested, it is preferable that at least one convex plate 206 is disposed at the upper end of the floating plate 20, and the pins of the chip to be tested are clamped by the convex plate 206, so as to improve the contact stability between the chip to be tested and the probes 40. Specifically, the convex plates 206 are arranged around the upper end of the floating plate 20, so that the stability of the chip to be tested is further improved.
In this embodiment, the floating plate 20 extends outward to form at least one protrusion 207, the test body 10 is provided inside with at least one limiting groove 104, and the protrusion 207 is disposed in the limiting groove 104 to avoid the floating plate 20 from shaking and ensure the floating plate 20 to move in the up-and-down direction. Specifically, the outside four corners of floating plate 20 all outwards extends has lug 207, and the inside four corners of test body 10 all is provided with spacing groove 104, further improves the stability that floating plate 20 reciprocated.
In order to facilitate the shape matching with the probe 40 and improve the stability of the probe 40, it is preferable that the first limiting hole 102 and the second limiting hole 301 are stepped holes, the upper portion of the first limiting hole 102 has a small aperture and the lower portion of the first limiting hole has a large aperture, and the upper portion of the second limiting hole 301 has a large aperture and the lower portion of the second limiting hole has a small aperture.
In this embodiment, the accommodating cavity 101 includes a first cavity 111, a second cavity 112, a third cavity 113, and a fourth cavity 114 that are sequentially arranged from top to bottom, a first step surface 115 is formed between the first cavity 111 and the second cavity 112, a second step surface 116 is formed between the second cavity 112 and the third cavity 113, a limiting portion 117 is formed between the first step surface 115 and the second step surface 116, the first limiting hole 102 is opened in the limiting portion 117, and a third step surface 118 is formed between the third cavity 113 and the fourth cavity 114. The first cavity 111 is used for placing a chip to be tested, the floating plate 20 is located in the first cavity 111 and the second cavity 112, and the bottom plate 30 is located in the fourth cavity 114.
To facilitate the securing of the base plate 30, the base plate 30 is preferably locked to the third step surface 118 by at least one screw 302. The bottom plate 30 seals the bottom of holding chamber 101, avoids the leakage of cooling medium for cooling medium can gather the circulation, improves the cooling effect.
The first limiting holes 102 and the second limiting holes 301 enclose a square, the probes 40 also enclose a square, and the probes 40 surround the channel 201. The middle portion of the probe 40 is located in the third cavity 113, the temperature reducing medium introduced through the through hole 103 firstly enters the third cavity 113, then the cold air enters the first through groove 202, and then flows along the first through groove 202 and the second through groove 203 to respectively reduce the temperature of the respective corresponding probe 113, and the air flow path is shown by the arrow in fig. 5.
To facilitate the placement of the bottom plate 30, it is preferable that the third step surface 118 is provided with at least one positioning pin 119, and the bottom plate 30 is provided with at least one pin hole 303, and the positioning pin 119 extends into the pin hole 303, so as to ensure the accurate position of the bottom plate 30, and thus the position accuracy of the probe 40.
Preferably the resilient means comprises at least one spring 50. In order to facilitate the smoothness of movement of the floating plate 20, it is preferable that the number of the springs 50 is four.
At least one set of locking members is preferably further provided, and the locking members include a bolt 120 and a nut 121, and the test body 10 and the circuit board are locked together by the cooperation of the bolt 120 and the nut 121, so that the lower end of the probe 40 is connected to the circuit board, thereby facilitating the test.
The utility model discloses when using, the examination chip 60 that awaits measuring is placed in unsteady board 20 top, protruding board 206 blocks the pin 601 of examination chip 60 that awaits measuring, make examination chip 60 that awaits measuring stabilize on unsteady board 20, the examination chip 60 that awaits measuring of pushing down, examination chip 60 compression spring 50 that awaits measuring, examination chip 60's pin 601 and probe 40's top contact awaits measuring, liquid nitrogen or refrigerant pass through-hole 103 admission passage 201, respectively along first logical groove 202, second logical groove 203 flows, again by first logical groove 202, second logical groove 203 directly flows the probe 40 that corresponds, cool down probe 40, probe 40 and examination chip 60 that awaits measuring contact, thereby reduce the temperature of examination chip 60 that awaits measuring, make the examination chip 60 that awaits measuring reach the low temperature test requirement.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (10)
1. A square flat type packaged chip testing device is characterized by comprising:
the testing device comprises a testing body, a first limiting hole and a second limiting hole, wherein the testing body is hollow to form an accommodating cavity, a plurality of first limiting holes are formed in the testing body, at least one side of the testing body is provided with a through hole, and the through hole is communicated with the accommodating cavity;
the floating plate is arranged in the accommodating cavity and can float up and down in the accommodating cavity, and a channel is formed in the bottom of the floating plate and communicated with the accommodating cavity;
the bottom plate is arranged in the accommodating cavity and positioned below the floating plate, and a plurality of second limiting holes are formed in the bottom plate;
the elastic mechanism is arranged between the floating plate and the bottom plate;
the probe assembly comprises a plurality of probes, one end of each probe is limited in the first limiting hole, the other end of each probe is limited in the second limiting hole through the accommodating cavity, and the probes are close to the channels.
2. The square flat-type packaged chip testing device according to claim 1, wherein the channel comprises a first through groove and a second through groove, and the first through groove and the second through groove are communicated in an intersecting manner.
3. The square type flat package chip testing device according to claim 2, wherein the first through groove and the second through groove are communicated in a criss-cross manner.
4. The apparatus as claimed in claim 1, wherein the floating plate has at least one protrusion plate at an upper end thereof.
5. The square type flat package chip testing device according to claim 1, wherein the floating plate is extended outward to form at least one protrusion, the testing body is provided inside with at least one limiting groove, and the protrusion is disposed in the limiting groove.
6. The square flat-type packaged chip testing device according to claim 1, wherein the first and second limiting holes are stepped holes, the first limiting hole has a small upper aperture and a large lower aperture, and the second limiting hole has a large upper aperture and a small lower aperture.
7. The square flat-type packaged chip testing device according to claim 1, wherein the accommodating cavity comprises a first cavity, a second cavity, a third cavity and a fourth cavity which are sequentially arranged from top to bottom, a first step surface is formed between the first cavity and the second cavity, a second step surface is formed between the second cavity and the third cavity, a limiting portion is formed between the first step surface and the second step surface, the first limiting hole is formed in the limiting portion, and a third step surface is formed between the third cavity and the fourth cavity.
8. The square flat type packaged chip testing device according to claim 1 or 7, wherein the first and second limiting holes enclose a square.
9. The apparatus of claim 7, wherein the bottom plate is located in the fourth cavity and locked to the third step surface by at least one screw.
10. The square flat type packaged chip testing device according to claim 7, wherein the third step surface is provided with at least one positioning pin, the bottom plate is provided with at least one pin hole, and the positioning pin extends into the pin hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222047396.8U CN217981738U (en) | 2022-08-04 | 2022-08-04 | Square flat type packaged chip testing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222047396.8U CN217981738U (en) | 2022-08-04 | 2022-08-04 | Square flat type packaged chip testing device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217981738U true CN217981738U (en) | 2022-12-06 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202222047396.8U Active CN217981738U (en) | 2022-08-04 | 2022-08-04 | Square flat type packaged chip testing device |
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| CN (1) | CN217981738U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117092491A (en) * | 2023-10-18 | 2023-11-21 | 苏州微飞半导体有限公司 | Chip test seat applied to large-order pins and manufacturing method |
| CN117214484A (en) * | 2023-11-09 | 2023-12-12 | 上海泽丰半导体科技有限公司 | Chip test socket |
-
2022
- 2022-08-04 CN CN202222047396.8U patent/CN217981738U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117092491A (en) * | 2023-10-18 | 2023-11-21 | 苏州微飞半导体有限公司 | Chip test seat applied to large-order pins and manufacturing method |
| CN117092491B (en) * | 2023-10-18 | 2024-04-05 | 苏州微飞半导体有限公司 | Chip test seat applied to large-order pins and manufacturing method |
| CN117214484A (en) * | 2023-11-09 | 2023-12-12 | 上海泽丰半导体科技有限公司 | Chip test socket |
| CN117214484B (en) * | 2023-11-09 | 2024-02-02 | 上海泽丰半导体科技有限公司 | Chip test socket |
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