CN217904368U

CN217904368U - MMIC low-noise amplifier

Info

Publication number: CN217904368U
Application number: CN202222085176.4U
Authority: CN
Inventors: 王玉军; 钟莉; 冯洋
Original assignee: Chengdu Tiger Microwave Technology Co Ltd
Current assignee: Chengdu Tiger Microwave Technology Co Ltd
Priority date: 2022-08-09
Filing date: 2022-08-09
Publication date: 2022-11-25
Anticipated expiration: 2032-08-09

Abstract

The utility model discloses a MMIC low noise amplifier, including input matching circuit, transistor cascade topology, output matching circuit and negative feedback circuit, input matching circuit receives external input signal as the output port of whole amplifier, and input matching circuit's output is connected with transistor cascade topology's input, transistor cascade topology's output with output matching circuit's input is connected, and output matching circuit's output is as the output port of whole amplifier for external output signal; the negative feedback circuit is connected with the transistor cascade topology structure. The utility model provides a low noise amplifier has high gain and low noise figure, can satisfy the higher requirement of radio frequency system.

Description

MMIC low-noise amplifier

Technical Field

The invention relates to an amplifier, in particular to an MMIC low-noise amplifier.

Background

With the advance of wireless technology in the 5G era, a new generation of high-performance radio frequency transceiving system puts forward more rigorous requirements, and on the basis of high gain and low noise coefficient, because a low noise amplifier is positioned at the front end of the whole radio frequency system, the performance of the low noise amplifier is directly related to the noise coefficient and the receiving sensitivity of the whole radio frequency system, and the high and low noise amplifier is one of the most critical parts of the radio frequency system.

Most of MMIC low-noise amplifier chips on the market adopt a self-biased topology or a distributed topology. For a low noise amplifier, the noise coefficient is the first concern, and this is an extremely important index for low noise amplification. Assuming this scenario, when the amplifier does not have any noise inside itself, and the input signal passes through the amplifier together with other noise signals, the amplifier amplifies all the signals, and the ratio of the input signal to the noise at the input end of the amplifier is consistent with the ratio of the output signal to the output noise at the output end. It is necessary to design a low noise amplifier having a high gain and a low noise figure.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to overcome prior art's not enough, provide a MMIC low noise amplifier, have high gain and low noise figure, can satisfy radio frequency system's higher requirement.

The purpose of the utility model is realized through the following technical scheme: an MMIC low-noise amplifier comprises an input matching circuit, a transistor cascade topology structure, an output matching circuit and a negative feedback circuit, wherein the input matching circuit is used as an output port of the whole amplifier and receives an external input signal; the negative feedback circuit is connected with the transistor cascade topology structure;

the transistor cascade topological structure comprises an MOS tube M1, an MOS tube M2 and a resistor RD, wherein the source electrode of the MOS tube M1 is grounded, the grid electrode of the MOS tube M1 is used as the input end of the transistor cascade topological structure, the drain electrode of the MOS tube M1 is connected with the source electrode of the MOS tube M2, the grid electrode of the MOS tube M2 is connected with an interface Vb, the interface Vb is used as a grid voltage power supply port of the MOS tube M2, the drain electrode of the MOS tube M2 is connected to a power supply port through the resistor RD, and the output end of the transistor cascade topological structure is connected between the drain electrode of the MOS tube M2 and the resistor RD.

The negative feedback circuit comprises a capacitor C2 and a resistor R2, wherein the first end of the capacitor C2 is connected to the grid electrode of the MOS tube M1, the second end of the capacitor C2 is connected with the first end of the resistor R2, and the second end of the resistor R2 is connected to the drain electrode of the MOS tube M2.

The utility model has the advantages that: the utility model provides a MMIC low noise amplifier has high-gain and low noise figure, can satisfy the higher requirement of radio frequency system.

Drawings

FIG. 1 is a schematic diagram of the present invention;

FIG. 2 is a schematic diagram of a transistor cascade topology;

FIG. 3 is a schematic diagram of a negative feedback circuit and its connection;

FIG. 4 is a graph showing the gain and return loss curves of the embodiment;

FIG. 5 is a graph illustrating a noise figure curve according to an embodiment;

FIG. 6 is a graph showing stability curves in examples;

FIG. 7 is a diagram illustrating a P-1dB curve in the example.

Detailed Description

The technical solution of the present invention is described in further detail below with reference to the accompanying drawings, but the scope of the present invention is not limited to the following description.

As shown in fig. 1, an MMIC low noise amplifier is characterized in that: the amplifier comprises an input matching circuit, a transistor cascade topological structure, an output matching circuit and a negative feedback circuit, wherein the input matching circuit is used as an output port of the whole amplifier and receives an external input signal; the negative feedback circuit is connected with the transistor cascade topology structure;

The negative feedback circuit comprises a capacitor C2 and a resistor R2, wherein the first end of the capacitor C2 is connected to the grid electrode of the MOS transistor M1, the second end of the capacitor C2 is connected with the first end of the resistor R2, and the second end of the resistor R2 is connected to the drain electrode of the MOS transistor M2. The transistor cascade topology part particularly refers to a cascode topology structure and comprises cascades of common sources and common gates. Since the cascode stage converts the voltage signal into the current signal, and the input signal of the cascode stage is the current signal, the cascode and cascode amplifying circuits can be cascaded to form the cascode amplifier, as shown in fig. 2:

the negative feedback circuit specifically comprises an RC circuit, and an amplifier with better gain flatness and smaller input-output standing wave ratio can be obtained without adding an additional matching circuit by adding a feedback resistor R2 between the drain and the gate of the transistor cascade topology structure. The capacitor C2 is mainly used for preventing the direct current bias voltage of the field effect transistor source level from being fed back to the grid electrode to influence the static working point of the field effect transistor. As shown in fig. 3:

in an embodiment of the present application, the input matching circuit includes a blocking capacitor C1, and a first end of the blocking capacitor C1 is used as an input end of the input matching circuit and receives an external input signal; and the second end of the blocking capacitor C1 is used as the output end of the input matching circuit and is connected with the grid electrode of the MOS transistor M1. The low-noise amplifier further comprises a power supply circuit, the power supply circuit is used for supplying power to the whole low-noise amplifier, the power supply circuit adopts a VCC power supply and a topology power supply, and the topology power supply is connected to a unit port of the transistor cascade topology structure and supplies power to the transistor cascade topology structure. The output matching circuit comprises a blocking capacitor C3 and a choke inductor L1, wherein the first end of the blocking capacitor C3 is used as the input end of the output matching circuit and is used for being connected with the drain electrode of an MOS (metal oxide semiconductor) transistor M2 in the transistor cascade topology structure, and the second end of the blocking capacitor is used as the output end of the output matching circuit to output signals to the outside; the first end of choke inductance L1 is connected with the first end of blocking electric capacity C3, and the second end of blocking electric capacity is connected with the VCC power. The low noise amplifier further comprises an external matching circuit, wherein the external matching circuit comprises a 100pF capacitor connected in series at the input port, a 100pF capacitor connected in series at the output port, an 820nH choke inductor connected in series between the power supply port and the output port, and a capacitor connected with the power supply port in parallel to the ground.

The low-noise amplifier enables the transistor group to realize high gain through a transistor cascade topological structure, and simultaneously utilizes an external matching circuit to reduce the noise coefficient increase of the input and output ports caused by matching so as to realize low noise coefficient.

In the embodiment of the present application, the design of the low noise amplifier chip is completed by using ADS software, and simulation curves of the low noise amplifier chip are shown in the following graph, where fig. 4 is a gain and return loss curve, fig. 5 is a schematic diagram of a noise coefficient curve, fig. 6 is a schematic diagram of a stability curve, and fig. 7 is a schematic diagram of a P-1dB curve. Simulation results show that the frequency band of the low-noise amplifier chip with high gain and low noise coefficient covers 300MHz to 1GHz, the gain is greater than 27dB, and the low noise coefficient is less than 0.6dB.

It should be noted that various changes and modifications can be made by those skilled in the art without departing from the spirit and the essence of the invention, and these changes and modifications should fall within the scope of the appended claims.

Claims

1. An MMIC low noise amplifier, characterized by: the amplifier comprises an input matching circuit, a transistor cascade topological structure, an output matching circuit and a negative feedback circuit, wherein the input matching circuit is used as an output port of the whole amplifier and receives an external input signal; the negative feedback circuit is connected with the transistor cascade topology structure;

2. An MMIC low noise amplifier according to claim 1, characterized in that: the negative feedback circuit comprises a capacitor C2 and a resistor R2, wherein the first end of the capacitor C2 is connected to the grid electrode of the MOS transistor M1, the second end of the capacitor C2 is connected with the first end of the resistor R2, and the second end of the resistor R2 is connected to the drain electrode of the MOS transistor M2.

3. An MMIC low noise amplifier according to claim 2, characterized in that: the input matching circuit comprises a blocking capacitor C1, wherein a first end of the blocking capacitor C1 is used as an input end of the input matching circuit and receives an external input signal; and the second end of the blocking capacitor C1 is used as the output end of the input matching circuit and is connected with the grid electrode of the MOS transistor M1.

4. An MMIC low noise amplifier according to claim 2, characterized in that: the low-noise amplifier further comprises a power supply circuit, the power supply circuit is used for supplying power to the whole low-noise amplifier, the power supply circuit adopts a VCC power supply and a topology power supply, and the topology power supply is connected to a unit port of the transistor cascade topology structure and supplies power to the transistor cascade topology structure.

5. An MMIC low noise amplifier according to claim 4, characterized in that: the output matching circuit comprises a blocking capacitor C3 and a choke inductor L1, wherein the first end of the blocking capacitor C3 is used as the input end of the output matching circuit and is used for being connected with the drain electrode of an MOS (metal oxide semiconductor) transistor M2 in the transistor cascade topology structure, and the second end of the blocking capacitor is used as the output end of the output matching circuit to output signals to the outside; the first end of choke inductance L1 is connected with the first end of blocking electric capacity C3, and the second end of blocking electric capacity is connected with the VCC power.

6. An MMIC low noise amplifier according to claim 1, characterized in that: the low noise amplifier further comprises an external matching circuit, wherein the external matching circuit comprises a 100pF capacitor connected in series at the input port, a 100pF capacitor connected in series at the output port, an 820nH choke inductor connected in series between the power supply port and the output port, and a capacitor connected with the power supply port in parallel to the ground.