CN217740979U - Gold tin bonding pad structure - Google Patents

Gold tin bonding pad structure Download PDF

Info

Publication number
CN217740979U
CN217740979U CN202221331558.4U CN202221331558U CN217740979U CN 217740979 U CN217740979 U CN 217740979U CN 202221331558 U CN202221331558 U CN 202221331558U CN 217740979 U CN217740979 U CN 217740979U
Authority
CN
China
Prior art keywords
gold
tin
pad structure
thickness
pits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202221331558.4U
Other languages
Chinese (zh)
Inventor
徐建卫
汪鹏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Xi'an Photoelectric Technology Co ltd
Original Assignee
Shanghai Xi'an Photoelectric Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Xi'an Photoelectric Technology Co ltd filed Critical Shanghai Xi'an Photoelectric Technology Co ltd
Priority to CN202221331558.4U priority Critical patent/CN217740979U/en
Application granted granted Critical
Publication of CN217740979U publication Critical patent/CN217740979U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

The application discloses gold tin pad structure includes: the device comprises a substrate, wherein a pit is arranged on the substrate, a metal layer connected with an external lead is plated on the inner surface of the pit, and a gold-tin solder layer is further arranged in the pit. The method aims at the gold-tin solder layer with specific thickness, and realizes that the solder with the thickness of tens of microns can form a height difference of only a few microns with the surface to be pasted by adjusting the depth of the pits, and the thickness of the solder is close to that of the gold-tin film within an allowable error. Meanwhile, the pits can limit the gold-tin solder after heating and melting, the gold-tin solder does not diffuse outside the pits, and the gold-tin solder can keep a weldable state for a long time, so that sequential surface mounting and welding of a plurality of chips are facilitated.

Description

Gold tin bonding pad structure
Technical Field
The application belongs to the technical field of photoelectronic devices, and particularly relates to a gold-tin bonding pad structure.
Background
With the large-scale popularization of photoelectric interconversion devices, especially high-power LEDs and high-power lasers based on electroluminescence, the optoelectronic packaging materials and processes are required to be revolutionized. The special requirements in two aspects make the gold-tin alloy AuSn20 a key material of optoelectronic packaging. Firstly, aiming at the requirement of high thermal conductivity of a high-power photoelectric device, the thermal conductivity of AuSn20 is 57W/m.K, and the thermal conductivity is the highest in solder. The requirement of reliability and micro price, the gold content of AuSn20 is 80%, the eutectic point is 280 ℃, and the reliability is optimal. The characteristics lead the gold-tin solder to be widely applied in the fields of high-power LEDs, electric automobiles, optical communication photoelectric devices and the like.
For mounting of a precision semiconductor laser, the thickness of the gold-tin bonding pad is generally 3-5 μm. The method for forming the gold-tin bonding pad comprises a film process, gold-tin prefabricated solder, gold-tin soldering paste dispensing, printing and the like. The film process generally adopts evaporation plating, the thickness control is good, but the waste problem of noble metal exists. The gold-tin solder preform is generally sheet-shaped and has a thickness of 15 μm or more. The gold-tin soldering paste has high viscosity, the shape is dispensed, and the thickness is not well controlled. Particularly, in the mounting of an array chip, gold and tin are required to be kept in a molten state for a long time, and the gold and tin are easy to diffuse.
SUMMERY OF THE UTILITY MODEL
In view of the above-mentioned shortcomings or drawbacks of the prior art, the present application provides a gold-tin pad structure.
In order to solve the technical problem, the application is realized by the following technical scheme:
the application provides a gold tin pad structure, includes: the metal-plated lead-free printed circuit board comprises a substrate, wherein a pit is arranged on the substrate, a metal layer connected with an external lead is plated on the inner surface of the pit, and a gold-tin solder layer is further arranged in the pit.
Optionally, in the foregoing gold-tin solder pad structure, the gold-tin solder layer includes: is formed using gold-tin solder paste.
Optionally, in the foregoing gold-tin solder pad structure, the gold-tin solder layer further includes: and the gold-tin soldering lug is arranged in the pit.
Optionally, in the foregoing gold-tin pad structure, a height of the gold-tin solder layer is higher than a depth of the dimple.
Optionally, in the foregoing gold-tin pad structure, a height of the gold-tin solder layer is lower than a depth of the recess, and an element for a chip is clamped by an edge of the recess.
Optionally, in the foregoing gold-tin pad structure, a depth of the pit is between 5 and 50 μm.
Optionally, the gold-tin pad structure is described above, wherein the substrate is made of silicon, ceramic, gallium arsenide, or glass material.
Optionally, in the foregoing gold-tin pad structure, a thickness of the substrate is between 100 μm and 500 μm.
Optionally, in the gold-tin pad structure, the metal layer is made of titanium, platinum, nickel, gold, copper or aluminum material.
Optionally, in the foregoing gold-tin pad structure, a thickness of the metal layer is between 0.2 μm and 5 μm.
Compared with the prior art, the method has the following technical effects:
according to the gold-tin solder layer with the specific thickness, the height difference of only a few microns between the solder with the thickness of tens of microns and the surface to be pasted can be formed by adjusting the depth of the concave pits, and the gold-tin solder layer is close to the gold-tin solder layer of the film within an allowable error. Meanwhile, the pits can limit the gold-tin solder after heating and melting, and the gold-tin solder does not diffuse out of the pits, so that the gold-tin solder can keep a weldable state for a long time, and the gold-tin solder is beneficial to sequential surface mounting and welding of a plurality of chips.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:
FIG. 1: a cross-sectional view of a gold-tin pad structure of an embodiment of the present application;
FIG. 2 is a schematic diagram: a first cross-sectional view of a gold-tin pad structure according to another embodiment of the present application;
FIG. 3: a second cross-sectional view of a gold-tin pad structure according to another embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without making any creative effort belong to the protection scope of the present application.
As shown in fig. 1 to 3, in one embodiment of the present application, a gold-tin pad structure includes: the device comprises a substrate 1, wherein a pit 2 is arranged on the substrate 1, a metal layer connected with an external lead is plated on the inner surface of the pit 2, and a gold-tin solder layer 3 is further arranged in the pit 2. The present embodiment realizes that the solder with the thickness of tens of micrometers can form a height difference of only a few micrometers with the surface to be mounted by adjusting the depth of the concave pit 2 aiming at the gold-tin solder layer 3 with the specific thickness, and the thickness is close to the thickness of the thin-film gold-tin within the allowable error. Meanwhile, the pits 2 can limit the gold-tin solder after heating and melting, and the gold-tin solder does not diffuse out of the pits 2, so that the soldering state can be kept for a long time, and sequential surface mounting and soldering of a plurality of chips 5 are facilitated.
In the present embodiment, the substrate 1 is made of silicon, ceramic, gallium arsenide, or glass material.
Further preferably, the thickness of the substrate 1 is between 100 and 500 μm; further preferably, the thickness of the substrate 1 is between 150 and 500 μm; further preferably, the thickness of the substrate 1 is between 150 and 450 μm; further preferably, the thickness of the substrate 1 is between 200 and 450 μm; further preferably, the thickness of the substrate 1 is between 200 and 400 μm; further preferably, the thickness of the substrate 1 is between 200 and 350 μm; further preferably, the thickness of the substrate 1 is between 250 and 350 μm; further preferably, the thickness of the substrate 1 is between 250 and 300 μm.
In this embodiment, the metal layer is made of a material of titanium, platinum, nickel, gold, copper, or aluminum, or a combination of at least two of the above materials. Through the arrangement of the metal layer, the connection with an external lead can be realized.
Further preferably, the thickness of the metal layer is between 0.2 and 5 μm; further preferably, the thickness of the metal layer is between 0.5 and 5 μm; further preferably, the thickness of the metal layer is between 0.5 and 4.5 μm; further preferably, the thickness of the metal layer is between 1 and 4.5 μm; further preferably, the thickness of the metal layer is between 1 and 4 μm; further preferably, the thickness of the metal layer is between 1.5 and 4 μm; further preferably, the thickness of the metal layer is between 1.5 and 3.5 μm; further preferably, the thickness of the metal layer is between 3 and 3.5 μm.
In the present embodiment, the au-sn solder layer 3 can be formed by thick au-sn, such as solder sheet, dispensing, printing, etc., to achieve the desired effective thickness control.
Specifically, the gold-tin solder layer 3 includes: the gold-tin solder paste is used for forming, that is, the gold-tin solder layer 3 can be formed by dispensing or printing the gold-tin solder paste.
Alternatively, in this embodiment, the gold-tin solder layer 3 may also be: and the gold-tin soldering lug is arranged in the pit 2.
Further preferably, the gold-tin solder layer 3 is provided at a height higher than the depth of the dimples 2.
Further preferably, the gold-tin solder layer 3 is set to a height lower than the depth of the recess 2, and by the above setting, the element for the patch is clamped by the edge of the recess 2 to play a fixing role.
Wherein, the pits 2 can be circular, oval or square pits, etc.
Further preferably, the depth of the pits 2 is between 5 and 50 μm; further preferably, the depth of the pits 2 is between 5 and 50 μm; further preferably, the depth of the pits 2 is between 10 and 50 μm; further preferably, the depth of the pits 2 is between 10 and 45 μm; further preferably, the depth of the pits 2 is between 15 and 45 μm; further preferably, the depth of the pits 2 is between 15 and 40 μm; further preferably, the depth of the pits 2 is between 20 and 40 μm; further preferably, the depth of the pits 2 is between 20 and 35 μm; further preferably, the depth of the pits 2 is between 25 and 35 μm; further preferably, the depth of the pits 2 is between 25 and 30 μm.
The method of making is described below by way of various examples.
The first embodiment is as follows:
as shown in fig. 1, the present embodiment uses a silicon substrate 1, and pits 2 having a depth of 15 μm and a width of 260 μm are etched for a solder sheet (gold-tin solder layer 3) having a thickness of 20 μm and a laser chip having a length of 250 μm. Firstly, a 1-micron gold layer is evaporated in the pit 2 to realize the electrical connection with the circuit part outside the pit 2. Then, the solder sheet was cut into a size of 250 μm and attached to the concave portion 2. Thus, the solder sheet is only 5 to 6 μm higher than the silicon wafer plane, corresponding to the film thickness, wherein the part higher than the substrate 1 is shown by reference numeral 4.
The second embodiment:
as shown in FIG. 2, a silicon substrate 1 is used to etch a pit 2 having a depth of 30 μm and a width of 260 μm for a laser chip 5 having a length of 250 μm. Firstly, a 1-micron gold layer is evaporated in the pit 2 to realize the electrical connection with the circuit part outside the pit 2. Then, a gold-tin paste with a thickness of 15 to 25 μm is applied in the pits by dispensing or printing to form a gold-tin solder layer 3. After this structure is formed, the laser chip 5 is pressure-welded in the groove. At the same time, the edge of the pit 2 plays the roles of fixing the chip 5 and positioning. The gold-tin solder paste melted under pressure overflows along the edge of the chip 5, resulting in a good wrapping and soldering effect 3b, as shown in fig. 3. The relative height of the chip 5 and the substrate 1 after the welding is finished is in an allowable range, and the mounting precision is not influenced by thick gold tin.
Aiming at a gold-tin solder layer 3 with a specific thickness, the depth of the concave pit 2 is adjusted, so that the solder with the thickness of tens of micrometers can form a height difference of only a few micrometers with a surface to be pasted, and the thickness of the solder is close to the thickness of gold-tin film within an allowable error. Meanwhile, the pits 2 can limit the gold-tin solder after heating and melting, and the gold-tin solder does not diffuse outside the pits 2, so that the gold-tin solder can keep a weldable state for a long time, and sequential surface mounting and welding of a plurality of chips are facilitated. Therefore, the method has good market application prospect.
In the description of the present application, unless expressly stated or limited otherwise, the terms "connected," "connected," and "fixed" are to be construed broadly, e.g., as meaning permanently connected, removably connected, or integral to one another; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or may be connected through the use of two elements or the interaction of two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
In this application, unless expressly stated or limited otherwise, the recitation of a first feature "on" or "under" a second feature may include the recitation of the first and second features being in direct contact, and may also include the recitation of the first and second features not being in direct contact, but being in contact with another feature between them. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. "beneath," "under" and "beneath" a first feature includes the first feature being directly beneath and obliquely beneath the second feature, or simply indicating that the first feature is at a lesser elevation than the second feature.
In the description of the present embodiment, the terms "upper", "lower", "left", "right", and the like are used based on the orientations and positional relationships shown in the drawings only for convenience of description and simplification of operation, and do not indicate or imply that the referred device or element must have a specific orientation, be configured and operated in a specific orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first" and "second" are used only for descriptive purposes and are not intended to have a special meaning.
The above embodiments are merely provided to illustrate the technical solutions of the present application, and are not intended to limit the present application. It should be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the true spirit and scope of the claims which follow.

Claims (8)

1. A gold-tin pad structure, comprising: the device comprises a substrate, a plurality of metal layers and a plurality of lead wires, wherein a pit is arranged on the substrate, a metal layer connected with an external lead is plated on the inner surface of the pit, and a gold-tin solder layer is also arranged in the pit;
the gold-tin solder layer includes: forming by adopting gold-tin soldering paste;
the gold-tin solder layer further includes: and the gold-tin soldering lug is arranged in the pit.
2. The gold-tin pad structure of claim 1, wherein the gold-tin solder layer is disposed at a height greater than a depth of the dimple.
3. The Au-Sn pad structure of claim 1, wherein the Au-Sn solder layer is arranged at a height lower than the depth of the pits, and an element for a chip is clamped by the edges of the pits.
4. A gold-tin pad structure according to any of claims 1 to 3, wherein the depth of the pits is between 5 and 50 μm.
5. The gold-tin pad structure of claim 1, wherein the substrate is made of one of silicon, ceramic, gallium arsenide, or glass material.
6. A gold-tin pad structure according to claim 1 or 2 or 3 or 5, wherein the thickness of the substrate is between 100 and 500 μm.
7. The gold-tin pad structure of claim 1 or 2 or 3 or 5, wherein the metal layer is made of one of titanium, platinum, nickel, gold, copper or aluminum material.
8. A gold-tin pad structure according to claim 1 or 2 or 3 or 5, wherein the thickness of the metal layer is between 0.2 and 5 μm.
CN202221331558.4U 2022-05-18 2022-05-18 Gold tin bonding pad structure Active CN217740979U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221331558.4U CN217740979U (en) 2022-05-18 2022-05-18 Gold tin bonding pad structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221331558.4U CN217740979U (en) 2022-05-18 2022-05-18 Gold tin bonding pad structure

Publications (1)

Publication Number Publication Date
CN217740979U true CN217740979U (en) 2022-11-04

Family

ID=83838642

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202221331558.4U Active CN217740979U (en) 2022-05-18 2022-05-18 Gold tin bonding pad structure

Country Status (1)

Country Link
CN (1) CN217740979U (en)

Similar Documents

Publication Publication Date Title
US20040016456A1 (en) Photovoltaic device and method for producing the same
CN100378921C (en) Method of manufacturing a semiconductor device including electrodes on main and reverse sides of a semiconductor chip
US8865522B2 (en) Method for manufacturing semiconductor devices having a glass substrate
US20140230878A1 (en) Method for electrically connecting several solar cells and photovoltaic module
US20140113111A1 (en) High Heat-Radiant Optical Device Substrate and Manufacturing Method Therof
CN112289753B (en) Manufacturing method of wall dam ceramic substrate for ultraviolet LED packaging and product thereof
CN217740979U (en) Gold tin bonding pad structure
CN213425006U (en) LED packaging structure
CN111933784A (en) Ceramic packaging method of laser chip and ceramic packaging chip structure
CN102208358A (en) Method for soldering flip chip on base plate and packaging apparatus
CN113922205B (en) Substrate, method for forming packaging structure by using substrate and packaging structure
CN111224315A (en) LD red TO laser packaging method of gold-tin process
CN108807352B (en) Novel L ED filament manufacturing method
CN213845830U (en) Heat sink for heat dissipation of high-power semiconductor laser chip and laser with heat sink
CN104183689A (en) Substrate used for LED flip-chip die bonding and method for manufacturing LED by using substrate through die bonding
CN209766404U (en) Demetalization ceramic substrate with capillary micro-groove structure
CN114300437A (en) Frameless semiconductor packaging structure and preparation process thereof
JP4283087B2 (en) Photoelectric conversion element
CN107785470A (en) UV LED auxiliary frames ceramic substrates and its manufacture method
CN203339210U (en) LED eutectic packaging pedestal,
CN217115146U (en) Composite substrate for packaging high-speed laser chip
CN111785822A (en) LED flip chip packaging device and packaging process thereof
CN110885060A (en) Packaging method of MEMS circulator
EP2800130A1 (en) Chip-to-substrate transient liquid phase bonding using a spacer
CN210516747U (en) DPC ceramic composite substrate structure with high thermal conductivity

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant