CN217404886U - Storage card and card reading equipment - Google Patents
Storage card and card reading equipment Download PDFInfo
- Publication number
- CN217404886U CN217404886U CN202221162273.2U CN202221162273U CN217404886U CN 217404886 U CN217404886 U CN 217404886U CN 202221162273 U CN202221162273 U CN 202221162273U CN 217404886 U CN217404886 U CN 217404886U
- Authority
- CN
- China
- Prior art keywords
- data
- contact
- terminal
- contact piece
- electrically connected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Credit Cards Or The Like (AREA)
Abstract
The utility model provides a storage card and card reading equipment, the storage card includes support plate, eMMC control chip, memory chip and packaging body, and eMMC control chip, memory chip and support plate encapsulation are in the packaging body; the eMMC control chip comprises a memory interface and an input/output interface, the memory interface is electrically connected with the memory chip through the carrier plate, and the input/output interface comprises a first data terminal, a second data terminal, a third data terminal, a fourth data terminal, a command terminal, a power signal terminal, a clock signal terminal and a ground signal terminal; the back of the packaging body comprises a conductive contact piece group, and the conductive contact piece group is correspondingly connected with a first data terminal, a second data terminal, a third data terminal, a fourth data terminal, a command terminal, a power signal terminal, a clock signal terminal and a ground signal terminal through a carrier plate. The utility model discloses a storage card had both had the performance of eMMC, and accessible plug mode uses again.
Description
Technical Field
The utility model relates to a storage device field, more specifically say, relate to a storage card and card reading equipment.
Background
The memory is a storage unit for storing programs and various data information. Due to the advantages of small size and stable performance, memory cards are commonly used as independent storage media in mobile phones, digital cameras, portable computers, MP3 and other electronic devices.
Existing memory cards include SD cards, T-Flash cards, eMMC cards, MS PRO cards, PCIe Flash memory cards, and the like, where eMMC (embedded Multi Media card) is a memory card that integrates an eMMC control chip and a Flash memory and provides a standard interface. Because of the advantages of large storage capacity, automatic flash memory management (bad block processing, ECC), fast interface speed (up to 400MBytes per second), scalability, and the like, eMMC is widely used in electronic devices such as mobile phones.
However, the conventional eMMC is packaged in a BGA manner, and is fixed on a PCB by welding when in use, so that the eMMC cannot be freely inserted and removed, which greatly limits the use of the eMMC.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model lies in, to above-mentioned eMMC because of adopting BGA encapsulation mode and leading to its limited problem of use, provide a storage card and card reading equipment.
The technical solution of the present invention for solving the above technical problems is to provide a memory card, which includes a carrier plate, an eMMC control chip, a memory chip, and a package; the eMMC control chip and the memory chip are respectively electrically connected with the carrier plate, and the eMMC control chip, the memory chip and the carrier plate are packaged in the packaging body;
the eMMC control chip comprises a memory interface and an input/output interface, the memory interface is electrically connected with the memory chip through the carrier plate, and the input/output interface comprises a first data terminal, a second data terminal, a third data terminal, a fourth data terminal, a command terminal, a power signal terminal, a clock signal terminal and a ground signal terminal;
the package body comprises a conductive contact group, the conductive contact group comprises a first data contact piece, a second data contact piece, a third data contact piece, a fourth data contact piece, a power signal contact piece, a command contact piece, a clock signal contact piece and a ground signal contact piece which are respectively positioned on the back surface of the package body, the first data contact piece, the second data contact piece, the third data contact piece, the fourth data contact piece, the power signal contact piece, the command contact piece, the clock signal contact piece and the ground signal contact piece are distributed on two opposite edges of the back surface of the package body in two rows, the first data contact piece is electrically connected with a first data terminal through the carrier plate, the second data contact piece is electrically connected with a second data terminal through the carrier plate, the third data contact piece is electrically connected with a third data terminal through the carrier plate, and the fourth data contact piece is electrically connected with a fourth data terminal through the carrier plate, the power signal contact piece is electrically connected with the power signal terminal through the carrier plate, the command contact piece is electrically connected with the command terminal through the carrier plate, the clock signal contact piece is electrically connected with the clock signal terminal through the carrier plate, and the ground signal contact piece is electrically connected with the ground signal terminal through the carrier plate.
As a further improvement of the utility model, the length of packaging body is 8mm, the width of packaging body is 6mm, the thickness of packaging body is 0.85mm, ground signal contact, clock signal contact, fourth data contact and third data contact are arranged in proper order the edge of the length direction's of packaging body first end, order contact, first data contact, second data contact, power signal contact are arranged in proper order the edge of the length direction's of packaging body second end.
As a further improvement of the present invention, the lengths and widths of the first data contact, the second data contact, the third data contact, the fourth data contact, the power signal contact, the command contact, the clock signal contact, and the ground signal contact are all 0.75mm, and the ground signal contact, the clock signal contact, the fourth data contact, and the third data contact are sequentially spaced by 1.27mm in the width direction of the package body; the command contact, the first data contact, the second data contact and the power signal contact are sequentially spaced by 1.27mm in the width direction of the packaging body; the distance between the center of the contact piece located at the edge of the first end of the packaging body in the length direction and the center of the contact piece located at the edge of the second end of the packaging body in the length direction is 7 mm.
As a further improvement of the utility model, first data contact with command terminal electric connection, just eMMC control chip is in first data contact passes through when being first preset level command terminal output is first preset feedback level.
As a further improvement of the present invention, the input/output interface includes a fifth data terminal, a sixth data terminal, a seventh data terminal, and an eighth data terminal;
the conductive contact set comprises a fifth data contact, a sixth data contact, a seventh data contact and an eighth data contact which are respectively positioned on the back surface of the packaging body, the fifth data contact is electrically connected with a fifth data terminal through the carrier plate, the sixth data contact is electrically connected with the sixth data terminal through the carrier plate, the seventh data contact is electrically connected with the seventh data terminal through the carrier plate, and the eighth data contact is electrically connected with the eighth data terminal through the carrier plate.
As a further improvement, be provided with the voltage conversion circuit who converts the first voltage of input into second voltage and output on the support plate, the power signal contact via voltage conversion circuit and power signal terminal electric connection.
As a further improvement of the present invention, the fifth data contact, the sixth data contact, the seventh data contact and the eighth data contact are distributed in a lattice manner with the center of the back of the package body as the center.
As a further improvement, the length and the width of fifth data contact, sixth data contact, seventh data contact, eighth data contact are 0.75mm, just interval between the adjacent contact is more than or equal to 1.27mm in fifth data contact, sixth data contact, seventh data contact, the eighth data contact.
As a further improvement of the utility model, one of fifth data contact, sixth data contact, seventh data contact and the eighth data contact via the support plate with command terminal electric connection, just eMMC control chip passes through when the fifth data contact, sixth data contact, seventh data contact or the eighth data contact that link to each other predetermine the level for the second command terminal output second predetermines the feedback level.
The utility model also provides a card reading equipment, including the cassette, the cassette include with as above the shape of the packaging body of storage card and the slot of size looks adaptation and as above the corresponding cassette terminal group of conductive contact piece group of storage card.
The utility model discloses following beneficial effect has: each terminal of the eMMC control chip in the packaging body is led out through the conductive contact set arranged on the surface of the packaging body, so that the memory card has the performance of the eMMC and can be used in a plugging mode.
Drawings
Fig. 1 is a schematic cross-sectional structure diagram of a memory card provided in an embodiment of the present invention;
fig. 2 is a schematic diagram of an electrical connection structure of a memory card according to an embodiment of the present invention;
fig. 3 is a schematic diagram of the back side of a memory card provided by an embodiment of the present invention;
fig. 4 is a schematic diagram of the back side of a memory card according to another embodiment of the present invention;
fig. 5 is a schematic diagram of power supply connections of the eMMC control chip in the memory card shown in fig. 4.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the invention.
As shown in fig. 1-3, the memory card according to the embodiment of the present invention is a schematic structural diagram, and the memory card can be applied to electronic devices such as a mobile phone, a digital camera, a portable computer, and an MP3, and realizes storage of corresponding data. The memory card of the embodiment includes a carrier 11, an eMMC control chip 12, a memory chip 13, and a package 10, wherein the eMMC control chip 12 and the memory chip 13 are electrically connected to the carrier 11, and the eMMC control chip 12, the memory chip 13, and the carrier 11 are packaged in the package 10. In addition, a plurality of passive components 15, such as resistors and capacitors, may be further packaged in the package body 10, and the passive components 15 are electrically connected to the carrier 11, and form a circuit together with the eMMC control chip 12 and the memory chip 13, so as to implement functions of storage, security, and the like.
The memory chip 13 may be specifically configured as a storage medium 131 such as NAND Flash, and the eMMC control chip 12 is a controller of a memory card, which is used to provide a standard interface and manage memory cells in the memory chip 13. In one embodiment of the present invention, and may be respectively formed of a die (die), the surfaces of which have a plurality of bonding pads, respectively. In practical applications, the eMMC control chip 12 and the memory chip 13 may be packaged together first. The carrier 11 is a lead frame (leadframe) for carrying an eMMC control chip 12, a memory chip 13, and a passive component 15, and is mainly composed of a Substrate (specifically, a hard Substrate, a flexible film Substrate, a co-fired ceramic Substrate, and the like) and a copper foil (the thickness of the copper foil may be 1.5 μm to 18 μm) on the Substrate, and the carrier 11 has a plurality of carrier pads electrically connected to each other through the copper foil. The carrier 11 not only can fix and conduct heat between the eMMC control chip 12, the memory chip 13, and the passive component 15, but also can electrically connect the eMMC control chip 12, the memory chip 13, and the passive component 15. Specifically, the eMMC control chip 12 and the memory chip 13 are bonded to the surface of the carrier 11, and the Bonding pads are electrically connected to the carrier pads through a Wire Bonding (Wire Bonding) process. The eMMC control chip 12, the memory chip 13, and the passive device 15 can implement functions related to the eMMC memory. The structure of the carrier 11, the eMMC control chip 12, and the memory chip 13 and the electrical connection structure thereof are well known in the art and will not be described herein.
The eMMC control chip 12 specifically includes a core logic block 121, a memory interface 122 and an input/output interface 123, where the memory interface 122 is electrically connected to the memory chip 13 through the carrier board 11 and is responsible for data signal transmission or control signal transmission with the memory chip 13 (storage medium 131); the input/output interface 123 is responsible for providing a connection channel with the outside; the core logic block 121 is responsible for controlling the above-mentioned memory interface 122 and input/output interface 123, and implementing functions such as bad block processing, ECC, and the like.
Specifically, the input/output interface 123 includes a first data terminal, a second data terminal, a third data terminal, a fourth data terminal, a command terminal, a power signal terminal, a clock signal terminal, and a ground signal terminal, where the clock signal terminal is used for transmitting a clock signal from an external device, performing synchronization of data transmission and driving of device operation; the command terminal is mainly used for sending a command signal to the core logic block 121 by an external device and sending a corresponding response signal to the external device by the core logic block 121; the first data terminal, the second data terminal, the third data terminal, and the fourth data terminal are mainly used for data transmission between an external device and the core logic block 121; the power signal terminal and the ground signal terminal are used for obtaining a supply voltage from an external device.
Accordingly, the package 10 includes a conductive contact group 14, and the conductive contact group 14 includes a first data contact DAT0, a second data contact DAT1, a third data contact DAT2, a fourth data contact DAT3, a power signal contact VCC, a command contact CMD, a clock signal contact CLK, and a ground signal contact GND, which are respectively located at the rear surface of the package 10, and the first data contact DAT0, the second data contact DAT1, the third data contact DAT2, the fourth data contact DAT3, the power signal contact VCC, the command contact CMD, the clock signal contact CLK, and the ground signal contact GND are distributed in two rows at two opposite edges of the rear surface of the package 10. In the package 10, the first data contact DAT0 is electrically connected to the first data terminal of the eMMC control chip 12 via the carrier 11, the second data contact DAT1 is electrically connected to the second data terminal of the eMMC control chip 12 via the carrier 11, the third data contact DAT2 is electrically connected to the third data terminal of the eMMC control chip 12 via the carrier 11, the fourth data contact DAT3 is electrically connected to the fourth data terminal of the eMMC control chip 12 via the carrier 11, the power signal contact VCC is electrically connected to the power signal terminal of the eMMC control chip 12 via the carrier 11, the command contact CMD is electrically connected to the command terminal of the eMMC control chip 12 via the carrier 11, the clock signal contact CLK is electrically connected to the clock signal terminal of the eMMC control chip 12 via the carrier 11, and the ground signal contact GND is electrically connected to the ground signal terminal of the eMMC control chip 12 via the carrier 11.
The memory card leads out each terminal of the eMMC control chip 12 in the package 10 through the conductive contact group 14 arranged on the surface of the package 10, so that the memory card can work in a 4bit mode of the eMMC, has the performance of the eMMC, and can be used in an inserting and pulling mode.
In an embodiment of the present invention, the size of the package 10 and the position of the conductive contact group 14 on the package 10 are the same as those of the existing SD NAND card, specifically, the length d1 of the package 10 is 8mm, the width d2 of the package 10 is 6mm, the thickness of the package 10 is 0.85mm, the ground signal contact GND, the clock signal contact CLK, the fourth data contact DAT3 and the third data contact DAT2 are sequentially arranged at the edge of the first end of the length direction of the package 10, and the command contact CMD, the first data contact DAT0, the second data contact DAT1 and the power signal contact VCC are sequentially arranged at the edge of the second end of the length direction of the package 10.
Further, it is also possible that the length d3 and the width d4 of the first data pad DAT0, the second data pad DAT1, the third data pad DAT2, the fourth data pad DAT3, the power signal pad VCC, the command pad CMD, the clock signal pad CLK, the ground signal pad GND are all 0.75mm, and the ground signal pad GND, the clock signal pad CLK, the fourth data pad DAT3, and the third data pad DAT2 are sequentially spaced 1.27mm in the width direction of the package 10; the command contact CMD, the first data contact DAT0, the second data contact DAT1, and the power signal contact VCC are sequentially spaced 1.27mm in the width direction of the package 10; the distance d5 between the centers of the contacts at the edge of the package body 10 at the first end in the longitudinal direction and the centers of the contacts at the edge of the package body 10 at the second end in the longitudinal direction is 7 mm.
Through the structure, not only can connection errors caused by too close distance between adjacent contact pieces be avoided, but also the memory card can be compatible with the SD NAND card on the terminal card seat, so that the application of the memory card is more flexible, electronic equipment manufacturers can concentrate on other parts of product development without paying attention to flash memory management, and the time for releasing products to the market is shortened.
Preferably, in the memory card, the first data pad DAT0 is electrically connected to a command terminal of the eMMC control chip 12, and the eMMC control chip 12 outputs a first predetermined feedback level through the command terminal when the first data pad DAT0 is at a first predetermined level (e.g., after the memory card is powered on). In this way, the electronic device using the memory card can determine the type of the memory card, for example, after a main controller (e.g., MCU) of the electronic device is powered on, an inquiry command is sent through the command terminal, the eMMC control chip 12 feeds back corresponding ID information to the main controller of the electronic device through the first data contact DAT0 through the command terminal, and the main controller of the electronic device knows the type of the memory card according to the feedback signal and adopts different modes to transmit data.
Preferably, to improve the performance of the memory card, the input/output interface of the eMMC controller 12 includes a fifth data terminal, a sixth data terminal, a seventh data terminal, and an eighth data terminal; accordingly, the conductive contact group 14 includes a fifth data contact DAT4, a sixth data contact DAT5, a seventh data contact DAT6 and an eighth data contact DAT7 respectively located on the back surface of the package 10, and the fifth data contact DAT4 is electrically connected to the fifth data terminal through the carrier 11, the sixth data contact DAT5 is electrically connected to the sixth data terminal through the carrier 11, the seventh data contact DAT6 is electrically connected to the seventh data terminal through the carrier 11, and the eighth data contact DAT7 is electrically connected to the eighth data terminal through the carrier 11. By the method, the memory card can operate in an 8bit mode of the eMMC.
In view of the difference between the operating voltage of the eMMC control chip 12 operating in the 8bit mode and the operating voltage of the SD NAND, in order to make the memory card suitable for the card socket of the existing SD NAND card, as shown in fig. 4, a voltage conversion circuit 111 is further disposed on the carrier board 11 of the memory, and the power signal contact VCC is electrically connected to the power signal terminal of the MCC control chip 12 through the voltage conversion circuit 111. The voltage conversion circuit 111 may convert a first voltage (e.g., 3.3V) input from the power signal contact VCC to a second voltage (e.g., 1.8V) and output the second voltage to a corresponding portion of the eMMC control chip 12 (the power signal contact VCC may also output the first voltage to another portion of the eMMC control chip 12). Of course, in practical applications, the voltage conversion circuit 111 may be integrated into the eMMC control chip 12.
As shown in fig. 5, the fifth data pads DAT4, the sixth data pads DAT5, the seventh data pads DAT6 and the eighth data pads DAT7 are arranged in a dot matrix around the center of the rear surface of the package 10. Also, the lengths and widths of the fifth data pad DAT4, the sixth data pad DAT5, the seventh data pad DAT6 and the eighth data pad DAT7 are all 0.75mm, and the interval between adjacent ones of the fifth data pad DAT4, the sixth data pad DAT5, the seventh data pad DAT6 and the eighth data pad DAT7 is greater than or equal to 1.27 mm. Through the structure, the connection error caused by too close distance between the adjacent contact pieces can be avoided.
Specifically, one of the fifth data pad DAT4, the sixth data pad DAT5, the seventh data pad DAT6 and the eighth data pad DAT7 is electrically connected to a command terminal of the eMMC control chip 12 via the interposer 11, and the eMMC control chip 12 outputs a second preset feedback level through the command terminal when the connected fifth data pad DAT4, sixth data pad DAT5, seventh data pad DAT6 or eighth data pad DAT7 is at a second preset level. By the method, the electronic equipment using the memory card can know the operable mode of the memory card, so that the maximum performance of the memory card can be exerted.
The utility model also provides a card reading equipment, including the cassette, the cassette include with as above the shape of the packaging body of storage card and the slot of size looks adaptation and as above the corresponding cassette terminal group of conductive contact piece group of storage card.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention should be covered by the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A memory card is characterized by comprising a carrier plate, an eMMC control chip, a memory chip and a packaging body; the eMMC control chip and the memory chip are respectively electrically connected with the carrier plate, and the eMMC control chip, the memory chip and the carrier plate are packaged in the packaging body;
the eMMC control chip comprises a memory interface and an input/output interface, the memory interface is electrically connected with the memory chip through the carrier plate, and the input/output interface comprises a first data terminal, a second data terminal, a third data terminal, a fourth data terminal, a command terminal, a power signal terminal, a clock signal terminal and a ground signal terminal;
the package body comprises a conductive contact group, the conductive contact group comprises a first data contact piece, a second data contact piece, a third data contact piece, a fourth data contact piece, a power signal contact piece, a command contact piece, a clock signal contact piece and a ground signal contact piece which are respectively positioned on the back surface of the package body, the first data contact piece, the second data contact piece, the third data contact piece, the fourth data contact piece, the power signal contact piece, the command contact piece, the clock signal contact piece and the ground signal contact piece are distributed on two opposite edges of the back surface of the package body in two rows, the first data contact piece is electrically connected with a first data terminal through the carrier plate, the second data contact piece is electrically connected with a second data terminal through the carrier plate, the third data contact piece is electrically connected with a third data terminal through the carrier plate, and the fourth data contact piece is electrically connected with a fourth data terminal through the carrier plate, the power signal contact piece is electrically connected with the power signal terminal through the carrier plate, the command contact piece is electrically connected with the command terminal through the carrier plate, the clock signal contact piece is electrically connected with the clock signal terminal through the carrier plate, and the ground signal contact piece is electrically connected with the ground signal terminal through the carrier plate.
2. The memory card of claim 1, wherein the package has a length of 8mm, a width of 6mm, and a thickness of 0.85mm, the ground signal pads, the clock signal pads, the fourth data pads, and the third data pads are arranged in this order at an edge of a first end of the package in a length direction, and the command pads, the first data pads, the second data pads, and the power signal pads are arranged in this order at an edge of a second end of the package in the length direction.
3. The memory card of claim 2, wherein the first data contact, the second data contact, the third data contact, the fourth data contact, the power signal contact, the command contact, the clock signal contact, and the ground signal contact are each 0.75mm in length and width, and the ground signal contact, the clock signal contact, the fourth data contact, and the third data contact are sequentially spaced 1.27mm in width of the package; the command contact, the first data contact, the second data contact and the power signal contact are sequentially spaced by 1.27mm in the width direction of the packaging body; the distance between the center of the contact piece located at the edge of the first end of the packaging body in the length direction and the center of the contact piece located at the edge of the second end of the packaging body in the length direction is 7 mm.
4. The memory card of claim 1, wherein the first data contact is electrically connected to the command terminal, and wherein the eMMC control chip outputs a first predetermined feedback level through the command terminal when the first data contact is at a first predetermined level.
5. The memory card according to any one of claims 1 to 4, wherein the input-output interface includes a fifth data terminal, a sixth data terminal, a seventh data terminal, and an eighth data terminal;
the conductive contact set comprises a fifth data contact, a sixth data contact, a seventh data contact and an eighth data contact which are respectively positioned on the back surface of the packaging body, the fifth data contact is electrically connected with a fifth data terminal through the carrier plate, the sixth data contact is electrically connected with the sixth data terminal through the carrier plate, the seventh data contact is electrically connected with a seventh data terminal through the carrier plate, and the eighth data contact is electrically connected with the eighth data terminal through the carrier plate.
6. The memory card of claim 5, wherein the carrier board has a voltage conversion circuit for converting an input first voltage into a second voltage and outputting the second voltage, and the power signal contacts are electrically connected to the power signal terminals through the voltage conversion circuit.
7. The memory card of claim 6, wherein the fifth data contact, the sixth data contact, the seventh data contact, and the eighth data contact are arranged in a dot matrix centered on a center of the back surface of the package.
8. The memory card of claim 6, wherein said fifth, sixth, seventh, and eighth data pads are each 0.75mm in length and width, and wherein the spacing between adjacent ones of said fifth, sixth, seventh, and eighth data pads is greater than or equal to 1.27 mm.
9. The memory card of claim 6, wherein one of the fifth, sixth, seventh and eighth data pads is electrically connected to the command terminal via the interposer, and the eMMC control chip outputs a second predetermined feedback level through the command terminal when the associated fifth, sixth, seventh or eighth data pad is at a second predetermined level.
10. A card reading device, characterized by comprising a card socket including a slot adapted to the shape and size of the package of the memory card of any one of claims 1 to 9 and a socket terminal set corresponding to the conductive contact set of the memory card of any one of claims 1 to 9.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202221162273.2U CN217404886U (en) | 2022-05-13 | 2022-05-13 | Storage card and card reading equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202221162273.2U CN217404886U (en) | 2022-05-13 | 2022-05-13 | Storage card and card reading equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
CN217404886U true CN217404886U (en) | 2022-09-09 |
Family
ID=83143580
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202221162273.2U Active CN217404886U (en) | 2022-05-13 | 2022-05-13 | Storage card and card reading equipment |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN217404886U (en) |
-
2022
- 2022-05-13 CN CN202221162273.2U patent/CN217404886U/en active Active
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20060118641A1 (en) | Semiconductor device and method of manufacturing the same | |
TWI408799B (en) | Storage apparatus and manufacture method thereof | |
KR20140121180A (en) | Semiconductor package having heat spreader and method of forming the same | |
JP2014120163A (en) | Memory card | |
KR20160025945A (en) | Semiconductor package embedding electronic component | |
TWM343230U (en) | Space minimized flash drive | |
US10320105B2 (en) | Printed circuit boards and solid state drives including the same | |
CN217404886U (en) | Storage card and card reading equipment | |
CN217404885U (en) | Memory card | |
CN217589597U (en) | Memory card | |
US20090294792A1 (en) | Card type memory package | |
CN218333132U (en) | Storage device | |
KR100789893B1 (en) | Memory Card and Memory Device Employed in Such a Card | |
KR101080386B1 (en) | USB memory device having solar charging function | |
CN102347063B (en) | Storage device and method for producing same | |
KR101118236B1 (en) | Cob-type portable memory device adapted for superspeed usb protocol | |
TW201101459A (en) | Memory device with integrally combining a USB plug | |
CN215643699U (en) | Storage module and storage device | |
CN216253367U (en) | Connecting device | |
JPH11288449A (en) | Ic module, ic card and method for resin encapsulation | |
CN216852530U (en) | Smart card fingerprint module and carrier band packaging form thereof | |
CN217214707U (en) | DDR3 micro-component | |
CN117479550B (en) | Chip packaging structure and manufacturing method thereof | |
CN211792256U (en) | Electronic device | |
KR100919218B1 (en) | Cob-type chip package built-in led for a memory card, and manufacturing method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |