CN215643699U - Storage module and storage device - Google Patents

Abstract

The application discloses storage module and storage device, storage module includes: the substrate is provided with an M.2 interface part and a packaging part; a package body disposed on the package portion; and the crystal grain is welded on the substrate and is electrically connected with the substrate, and the crystal grain is packaged on the packaging part by the packaging body. The memory module of the embodiment of the application has smaller size than that of the memory module with the existing structure, and has better compatibility and faster signal transmission speed.

Description

Storage module and storage device

Technical Field

The present application relates to the field of memory technologies, and in particular, to a memory module and a memory device.

Background

In the conventional Solid State Drive (SSD), a control chip and a memory chip are soldered on a substrate, and then the entire module is packaged by a housing.

With the increasing capacity of hard disks, manufacturers generally increase the capacity of a single flash memory chip or arrange more flash memory chips on a substrate to meet the requirement of a large-capacity hard disk, which leads to the increasing size of the hard disk and conflicts with the requirement of miniaturization of devices.

SUMMERY OF THE UTILITY MODEL

In view of this, the present application provides a storage module and a storage device to solve the problem of a large size of the conventional large-capacity solid state disk.

An embodiment of the present application provides a memory module, including: the substrate is provided with an M.2 interface part and a packaging part; a package body disposed on the package portion; and the crystal grain is welded on the substrate and is electrically connected with the substrate, and the crystal grain is packaged on the packaging part by the packaging body.

Optionally, the die includes a control die and a storage die.

Optionally, the memory module further includes a control chip, and the control chip is disposed in the encapsulation portion and electrically connected to the substrate; the die includes a memory die.

Optionally, the memory dies include at least one first memory die and at least one second memory die; the first memory crystal grain is arranged in the packaging part; the second memory dies are disposed on the first memory dies, and the number of second memory dies disposed on each of the first memory dies is greater than or equal to 0.

Optionally, the control chip is located outside the package body.

Optionally, the encapsulation portion includes a first surface and a second surface that are oppositely disposed; the first surface and the second surface are respectively provided with at least one crystal grain; the packaging body comprises a first packaging body and a second packaging body, wherein the first packaging body is located on the first surface, and the second packaging body is located on the second surface.

Optionally, the substrate is further provided with a mounting portion; the mounting part and the M.2 interface part are respectively positioned at two opposite ends of the packaging part.

Optionally, a through groove is formed in one side of the mounting portion, which is far away from the packaging portion, and used for mounting and fixing the storage module.

Optionally, the m.2 interface part includes a first separation groove and a second separation groove, where the first separation groove and the second separation groove separate the m.2 interface part into a first contact area, a second contact area, and a third contact area, and the second contact area is located between the first contact area and the third contact area; the first contact area, the second contact area and the third contact area are compatible with two interface types of Socket 2 and Socket 3.

Optionally, the package body is made of plastic or ceramic material.

Optionally, the memory module further includes a passive element, and the passive element is disposed in the encapsulation portion and encapsulated between the substrate and the encapsulation body by the encapsulation body.

Optionally, the width of the storage module is 22mm, and the length of the storage module ranges from 28.4mm to 110 mm.

A memory device comprising a memory module as described in any of the above embodiments.

In the memory module of the embodiment of the application, the crystal grain is directly arranged on the packaging part, and the packaging body is adopted to package the crystal grain. The size of the memory module of the embodiment can be smaller than that of the memory module with the existing structure when the memory module with the same capacity is manufactured, and the memory module of the embodiment is provided with an M.2 interface, so that the memory module has better compatibility and higher signal transmission speed to match the data transmission requirement of the large-capacity memory module.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic perspective view of a memory module according to an embodiment of the present application;

FIG. 2 is a cross-sectional view taken along line A-A of FIG. 1;

FIG. 3 is a cross-sectional view of a memory module shown in another embodiment of the present application;

FIG. 4 is a cross-sectional view of a memory module shown in yet another embodiment of the present application;

FIG. 5 is a cross-sectional view of a memory module shown in yet another embodiment of the present application;

fig. 6 is a schematic perspective view of a memory module according to an embodiment of the present application;

FIG. 7 is a cross-sectional view taken along line B-B of FIG. 6;

FIG. 8 is a cross-sectional view of a memory module with components on both sides of a substrate according to one embodiment of the present application;

fig. 9 is a cross-sectional view of a memory module having components disposed on both sides of a substrate according to another embodiment of the present application.

Fig. 10 is a schematic structural diagram of an m.2 interface according to an embodiment of the present application;

fig. 11 illustrates pin definitions when an m.2 interface is defined as an interface of a SATA channel according to an embodiment of the present application;

fig. 12 is a pin definition when the m.2 interface is defined as an interface of a PCI-E channel according to an embodiment of the present application.

Detailed Description

The technical solutions of the present application are described below clearly and completely by way of examples, and it is obvious that the described examples are only a part of the examples of the present application, and not all of the examples. The following embodiments and their technical features may be combined with each other without conflict.

The size of the existing solid state disk is also increased along with the continuous increase of the capacity of the hard disk, and the requirement of miniaturization of devices is not met. The embodiment of the application provides a memory module 100, a schematic perspective structure of which is shown in fig. 1, and a cross-sectional view along a line of fig. 1A-a is shown in fig. 2, including a substrate 1, a die 2, and a package 3.

The substrate 1 may be a hard board such as a PCB board or a ceramic board. The substrate 1 is provided with an M.2 interface unit 11 and a sealing unit 12. It should be noted that the m.2 interface is an interface specification that is introduced by Intel and replaces MSATA, and not only has wide interface compatibility, but also has the advantages of fast signal transmission speed and small size. The die 2 is soldered on the substrate 1 and electrically connected to the substrate 1. It should be noted that the die 2 is a bare chip in which a wafer is cut into single pieces but not packaged, and the size of the die is greatly reduced compared with that of a packaged chip, so that the area occupied by the chip can be reduced, and it can be understood that the die 2 and the substrate 1 are electrically connected to form a circuit board module with a storage function. The package 3 is disposed on the package portion 12, and packages the die 2 on the package portion 12 of the substrate 1, so as to protect the entire electrical connection of the memory module 100, and the package 3 may be an insulating member such as a plastic member or a ceramic member.

In the memory module 100 of the embodiment of the application, the die 2 is directly disposed on the encapsulation portion 12, and the encapsulation body 3 is adopted to encapsulate the die 2. Since the die 2 has a smaller size than a chip, more dies can be disposed on the substrate 1 with the same area, so that when a memory module with the same capacity is manufactured, the size of the memory module 100 of the embodiment can be smaller than that of a memory module with an existing structure, and the memory module 100 of the embodiment has an m.2 interface, has better compatibility and a faster signal transmission speed, and meets the data transmission requirement of a large-capacity memory module.

In one embodiment, referring to fig. 2, in the memory module 100, the die 2 may include a control die 21 and a memory die 22, and the die 2 may be electrically connected to the substrate 1 through a bonding wire, which may be a conductor such as a gold bonding wire or a silver bonding wire, and electrically connect the die 2 and a pad of the substrate. In one embodiment, the memory module 100 may further include a passive element 4, and the passive element 4 may include, but is not limited to, a resistor, a capacitor, or an inductor. The control die 21, the memory die 22 and the passive component 4 are all encapsulated between the substrate 1 and the encapsulation 3. In one embodiment, the package 3 may be an insulating layer formed by encapsulating the die 2 with a plastic material or a ceramic material, and the electronic component may be encapsulated on the package portion 12 without a gap by using an epoxy resin, for example. In the structure, the control crystal grain 21, the storage crystal grain 22 and the passive element 4 are packaged on the substrate 1 without gaps, so that an integrated packaging structure is formed, and the reliability is better.

In one embodiment, referring to fig. 1 and 2, the substrate 1 may further be provided with a mounting portion 13; the mounting portion 13 and the m.2 interface portion 11 are located at opposite ends of the enclosure portion 12, respectively. The m.2 interface part 11, the encapsulation part 12 and the mounting part 13 may be an integrated structure, wherein the encapsulation 3 is located on the encapsulation part 12, and the m.2 interface part 11 and the mounting part 13 extend beyond the encapsulation 3. In one embodiment, a through slot 131 is disposed on a side of the mounting portion 13 away from the packaging portion 12 for mounting and fixing the memory module 100. For example, through slot 131 may be a semi-circular slot and may be centrally located along an edge of enclosure 12, and when memory module 100 is mounted on an external host, a screw passes through slot 131, may secure memory module 100, or may constrain one direction of movement of memory module 100. Of course, the sealing part can be connected with the sealing part by adopting structures such as buckles or pins, and the like, and is not limited to a screw connection mode.

It should be noted that in some embodiments, the mounting portion 13 may not be provided, as shown in fig. 3, and the memory module 100 may be mounted or fixed by gluing or other methods. In the memory module 100 of the embodiment, the mounting portion 13 is eliminated, so that the effective area of the substrate 1 is increased, more components can be arranged on the substrate 1, and the memory module 100 has a larger capacity, or has a smaller size with the same capacity, or further reduces the external size of the memory module 100.

In one embodiment, referring to fig. 4, the memory module 100 includes a substrate 1, a memory die 22, a package 3, a passive component 4, and a control chip 5. The memory die 22 and the passive component 4 are packaged in the packaging portion 12 of the substrate 1 through the package 3. The control chip 5 may be located on the same side of the package 12 as the memory die 22, or may be located on the other side of the package 12, and in some embodiments, the control chip 5 may be located outside the package 3 for subsequent testing or maintenance operations. In one embodiment, the control chip 5 and the substrate 1 are electrically connected by contact soldering. Compared with the structure shown in the embodiment of fig. 3, the memory module 100 of the present embodiment is different in that the die 2 only includes the memory die 22, the control die 21 can be replaced by the control chip 5, and the control chip 5 is located outside the package 3, it should be noted that the control chip 5 is obtained by packaging the control die.

The memory module 100 of this embodiment can arrange corresponding components and parts according to the actual size restriction, and the structure sets up more in a flexible way to control chip 5 can be located outside packaging body 3, makes things convenient for follow-up test or maintenance operation.

In one embodiment, referring to fig. 5, in the memory module 100, the memory dies 22 may include at least one first memory die 22A and at least one second memory die 22B. The first memory die 22A is disposed on the package portion 12; the second memory dies 22B are disposed on the first memory dies 22A, and the number of second memory dies disposed on each of the first memory dies 22A is greater than or equal to 0. It is understood that the first memory die 22A and the second memory die 22B are distinguished according to their placement on the memory module 100. The first memory die 22A and the second memory die 22B may be the same or different in size, capacity specifications, and the like. The package portion 12 may have 1 or more than 1 first memory die 22A, and each first memory die 22A may have 0, 1 or 2 or more second memory dies 22B stacked thereon. In one embodiment, each memory die 2 is electrically connected to the substrate 1 by bonding wires, and adjacent memory dies 2 are connected by bonding wires. Compared to the structure shown in the embodiment of fig. 2, the memory module 100 of the present embodiment is different in that the memory dies 22 include a first memory die 22A and a second memory die 22B.

In this embodiment, by stacking the memory dies 22 (the second memory dies 22B are disposed on the first memory dies 22A), the number of memory dies 22 can be greatly increased on the substrate 1 with a predetermined area, and the capacity of the memory module 100 can be greatly increased without increasing the size of the substrate 1.

In one embodiment, a schematic perspective view of a memory module 100 is shown in fig. 6, and a cross-sectional view taken along a line of fig. 6B-B is shown in fig. 7, where the memory module 100 includes a substrate 1, a die 2, and a package 3, the substrate 1 includes an m.2 interface portion 11, a package portion 12, and a mounting portion 13, the package portion 12 includes a first surface 121 and a second surface 122 that are oppositely disposed, and the first surface 121 and the second surface 122 are respectively provided with at least one die 2. In the illustrated structure, the first surface 121 is provided with one control die 21 and one storage die 22, and the second surface 122 is provided with two storage dies 22. The package 3 includes a first package 31 and a second package 32, the first package 31 is disposed on the first surface 121 and encapsulates the passive component 4, one control die 21 and one memory die 22, and the second package 32 is disposed on the second surface 122 and encapsulates two memory dies 22. Compared with the structure shown in the embodiment of fig. 2, the memory module 100 of the present embodiment is different in that 1 or more than 1 memory die 22 can be disposed on the other surface of the packaging part 12, and the second packaging body 32 is disposed to package the memory die 22 on the other surface.

In this embodiment, by disposing elements on both sides of the package portion 12, and disposing the first package 31 and the second package 32 on both sides for integrated double-sided packaging, the number of elements such as the memory dies 22 can be greatly increased, the number of the memory dies 22 can be greatly increased on the substrate 1 with a predetermined area, and the capacity of the memory module 100 can be greatly increased without increasing the size of the substrate 1.

In one embodiment, referring to fig. 8, the memory module 100 of the present embodiment is different from the structure shown in the embodiment of fig. 7 in that the mounting portion 13 of the substrate 1 is eliminated, so that the memory module 100 can be further reduced in size.

In one embodiment, referring to fig. 9, compared to the structure shown in the embodiment of fig. 8, the memory module 100 of the present embodiment is different in that the die 2 includes only the memory die 22, the control die 21 can be replaced by the control chip 5, and the control chip 5 is located outside the package 3. The memory module 100 of this embodiment can arrange corresponding components and parts according to the actual size restriction, and the structure sets up more in a flexible way to control chip 5 can be located outside packaging body 3, makes things convenient for follow-up test or maintenance operation.

In one embodiment, referring to fig. 1 and 6, the m.2 interface portion 11 includes a first bay 111 and a second bay 112, the first bay 111 and the second bay 112 dividing the m.2 interface portion 11 into a first contact zone 113, a second contact zone 114, and a third contact zone 115, the second contact zone 114 being located between the first contact zone 113 and the third contact zone 115. It is understood that the first contact area 113, the second contact area 114 and the third contact area 115 each include a plurality of metal contacts, and the metal contacts may be electrically connected to the control chip 5 or the control die 2 by using a circuit in the substrate 1. The first contact area, the second contact area and the third contact area are compatible with two interface types of Socket 2 and Socket 3, wherein Socket 2 corresponds to a B key and is defined as an SSD module of an interface of an SATA channel, and Socket 3 corresponds to an M key and is defined as an SSD module comprising an interface with 4 PCI-E channels; in the storage module 100 of the present embodiment, the m.2 interface 11 has both the first slot 111 and the second slot 112, and the SSD module, which corresponds to the B & M key and can be defined as an interface of the PCI-Ex2 or the SATA channel according to the actual situation, has better interface compatibility.

As an example, fig. 10 is an m.2 interface sequence of a B & M key according to an embodiment of the present application, where pin (contact) definition of the m.2 interface is defined as an interface of a SATA channel as shown in fig. 11, and pin (contact) definition of the m.2 interface is defined as an interface of a PCI-Ex2 channel as shown in fig. 12.

In one embodiment, referring to fig. 6, the memory module may have a width dimension of 22mm and a length dimension L of any value in the range of 28.4mm to 110mm, depending on conventional dimensions, i.e., the memory device may have a distance from the outer edge of the m.2 interface portion to the outer edge of the mounting portion in the range of 28.4mm to 110 mm. In a specific implementation, when the substrate of the memory device does not include the mounting portion, the length L3 of the memory device may be 28.4mm at the shortest and 108.4mm at the longest. And when the base plate does not include a mounting portion, but the base plate protrudes beyond the storage device, the length L2 of the storage device may be slightly longer than 28.4mm, or slightly longer than 108.4mm, for example, 28.5mm or 108.5 mm. When the substrate of the memory device has the mounting portion, the length L1 of the memory device may be 30mm at the shortest and 110mm at the longest. In summary, in the embodiment, the width of the storage device is 22mm, and the length of the storage device can be any value between 28.4mm and 110 mm. For example, the memory module may have a width of 22mm and a length of one of 30mm, 42mm, 60mm, 80mm, and 110 mm.

An embodiment of the present application further provides a storage device, including the storage module 100 according to any of the above embodiments. For example, the storage device may be a solid state disk, and the storage module 100 of any of the foregoing embodiments may be packaged with a housing. In the memory device according to the embodiment of the present application, the die 2 is directly disposed on the package portion 12 of the substrate 1, and the package 3 is used to package the die 2. Since the die 2 has a smaller size than a chip, more dies can be disposed on the substrate 1 with the same area, so that when a memory device with the same capacity is manufactured, the size of the memory device of the embodiment can be smaller than that of a memory device with an existing structure, and the m.2 interface has better compatibility and faster signal transmission speed.

The size of the existing m.2 interface solid state disk generally has the specifications of 22 × 30, 22 × 42, 22 × 60, 22 × 80, 22 × 110 (unit: mm), etc., and in order to meet the requirements of the existing installation structure, the storage device in the embodiment of the present application preferably has the size of 22 × 30, and can correspond to the above existing solid state disks with different specifications.

The above description is only for the embodiments of the present application, and not intended to limit the scope of the present application, and all equivalent structures made by using the contents of the specification and the drawings of the present application, such as the combination of technical features between the embodiments, or the direct or indirect application to other related technical fields, are also included in the scope of the present application.

Claims (13)

1. A memory module, comprising:

the substrate is provided with an M.2 interface part and a packaging part;

a package body disposed on the package portion;

and the crystal grain is welded on the substrate and is electrically connected with the substrate, and the crystal grain is packaged on the packaging part by the packaging body.

2. The memory module of claim 1, wherein the die comprises a control die and a memory die.

3. The memory module of claim 1, further comprising a control chip disposed in the encapsulation and electrically connected to the substrate;

the die includes a memory die.

4. The memory module of claim 2, wherein the memory die comprises at least one first memory die and at least one second memory die;

the first memory crystal grain is arranged in the packaging part;

the second memory dies are disposed on the first memory dies, and the number of second memory dies disposed on each of the first memory dies is greater than or equal to 0.

5. The memory module of claim 3, wherein the control chip is located outside the package.

6. The memory module of claim 1, wherein the encapsulation includes first and second oppositely disposed surfaces;

the first surface and the second surface are respectively provided with at least one crystal grain;

the packaging body comprises a first packaging body and a second packaging body, wherein the first packaging body is located on the first surface, and the second packaging body is located on the second surface.

7. The memory module of claim 1, wherein the substrate further comprises a mounting portion;

the mounting part and the M.2 interface part are respectively positioned at two opposite ends of the packaging part.

8. The memory module of claim 7, wherein a through slot is formed on a side of the mounting portion away from the enclosure portion for mounting and fixing the memory module.

9. The memory module of claim 1, wherein the m.2 interface portion includes a first bay and a second bay, the first bay and the second bay dividing the m.2 interface portion into a first contact zone, a second contact zone, and a third contact zone, the second contact zone being located between the first contact zone and the third contact zone;

the first contact area, the second contact area and the third contact area are compatible with two interface types of Socket 2 and Socket 3.

10. The memory module of claim 1, wherein the package body is made of plastic or ceramic material.

11. The memory module of claim 1, further comprising a passive component disposed in the encapsulation portion and encapsulated between the substrate and the encapsulation by the encapsulation.

12. The memory module according to any one of claims 1 to 11, wherein the memory module has a width of 22mm and a length in the range of 28.4mm to 110 mm.

13. A memory device comprising a memory module according to any one of claims 1 to 12.

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