TW201101459A - Memory device with integrally combining a USB plug - Google Patents

Memory device with integrally combining a USB plug Download PDF

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Publication number
TW201101459A
TW201101459A TW098120735A TW98120735A TW201101459A TW 201101459 A TW201101459 A TW 201101459A TW 098120735 A TW098120735 A TW 098120735A TW 98120735 A TW98120735 A TW 98120735A TW 201101459 A TW201101459 A TW 201101459A
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TW
Taiwan
Prior art keywords
substrate
memory device
integrated
bus bar
plug
Prior art date
Application number
TW098120735A
Other languages
Chinese (zh)
Inventor
Hong-Chi Yu
Original Assignee
Walton Advanced Eng Inc
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Publication date
Application filed by Walton Advanced Eng Inc filed Critical Walton Advanced Eng Inc
Priority to TW098120735A priority Critical patent/TW201101459A/en
Publication of TW201101459A publication Critical patent/TW201101459A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

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Abstract

Disclosed is a memory device with integrally combining a USB plug, comprising at least a memory chip, a controller chip, a LED component, a plurality of contact fingers and an encapsulant. The memory chip, the controller chip and the LED component are disposed on an encapsulated surface of the substrate where the LED component is located adjacent a tail side or lateral of the substrate. The contact fingers are disposed on an exposed surface of the substrate toward a plug-in side. The encapsulant is completely formed over the encapsulated surface of the substrate to simultaneously encapsulate the memory chip, the controller chip and the LED component so that the encapsulant can be used as a main body of the USB plug. Accordingly, the memory device has the benefits of effectively and integrally combining the USB plug and a light-indicating function to show reading and saving in a tiny structure.

Description

201101459 六、發明說明: _ 【發明所屬之技術領域】 本發明係有關於電傳導的連接,特別係有關於一種一 體化整合通用串列匯流排插頭之記憶體裝置。 【先前技術】 按,由於電腦科技的飛快發展,電腦已被人們大量的 運用在生活中,然電腦内之電子檔案需利用記憶體進行 存檔、備份或紀錄,以方便人們攜帶及使用,但舊式之 1.5吋磁片、光碟等記憶體產品常出現容量不足,且具有 攜帶、保存及使用上較不方便、易毀損之缺點,故廠商 便研發出了通用串列匯流排記憶體裝置(通常又可稱之 為USB隨身碟),利用其所設通用串列匯流排(Universal Series Bus,USB)規格插頭之熱插拔(Hot Plug)功能,即 可將通用争列匯流排記憶體裝置快速插設於電腦進行資 料存取,並且具有較大之儲存容量,進而提昇了消費者 〇 使用上之便利性。 然而,習知串列匯流排記憶體裝置的製作方法組裝複 雜並且體積仍過大。首先,至少一記憶體封裝構造以表 面黏著(SMT)技術設置在一模組基板上,並焊上一串列 匯流排插頭於該模組基板之一端。習知串列匯流排插頭 係在一塑膠體上設有複數個接觸指並以一金屬殼包覆。 另以一塑膠外殼包覆該模組基板,以製成具有完整記憶 體功能之裝置。 如我國新型專利證書號數M29 1052號所揭示技術, 3 201101459 • 在另一習知的串列匯流排記憶體裝置中,可使模組基板 - 整合接觸指,以節省一次的焊接作業。請參閱第1圖所 示,習知通用串列匯流排記憶體裝置丨〇〇係包含一模組 基板110、複數個接觸指12〇、至少一記憶體封裝構造 130、一塑膠殼體140、_ USB金屬殼15〇以及一後蓋 1 60。該模組基板1丨〇係具有一上表面丨丨卜一插接側^ ^ 2 以及一相對之尾側1丨3。該些接觸指丨2〇係設置於該模 組基板U0之該上表面111並鄰近該插接側112,而該 "己憶體封裝構造130與一發光二極體114亦設置在該模 組基板110之該上表面lu。該塑膠殼體14〇係用以固 定該模組基板110於其内並作為防塵之用,其中該塑膠 殼體140係必須要有一可裝配於該USB金屬殼15〇内之 延伸端14卜而該些接觸指ι2〇係外露於該延伸端141, 以支撐該些接觸指12〇。該USB金屬殼15〇係包覆該塑 膠殼體140之該延伸端141與該模組基板11〇設有該些 〇 接觸指120之部位,以構成一 USB插頭,方可插接至一 電腦的USB插槽,以讀取/儲存資料。該後蓋16〇係結 合於該塑膠般體140之後端(即該模組基板11〇之該尾側 113)’以防止該模組基板110由該塑膠殼體丨4〇之後端 脫出。然而,這種組合方式為緊配合或黏著關係,該模 組基板110容易有鬆動與變形的問題,並且該發光二極 體易於碰傷。此外,當產品在重覆使用的插拔過程, 該模組基板110在設有該些接觸指12〇之一侧會有持續 磨擦與壓迫的使用狀況,故該塑膠殼體14〇之支撐與該 201101459 USB金屬殼丄5。之包覆為不可或缺,導致該通用串列匯 流排記憶體裝置1〇〇之體積與厚度無法有效縮小。並 且,該通用串列匯流排記憶體裝置1〇〇需經過多次表面 黏著的加工與外殼組裝作業。 【發明内容】 為了解決上述之問題,本發明之主要目的係在於提供 一種一體化整合通用串列匯流排插頭之記憶體裝置,利 ◎ 用一封膠體的形成方式同時密封記憶體晶片、控制器晶 片與LED元件並作為USB插頭之主體,達到一體化整 合通用串列匯流排插頭之功效。 本發明之次一目的係在於提供一種一體化整合通用 串列匯流排插頭之記憶體裝置,在封膠體的結構支撐下 使得設有接觸指之基板更耐插拔,並且封膠體完整形成 於基板封膠表面,以密封多種晶片,有效運用基板空間。 本發明之再一目的係在於提供一種一體化整合通用 〇 串列匯流排插頭之記憶體裝置,能以封膠體與基板之形 成關係達到體化整合通用串列匯流排插頭,不需要習 知的插頭焊接步驟,亦不需要習知的塑膠殼體的延伸端 與USB金屬殼的組配步驟,藉此減少記憶體裝置之組裝 過程與時間。 本發月的目的及解決其技術問題是採用以下技術方 案來實現的。本發明揭示一種一體化整合通用串列匯流 排插頭之記隱體裝置,包含一基板、複數個接觸指、至 少一記憶體晶片、—控制器晶片…LED元件以及一封 5 201101459 膠體。該基板係具有-封膝表面、—外表面…插接側 以及-尾侧。該些接觸指係設置於該基板之該外表面並 朝向該插接側。該記憶體晶片、該控制器晶片與該㈣ 元件係皆設置於該基板之該封膠表面。該封膠體係完整 形成於該基板之該封膠表面,以同時密封該記憶體晶 片、該控制器晶片與該LED元件。 本發明的目的及解決其技術問題還可採用以下技術 措施進一步實現。201101459 VI. Description of the Invention: _ Technical Field of the Invention The present invention relates to electrical conduction connections, and more particularly to a memory device for integrated integrated universal serial bus bar plugs. [Prior Art] According to the rapid development of computer technology, computers have been widely used in life. However, electronic files in computers need to be archived, backed up or recorded by memory to facilitate people to carry and use, but old-style The 1.5-inch magnetic disk, optical disk and other memory products often have insufficient capacity, and have the disadvantages of being inconvenient and easy to be damaged in carrying, storing and using, so the manufacturer has developed a universal serial bus memory device (usually It can be called USB flash drive. It can quickly insert the universal queue bus memory device by using the hot plug function of the universal serial bus (USB) specification plug. It is located on the computer for data access and has a large storage capacity, which enhances the convenience of consumers. However, the fabrication method of the conventional tandem bus memory device is complicated to assemble and the volume is still too large. First, at least one memory package structure is disposed on a module substrate by surface mount (SMT) technology, and a series of bus bar plugs are soldered to one end of the module substrate. Conventional tandem busbar plugs are provided with a plurality of contact fingers on a plastic body and are covered with a metal shell. The module substrate is also covered with a plastic outer casing to form a device having a complete memory function. For example, the technology disclosed in the new patent certificate number M29 1052 of China, 3 201101459 • In another conventional tandem bus memory device, the module substrate can be integrated with the contact fingers to save one welding operation. Referring to FIG. 1 , the conventional serial bus memory device includes a module substrate 110 , a plurality of contact fingers 12 , at least one memory package structure 130 , and a plastic housing 140 . _ USB metal case 15〇 and a back cover 1 60. The module substrate 1 has an upper surface, a plug-in side ^^2, and an opposite tail side 1丨3. The contact fingers 2 are disposed on the upper surface 111 of the module substrate U0 and adjacent to the plug-in side 112, and the "remembered package structure 130 and a light-emitting diode 114 are also disposed in the mode The upper surface lu of the group substrate 110. The plastic housing 14 is used for fixing the module substrate 110 therein and is used for dustproofing. The plastic housing 140 must have an extended end 14 that can be fitted into the USB metal case 15b. The contact fingers 外2 are exposed to the extended end 141 to support the contact fingers 12〇. The USB metal shell 15 is configured to cover the extended end 141 of the plastic housing 140 and the portion of the module substrate 11 on which the contact fingers 120 are disposed to form a USB plug for plugging into a computer. USB slot to read/store data. The back cover 16 is coupled to the rear end of the plastic body 140 (ie, the tail side 113 of the module substrate 11) to prevent the module substrate 110 from coming off the rear end of the plastic case. However, this combination is a tight fit or adhesive relationship, and the module substrate 110 is liable to be loose and deformed, and the light-emitting diode is easily scratched. In addition, when the product is in the process of being repeatedly used, the module substrate 110 has a state of continuous friction and compression on one side of the contact fingers 12, so the support of the plastic case 14 The 201101459 USB metal case 丄 5. The cladding is indispensable, resulting in an inability to effectively reduce the volume and thickness of the universal serial bus memory device. Moreover, the universal serial bus memory device 1 does not need to undergo multiple surface bonding processing and housing assembly operations. SUMMARY OF THE INVENTION In order to solve the above problems, the main object of the present invention is to provide a memory device for integrally integrating a universal serial bus bar plug, which is capable of simultaneously sealing a memory chip and a controller by forming a gel. The chip and the LED component are used as the main body of the USB plug to achieve the integration of the integrated serial busbar plug. A second object of the present invention is to provide a memory device that integrally integrates a universal serial bus bar plug. Under the structural support of the sealant, the substrate provided with the contact fingers is more resistant to insertion and removal, and the sealant is completely formed on the substrate. Seal the surface to seal a variety of wafers and effectively use the substrate space. A further object of the present invention is to provide a memory device for integrally integrating a universal tandem bus bar plug, which can form a body-integrated universal serial bus bar plug in a relationship between a sealant and a substrate, without the need for conventional The plug soldering step also does not require a conventional assembly step of the extended end of the plastic housing and the USB metal shell, thereby reducing the assembly process and time of the memory device. The purpose of this month and the resolution of its technical problems are achieved using the following technical solutions. The invention discloses a hidden body device for integrally integrating a universal serial bus bar plug, comprising a substrate, a plurality of contact fingers, at least one memory chip, a controller chip, an LED component and a gel of 201101459. The substrate has a -hooked surface, an outer surface, a plug side, and a tail side. The contact fingers are disposed on the outer surface of the substrate and face the plug side. The memory chip, the controller chip and the (four) component are all disposed on the sealing surface of the substrate. The encapsulation system is completely formed on the surface of the encapsulant of the substrate to simultaneously seal the memory chip, the controller wafer and the LED element. The object of the present invention and solving the technical problems thereof can be further realized by the following technical measures.

❹ 在前述的記憶體裝置中,該LED元件係可藉由表面 接合技術電性連接該基板。 在前述的記憶體裝置中,該LED元件係鄰靠於該尾 側,以具有一不被該封膠體覆蓋而外露於該尾側之發光 表面。 在前述的記憶體裝置中,該封膠體係可為不透光。 在前述的記憶體裝置中,該LED元件係可鄰靠於該 基板在該插接側與該尾側之間的側邊,以具有一不被該 封膠體覆蓋之發光表面。 在前述的記憶體裝置中,該LED元件可為LEd晶片。 在前述的記憶體裝置中,該封膠體係可為透明或半透 明。 在前遂的記憶體裝置中,可另包含有複數個第一銲 線,係電性連接該控制器晶片至該基板。 在前述的記憶體裝置中,可另包含有複數個第二銲 線,係電性連接該記憶體晶片至該基板。 6 201101459 在前述的記憶體裝置中,該些接觸指係可由四個長條 狀的USB金手指所構成,而該封膠體係為長條體。 在前述的記憶體裝置中,可另包含有至少一被動元 件,係設置於該基板之該封膠表面並被該封膠體密封。 在前述的記憶體裝置中,該被動元件係可為晶片型。 在前述的記憶體裝置中’可另包含複數個轉接指,係 設置於該基板之該外表面並朝向該尾側。 在前述的記憶體裝置中,該封膠體係可完全對齊該基 ® 板之四周邊緣,以作為一通用串列匯流排插頭之主體, 以使該些接觸指、該基板用以設置該些接觸指之部位以 及該封膠體之對應部位之構成一體化整合為該通用_列 匯流排插頭。 由以上技術方案可以看出,本發明之一體化整合通用 串列匯流排插頭之記憶體裝置,具有以下優點與功效: -、利用封膠體完整形成於基板之封膠表面,使封膠體 Ο 能同時密封記憶體晶片、控制器晶片與LED元件並 作為USB插頭之主體,以取代習知usb插頭之塑 膠體並有效支擇在基板上之接觸指,防止該基板在 重覆插拔過程巾產生鬆動與變形的問題。此外,更 具有在微小型結構中光辨識讀寫之功效,並能以 C〇B(Chip⑽B〇ard,晶片在基板上)封裝製程簡化 組裝步驟,並可縮短製程時間進而提高機台生產速 度。 二、利用封膠體完整形成於基板 土双<封膠表面,在封膠體 7 201101459 的結構支撐下使得設有接觸指之基板更耐插拔,並 且封膝體完整形成於基板封膠表面,以密封多種晶 片’有效運用基板空間。 三、利用封膠體與基板之形成關係達到一體化整合通用 串列匯流排插頭,不需要習知的插頭焊接步驟,亦 不需要習知的塑膠殼體的延伸端與USB金屬殼的組 配步驟’藉此減少記憶體裝置之組裝過程與時間。 【實施方式】 © 以下將配合所附圖示詳細說明本發明之實施例,然應 注意的是,該些圖示均為簡化之示意圖,僅以示意方法 來說明本發明之基本架構或實施方法,故僅顯示與本案 有關之元件與組合關係,圖中所顯示之元件並非以實際 實施之數目、形狀、尺寸做等比例繪製,某些尺寸比例 與其他相關尺寸比例或已誇張或是簡化處理,以提供更 清楚的描述。實際實施之數目、形狀及尺寸比例為一種 Ο 選置性之設計,詳細之元件佈局可能更為複雜。 依據本發明之第一具體實施例,一種一體化整合通用 串列匯流排插頭之記憶體裝置說明於第2圖之立體示意 圖、第3圖之截面示意圖及第4圖之透視封膠體之立體 示意圖。該記憶體裝置200包含一基板21〇、複數個接 觸指220、至少一記憶體晶片23〇、一控制器晶片28〇、 一 LED元件240以及一封膠體250。 通常該基板210係具有雙面電性導通之印刷電路 板。該基板210係具有一封膠表面211、一外表面212、 8 201101459 一插接側213以及一尾側214,其中該封膠表面211係 用以設置該記憶體晶片230、該控制器晶片280與該Led 元件240並被該封膠體250所覆蓋,所謂「外表面」係 指不被該封膠體25 0所覆蓋之表面。該基板21〇之該封 膠表面211係形成有複數個内接墊215。該插接側213 其寬度約在11mm(公爱),可方便插接至一 USB插槽。 請參閱第2與3圖所示,該些接觸指22〇係設置於該 基板210之該外表面212並朝向該插接側213,該些接 ◎ 觸和220係顯露出’以作為該記憶體裝置2〇〇對外電性 接觸之USB介面端子。 該記憶體晶片230係設置於該基板210之該封膠表面 211。該記憶體晶片230係可為快閃記憶體晶片或非揮發 性記憶體晶片’不會因無電力供給而失去儲存資料。在 不同實施例中,能有多顆記憶體晶片230為並排或堆疊 方式設置於該基板210上。該控制器晶片28〇係設置於 Q 該基板2 1 0之該封膠表面211,用以控制該記憶體晶片 230之資料存取與讀寫。該LED元件240係設置於該基 板210之該封膠表面211並可鄰靠於該尾側214。更具 體地,該LED元件240的位置可鄰靠該尾側214之中央 或是兩側邊。該LED元件240可為晶片型態或是已封裝 型態;較佳地,該LED元件240是LED晶片,能在單 體化切割出該封膠體2 5 0時,即時會些許切割到該l E D 元件240而形成出上述切齊該尾侧214之發光表面 241’亦不會造成該LED元件240無法作動。在本實施 9 201101459❹ In the aforementioned memory device, the LED element can be electrically connected to the substrate by a surface bonding technique. In the above memory device, the LED element is adjacent to the trailing side to have a light-emitting surface that is not covered by the sealant and exposed on the trailing side. In the aforementioned memory device, the encapsulation system may be opaque. In the foregoing memory device, the LED element can be adjacent to a side of the substrate between the plug side and the trailing side to have a light emitting surface that is not covered by the sealant. In the aforementioned memory device, the LED element can be a LEd wafer. In the aforementioned memory device, the encapsulation system can be transparent or translucent. In the memory device of the front cymbal, a plurality of first bonding wires may be further included to electrically connect the controller wafer to the substrate. In the above memory device, a plurality of second bonding wires may be further included to electrically connect the memory wafer to the substrate. 6 201101459 In the aforementioned memory device, the contact fingers can be composed of four long strips of USB gold fingers, and the sealant system is a strip body. In the foregoing memory device, at least one passive component may be further disposed on the sealing surface of the substrate and sealed by the sealing body. In the aforementioned memory device, the passive component may be of a wafer type. In the foregoing memory device, a plurality of transfer fingers may be further included on the outer surface of the substrate and facing the tail side. In the foregoing memory device, the encapsulation system can be completely aligned with the peripheral edge of the base plate to serve as a main body of a universal serial bus bar plug, so that the contact fingers and the substrate are used to set the contacts. The part of the finger and the corresponding part of the sealant are integrated into the universal _ column bus plug. It can be seen from the above technical solution that the memory device integrated with the universal serial bus bar plug of the present invention has the following advantages and effects: - The sealing body is completely formed on the sealing surface of the substrate, so that the sealing body can be At the same time, the memory chip, the controller chip and the LED component are sealed and used as the main body of the USB plug to replace the plastic body of the conventional USB plug and effectively contact the contact fingers on the substrate to prevent the substrate from being repeatedly inserted and removed. Loose and deformed problems. In addition, it has the function of optical recognition and reading in micro-miniature structure, and can simplify the assembly process with C〇B (Chip(10)B〇ard, wafer on substrate) packaging process, and can shorten the processing time and increase the production speed of the machine. Second, the sealing body is completely formed on the surface of the substrate double < sealing surface, and under the structural support of the sealing body 7 201101459, the substrate with the contact finger is more resistant to insertion and removal, and the sealing body is completely formed on the surface of the substrate sealing. To seal a variety of wafers 'effective use of substrate space. Third, the use of the formation of the sealant and the substrate to achieve integrated integration of the universal serial bus plug, does not require a conventional plug soldering step, and does not require the conventional plastic shell extension end and USB metal shell assembly steps 'This reduces the assembly process and time of the memory device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The embodiments of the present invention will be described in detail below with reference to the accompanying drawings in which FIG. Therefore, only the components and combinations related to the case are shown. The components shown in the figure are not drawn in proportion to the actual number, shape and size of the actual implementation. Some ratios of dimensions and other related dimensions are either exaggerated or simplified. To provide a clearer description. The actual number, shape and size ratio of the implementation is a choice of Ο option, and the detailed component layout may be more complicated. According to a first embodiment of the present invention, a memory device for integrally integrating a universal serial bus bar plug is illustrated in a perspective view of FIG. 2, a cross-sectional view of FIG. 3, and a perspective view of a see-through encapsulant of FIG. . The memory device 200 includes a substrate 21, a plurality of contact fingers 220, at least one memory chip 23A, a controller wafer 28A, an LED component 240, and a gel 250. Typically, the substrate 210 is a printed circuit board that is electrically conductive on both sides. The substrate 210 has a glue surface 211, an outer surface 212, a 201101459, a plug side 213, and a tail side 214. The seal surface 211 is used to set the memory chip 230 and the controller chip 280. The Led element 240 is covered by the encapsulant 250, and the "outer surface" means a surface that is not covered by the encapsulant 25 0. The sealing surface 211 of the substrate 21 is formed with a plurality of internal pads 215. The plug side 213 has a width of about 11 mm (public) and can be easily plugged into a USB slot. Referring to FIGS. 2 and 3, the contact fingers 22 are disposed on the outer surface 212 of the substrate 210 and face the insertion side 213, and the contacts and the 220 series are exposed to serve as the memory. The body device 2 is a USB interface terminal for external electrical contact. The memory chip 230 is disposed on the sealing surface 211 of the substrate 210. The memory chip 230 can be a flash memory chip or a non-volatile memory chip' without losing stored data due to no power supply. In various embodiments, a plurality of memory chips 230 can be disposed on the substrate 210 in a side-by-side or stacked manner. The controller chip 28 is disposed on the sealing surface 211 of the substrate 210 to control data access and reading and writing of the memory chip 230. The LED element 240 is disposed on the encapsulation surface 211 of the substrate 210 and can abut the tail side 214. More specifically, the LED element 240 can be positioned adjacent to the center or both sides of the trailing side 214. The LED element 240 can be in a wafer type or a packaged state. Preferably, the LED element 240 is an LED chip, and can be cut into a small amount when the encapsulant 2 500 is singulated. The formation of the ED element 240 to illuminate the light-emitting surface 241' of the tail side 214 does not cause the LED element 240 to be inoperable. In this implementation 9 201101459

例中’該記憶體晶片230與該控制器晶片28〇可利用導 電或非導電黏著材料固定於該基板21〇之該封膠表面 2Π上。此外,該LED元件240係藉由表面接合技術電 性連接該基板21〇,相較於覆晶接合或打線方式可以較 容易去控制該LED元件240的發光方向。當該led元 件240係鄰靠於該尾側214,可具有一不被該封膠體25〇 覆蓋而外露於該尾侧214之發光表面241,以供該led 元件240之光線射出,故該封膠體25〇係可為不透光性, 一般為黑色。請參閱第3與4圖所示,該記憶體裝置2〇〇 係可另包含有至少—第一銲線261 ’係電性連接該控制 器晶片280至該基板210。而該記憶體晶片23〇係可藉 由複數個第二銲線262以電性連接該記憶體晶片23〇至 該基板210之對應内接墊215,故可在同—道的打線製 程完成該記憶體晶片230與該控制器晶片28〇之電性連 接。 較佳地,該記憶體裝置200可另包含有至少一被動元 件270,其係設置於該基板21〇之該封膠表面2ιι並被 該封膠體250密封,故該記憶體裝置2〇〇所需要的主被 動元件皆被該封膠體250所密封,以具有避免被碰傷的 一體性。在本實施例中,該被動元件27〇係可為晶片型。 請參閱第2及3圖所示,該封膠體25〇係完整形成於 該基板210之該封膠表面211,以同時密封該記憶體晶 片230、該控制器晶片28〇與該LED元件24〇。在一具 體結構中,該封膠體250可達到完全對齊該基板21〇之 10 201101459 四周邊緣’例如,該封膠體250係可為轉移成形(transfer molding)技術形成,並經切割之後可使該記憶體裝置2〇〇 為微小型磚塊狀,該封膠體250之兩端剛好延伸至該插 接側213與該尾側214,並完全密封該封膠表面211 ^該 封膠體250模封固化後具有良好的硬度、電絕緣性與包 覆性’在該封膠體250的結構支撐下使得該基板21〇更 对插拔,並且該封膠體25 0可密封多種晶片並為一體密 封,有效運用基板空間。通常合計該封膠體25〇與該基 ^ 板210的總厚度約為(公釐),以提供良好的強度 支持’並使該記憶體裝置200具有結構小型化、輕薄短 小、方便攜帶及使用便利之功效。 因此,利用該封膠體250完整形成於該基板21〇之封 膠表面211與完全對齊該基板210之四周邊緣,使該封 膠體能同時密封該記憶體晶片230、該控制器晶片28〇 與該LED元件240並作為USB插頭之主體,以取代習 ◎ 知USB插頭之塑膠體並有效支撐在基板上之接觸指。藉 此’提供一體化整合之通用串列匯流排插頭(即由該些接 觸指220、該基板210包含該插接側213用以設置該此 接觸指之部位以及該封膠體250之對應部位所構成),防 止該基板210在重覆插拔過程中產生鬆動與變形的問 題’不需要另行設計具有支撐條的專用外殼也不會有對 不準的鬆脫問題。此外’更具有在微小型結構中光辨識 讀寫之功效,並能以COB(Chip on Board ’晶片在基板上) 封裝製程簡化組裝步驟’並可縮短製程時間進而提高機 11 201101459 台生產速度。 在使用上,該記憶體裝置200可直接插接至一電腦主 機之A型USB插座,以完成資訊聯結,由於USB插頭 之傳輸介面係支援熱插拔之功能,故插置完成後,電腦 主機即可讀取到該記憶體裝置200之訊號,如此,即可 使電腦主機中之資料傳遞到記憶體裝置200中,或將記 憶體裝置200之資料傳遞到電腦主機中。 本發明之記憶體裝置200僅需要半導體封裝技術便 能製造一體化整合之通用串列匯流排插頭,並具有在微 小型結構中光辨識讀寫之功效,以避免該led元件 被碰傷。在本實施例中,該封膠體25〇係可為透明或半 透明之膠體’以使該LED元件240之光線射出。在 之實施例中,該封膠體 250係可進一步混合有各種顏料 料。 〇 曰一」 (黃色或藍色)等可改變顏色之半透明混合式封裝材In the example, the memory chip 230 and the controller wafer 28 can be fixed on the sealing surface 2 of the substrate 21 by using a conductive or non-conductive adhesive material. In addition, the LED element 240 is electrically connected to the substrate 21 by surface bonding technology, and the light emitting direction of the LED element 240 can be easily controlled compared to the flip chip bonding or wire bonding method. When the LED element 240 is adjacent to the tail side 214, it may have a light-emitting surface 241 not covered by the sealant 25 外 and exposed on the tail side 214 for the light of the LED element 240 to be emitted. The colloidal 25 oxime can be opaque, generally black. Referring to Figures 3 and 4, the memory device 2 can further include at least a first bonding wire 261' electrically connected to the controller wafer 280 to the substrate 210. The memory chip 23 can electrically connect the memory chip 23 to the corresponding internal pad 215 of the substrate 210 by a plurality of second bonding wires 262, so that the wire bonding process can be completed in the same wire bonding process. The memory chip 230 is electrically connected to the controller chip 28A. Preferably, the memory device 200 further includes at least one passive component 270 disposed on the sealing surface 2 ι of the substrate 21 and sealed by the sealing body 250, so the memory device 2 The required active and passive components are sealed by the sealant 250 to have an integrality that avoids being scratched. In this embodiment, the passive component 27 can be of a wafer type. Referring to FIGS. 2 and 3, the encapsulant 25 is completely formed on the encapsulation surface 211 of the substrate 210 to simultaneously seal the memory chip 230, the controller wafer 28, and the LED element 24 . In a specific configuration, the encapsulant 250 can be fully aligned with the periphery of the substrate 21 201101459. For example, the encapsulant 250 can be formed by a transfer molding technique and can be cut after being cut. The body device 2 is a micro-miniature brick block, and the two ends of the sealant 250 extend just to the plug-side side 213 and the tail side 214, and completely seal the sealant surface 211. After the sealant 250 is molded and cured It has good hardness, electrical insulation and coating property. Under the structural support of the encapsulant 250, the substrate 21 is more inserted and removed, and the encapsulant 25 0 can seal various wafers and be integrally sealed, effectively using the substrate. space. Generally, the total thickness of the sealant 25 〇 and the base plate 210 is about (mm) to provide good strength support, and the memory device 200 has a small structure, is light and thin, and is convenient to carry and use. The effect. Therefore, the encapsulant 250 is completely formed on the sealing surface 211 of the substrate 21 and completely aligned with the peripheral edge of the substrate 210, so that the encapsulant can simultaneously seal the memory chip 230, the controller wafer 28 and the The LED element 240 serves as the main body of the USB plug to replace the plastic body of the USB plug and to effectively support the contact fingers on the substrate. Thereby providing an integrated integrated universal serial bus plug (ie, by the contact fingers 220, the substrate 210 includes the plug-side 213 for setting the portion of the contact finger and the corresponding portion of the sealant 250 The problem is that the substrate 210 is prevented from being loosened and deformed during the repeated insertion and removal process. There is no need to separately design a dedicated outer casing having a support strip, and there is no problem of looseness. In addition, it has the function of optical recognition and reading in micro-miniature structure, and can simplify the assembly process with COB (Chip on Board's on-substrate) packaging process, and can shorten the processing time and increase the production speed of machine 11 201101459. In use, the memory device 200 can be directly plugged into a type A USB socket of a computer host to complete the information connection. Since the transmission interface of the USB plug supports the hot plug function, after the insertion is completed, the host computer The signal of the memory device 200 can be read, so that the data in the host computer can be transferred to the memory device 200, or the data of the memory device 200 can be transferred to the host computer. The memory device 200 of the present invention only needs semiconductor packaging technology to manufacture an integrated integrated universal busbar plug, and has the function of optical recognition and reading in a micro-structure to avoid the LED component being bumped. In this embodiment, the encapsulant 25 can be a transparent or translucent gel to emit light from the LED element 240. In an embodiment, the encapsulant 250 can be further mixed with various pigment materials. Translucent hybrid packaging material that can change color, such as 曰 」 」 (yellow or blue)

一電源供應器所提供之工作電壓及電 22〇係依據USB規格而定型與排列。 12 201101459 . 在上述之記憶體裝置200之製造過程中,如第5圖所 示,複數個基板210係以矩陣排列方式一體連接於一基 板條20上。如第4圖所示,並可在每一基板21〇上設 置該§己憶艎a曰片230、該控制器晶片280與該[ED元件 240,或可更加設置該被動元件270〇如第4與5圖所 示,在形成封膠體之過程中,一模封膠層可連續覆蓋所 有的基板210的封膠表面211’以同時密封每一基板21〇 上的該3己憶體晶片230、該控制器晶片280、該LED元 〇 件240以及該第一銲線261與該些第二銲線262,甚至 該被動元件270,再利用雷射或鋸切技術切割該基板條 20與該模封膠層,以使每一基板21〇(包含對應的封膠 體25 0)單體化,可獲得複數個可發光之記憶體裝置 2 0 0,藉以簡化製程步驟以及縮短製程時間進而提高機 台生產速度。在此一較佳結構之製造過程中’可以在大 面積模封之後以線性鋸切方式得到該記憶體裝置2〇〇。 ❹ 故本發明之記憶體裝置200能採用c〇B(Chip cmThe operating voltage and power supplied by a power supply are shaped and arranged according to the USB specification. 12 201101459. In the manufacturing process of the above-described memory device 200, as shown in Fig. 5, a plurality of substrates 210 are integrally connected to a substrate strip 20 in a matrix arrangement. As shown in FIG. 4, the § 艎 艎 230 230 230, the controller wafer 280 and the [ED component 240 may be disposed on each substrate 21 ,, or the passive component 270 may be further disposed. As shown in FIGS. 4 and 5, in the process of forming the sealant, a mold seal layer can continuously cover all of the seal surface 211' of the substrate 210 to simultaneously seal the 3 memory wafer 230 on each substrate 21? The controller chip 280, the LED element member 240, the first bonding wire 261 and the second bonding wires 262, and even the passive component 270, are further cut by a laser or sawing technique. The molding layer is formed so that each substrate 21〇 (including the corresponding sealing body 25 0) is singulated, and a plurality of illuminable memory devices 200 can be obtained, thereby simplifying the process steps and shortening the processing time and thereby improving the machine. Taiwan production speed. In the manufacturing process of this preferred structure, the memory device 2 can be obtained by linear sawing after extensive molding. Therefore, the memory device 200 of the present invention can adopt c〇B (Chip cm)

Board,晶片在基板上)封裝製程,能將讀取、儲存及指 不燈功能整合於半導體封裝作業,大幅簡化組裝步驟, 並可縮短製程時間進而提高機台生產速度,以提高產 量。在本實施例中,請再參閱第2與5圖所示,經單體 化裁切後之該記憶體裝置200,即可構成一體化整合之 USB插頭,直接可作為usb隨身碟,符合電子產品之 小型化設計理念’並具有方便攜帶、使用,不佔用空間 之優點。 13 201101459 . 在本發明之第二具體實施例中’如第6圖所示,另一 種記憶體裝置300主要包含一基板210、複數個接觸指 220、至少一記憶體晶片230、一控制器晶片28〇、一 LED元件240以及一封膠體250。其中與第一實施例相 同的主要元件將以相同符號標示,並具有上述之相同作 用,在此不再予以贅述。 在本實施例中,該記憶體裝置300可另包含複數個轉 接指390,其係設置於該基板210之該外表面212並朝 〇 向該尾側214。該些轉接指390係為該些接觸指220之 擴充端子,具有集線器(HUB)作用,用以電性連接另一 通用串列匯流排記憶體裝置之接觸指,故該記憶體裝置 3 00可用以串接其他之通用串列匯流排裝置。特別是, 當多個通用串列匯流排記憶體裝置串接時,位於後方之 記憶體裝置300之該些接觸指220可電性接觸至一位於 前方通用串列匯流排記憶體裝置300之該些轉接指 〇 390,其串接方式係為正反面的交錯插接,達到記憶體 的延伸擴充並易於更換。 此外’在本發明之第三具體實施例中,如第7圖所 示’另一種記憶體裝置與第一具體實施例之記憶體裝置 2 00大致相同,亦包含有該基板21〇、該些接觸指22〇、 該記憶體晶片230、該控制器晶片280、該LED元件240 以及封膠體(圖中未繪出)與相雷同的組合關係。其中, 該LED元件240係鄰靠於該基板2 1 0在該插接侧2 1 3 與該尾側214之間的侧邊,以具有一不被封膠體覆蓋之 14 201101459 發光表面241,藉以達到利用側面 樓欣口 $方式進行讀®、富 算之簡易目視辨識之功效。 s ”運 以上所述,僅是本發明的較佳實施例而已並 發明作任何形式上的限制,雖然 赏明已以較佳實施例 如上’然而並非用以限定本發明,任何熟悉本項技 術者,在不脫離本發明之技術範圍内,所作的任何簡單 文等效性變化與修飾,均仍屬於本發明的技術範圍 内。 ΟBoard, wafer on the substrate) package process, can integrate the reading, storage and non-lighting functions into the semiconductor packaging operation, greatly simplifying the assembly process, and shortening the processing time and increasing the production speed of the machine to increase production. In this embodiment, please refer to the second and fifth figures. After the singulation, the memory device 200 can form an integrated USB plug, which can be directly used as a USB flash drive and conforms to the electronic device. The product's miniaturized design concept 'has the advantages of being easy to carry and use without taking up space. 13 201101459. In a second embodiment of the present invention, as shown in FIG. 6, another memory device 300 mainly includes a substrate 210, a plurality of contact fingers 220, at least one memory chip 230, and a controller chip. 28〇, an LED element 240 and a colloid 250. The same elements as those in the first embodiment will be denoted by the same reference numerals and have the same functions as described above, and will not be described again. In this embodiment, the memory device 300 can further include a plurality of transfer fingers 390 disposed on the outer surface 212 of the substrate 210 and facing the tail side 214. The transfer fingers 390 are the expansion terminals of the contact fingers 220 and have a hub (HUB) function for electrically connecting the contact fingers of another universal serial bus memory device, so the memory device 3 00 It can be used to cascade other general-purpose serial bus devices. In particular, when a plurality of universal serial bus memory devices are connected in series, the contact fingers 220 of the memory device 300 at the rear can be electrically contacted to a front-side universal bus memory device 300. The transfer fingers 390 are connected in a staggered manner to the front and back of the interleaved plug to achieve extended extension of the memory and are easy to replace. In addition, in the third embodiment of the present invention, as shown in FIG. 7, the other memory device is substantially the same as the memory device 200 of the first embodiment, and includes the substrate 21, The contact fingers 22, the memory chip 230, the controller wafer 280, the LED element 240, and the encapsulant (not shown) are in a similar combination with each other. The LED element 240 is adjacent to the side of the substrate 2 1 0 between the plug-in side 2 1 3 and the tail side 214 to have a 14201101459 light-emitting surface 241 not covered by the sealant. Achieve the use of the side of the building, the mouth of the way to read ®, the calculation of the simple visual recognition of the rich. The above description is only a preferred embodiment of the present invention and has been made in any form and limitation, although the invention has been described as being preferred, but not intended to limit the invention, any of which is familiar with the present technology. Any simple change and modification of the equivalents made within the technical scope of the present invention are still within the technical scope of the present invention.

【圖式簡單說明】 第 1 展| . •習知通用串列匯流排記憶體裝置之元件分解之 立體示意圖。 第2圖:依據本發明之第一具體實施例,一種一體化整 合通用串列匯流排插頭之記憶體裝置之立體示 意圖。 楚 , 圖:依據本發明之第一具體實施例,該記憶體裝置 之截面示意圖。 笼 Λ 圖:依據本發明之第一具體實施例,該記憶體裝置 透視封膠體之立體示意圖。 第5圖:依據本發明之第一具體實施例,該記憶體裝置 之基板形成於一基板條之平面示意圖 第6圖:依據本發明之第二具體實施例,〆種一體化整 合通用串列匯流排插頭之記憶體装置之截面示 意圖。 第7圖:依據本發明之第三具體實施例,〆種一體化整 15 201101459 合通用串列匯流排插頭之記憶體裝置透視封其 膠體之立體示意圖。 【主要元件符號說明】 20 基板條 Ο[Simple description of the diagram] The first exhibition | . • The schematic diagram of the component decomposition of the conventional serial bus memory device. Figure 2 is a perspective view of a memory device incorporating an integrated serial bus bar plug in accordance with a first embodiment of the present invention. Figure 1 is a schematic cross-sectional view of the memory device in accordance with a first embodiment of the present invention. Cage Figure: A perspective view of a perspective view of the memory device in accordance with a first embodiment of the present invention. FIG. 5 is a plan view showing a substrate of the memory device formed on a substrate strip according to a first embodiment of the present invention. FIG. 6 is a schematic view of the second embodiment of the present invention. A schematic cross-sectional view of a memory device of a bus bar plug. Figure 7 is a perspective view showing the colloid of the memory device of the universal serial bus bar plug according to the third embodiment of the present invention. [Main component symbol description] 20 substrate strip Ο

100 通用 串列匯流排記 憶 體 裝 置 110 模組 基板 111 上 表 面 112 插 接 側 113 尾側 114 發 光 二 極 體 120 接觸 指 130 記 憶 體 封 裝構造 140 塑膠 殼體 141 延 伸 端 150 USB 金屬殼 160 後 蓋 200 記憶 體裝置 210 基板 211 封 膠 表 面 212 外 表 面 213 插接 側 214 尾 側 215 内 接 墊 220 接觸 指 230 記 憶 體 晶 片 240 LED 元件 241 發 光 表 面 250 封 膠 體 261 第一 銲線 262 第 二 銲 線 270 被動 元件 280 控 制 器 晶 片 300記憶體裝置 390轉接指 16100 universal serial bus memory device 110 module substrate 111 upper surface 112 plug side 113 tail side 114 light emitting diode 120 contact finger 130 memory package structure 140 plastic case 141 extended end 150 USB metal case 160 back cover 200 memory device 210 substrate 211 sealing surface 212 outer surface 213 plug side 214 tail side 215 inner pad 220 contact finger 230 memory chip 240 LED element 241 light emitting surface 250 sealing body 261 first bonding wire 262 second bonding wire 270 passive component 280 controller chip 300 memory device 390 adapter finger 16

Claims (1)

201101459 七、申請專利範圍: 1、 一種一體化整合通用串列匯流排插頭之記憶體裝 置,包含: 一基板’係具有一封膠表面、一外表面、一插接側 以及一尾侧; 複數個接觸指,係設置於該基板之該外表面並朝向 該插接側; 至少一 §己憶體晶片’係設置於該基板之該封膠表面; ® 一控制器晶片’係設置於該基板之該封膠表面; 一 LED元件,係設置於該基板之該封膠表面;以及 一封膠體,係完整形成於該基板之該封膠表面,以 同時密封該記憶體晶片、該控制器晶片與該led 元件。 2、 如申請專利範圍第丨項所述之一體化整合通用争列 匯流排插頭之記憶體裝置,其中該LED元件係藉由 〇 表面接合技術電性連接該基板。 3、 如中請專利範•圍第1項所述之一體化整合通用_列 匯流排插頭之記憶體裝置,其巾該LED元件係鄰靠 於該尾侧,以具有一不被該封膠體覆蓋而外露於該 尾側之發光表面。 、以 4、 如申請專利範圍第3項所述之-體化整合通用串列 匯流排插頭之記憶體裝置,其中該封膠體係為不透 光。 5、 如中請專利範圍第1項所述之-體化整合通用串列 17 201101459 ^流排插頭之記憶體裝置,其中該LED元件係鄰靠 . 於該基板在該插接侧與該尾侧之間的側邊,以具有 一不被該封膠體覆蓋之發光表面。 6 Ή請專利範圍第3 $ 5項所述之—體化整合通用 串列匯流排插頭之記憶體裝置,其中該LED元件是 LED晶片。 7如申請專利範圍第1項所述之一體化整合通用串列 匯流排插頭之記憶體裝置,其中該封膠體係為透明 ^ 或半透明。 8如申凊專利範圍第1項所述之一體化整合通用串列 匯流排插頭之記憶體裝置,另包含有複數個第一銲 線,係電性連接該控制器晶片至該基板。 9如申請專利範圍第8項所述之一體化整合通用串列 匯流排插頭之記憶體裝置,另包含有複數個第二銲 線,係電性連接該記憶體晶片至該基板。 〇 10、如申請專利範圍第1項所述之一體化整合通用串 列匯流排插頭之記憶體裝置,其中該些接觸指係由 四個長條狀的USB金手指所構成,而該封膠體係為 長條體。 Π、如申請專利範圍第1項所述之一體化整合通用串列 匯流排插頭之記憶體裝置,另包含有至少一被動元 件’係設置於該基板之該封膠表面並被該封膠體密 封。 如申5月專利範圍第11項所述之一體化整合通用串 18 201101459 件係為 列匯流排插頭之記憶體裝置,其中該被動元 晶片型。 13、 如申請專利範圍第1 祀因乐1項所述之一體化整合通用 列匯流排插頭之記憶體奘 _ . λ k媸裝置,另包含複數個轉接 指,係設置於該基板之該外表面並朝向該尾側。 Ο 14、 如申請專利範圍帛!項所述之一體化整合通用串 列匯流排插頭之記憶體裝置,其中該封膠體係完全 對齊該基板之四周邊緣’以作為一通用串列匯流排 插頭之主體’以使該些接觸指、該基板用以設置該 些接觸指之部位以及該封膠體之對應部位之構成一 體化整合為該通用串列匯流排插頭。 ❹ 19201101459 VII. Patent application scope: 1. A memory device integrated with a universal serial bus bar plug, comprising: a substrate having a rubber surface, an outer surface, a plug side and a tail side; a contact finger is disposed on the outer surface of the substrate and faces the plug-in side; at least one of the memory wafers is disposed on the sealing surface of the substrate; a controller wafer is disposed on the substrate The LED surface is disposed on the surface of the sealing material of the substrate; and a gel is integrally formed on the sealing surface of the substrate to simultaneously seal the memory chip and the controller wafer With the led component. 2. The memory device of the integrated integrated universal busbar plug as described in the scope of the patent application, wherein the LED component is electrically connected to the substrate by a surface bonding technique. 3. The memory device of the integrated integrated general-purpose bus bar plug according to the first aspect of the patent, wherein the LED element is adjacent to the tail side to have a sealant. Covering the exposed surface of the light emitting surface. 4. A memory device for integrating a universal serial bus bar plug as described in claim 3, wherein the sealant system is opaque. 5. The memory device of the plug-in plug according to the first embodiment of the patent scope, wherein the LED component is adjacent to the substrate, and the substrate is on the plugged side and the tail. The sides between the sides have a light-emitting surface that is not covered by the sealant. 6 记忆 专利 专利 专利 专利 第 第 第 第 第 第 第 第 第 第 第 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆 记忆7. The memory device of the integrated universal serial bus plug according to claim 1, wherein the sealing system is transparent ^ or translucent. 8. The memory device of the integrated integrated serial bus bar plug according to claim 1, further comprising a plurality of first bonding wires electrically connected to the controller chip to the substrate. 9. The memory device of the integrated integrated serial bus bar plug according to claim 8 of the patent application, further comprising a plurality of second bonding wires electrically connecting the memory chip to the substrate. The memory device of the integrated integrated serial bus bar plug according to claim 1, wherein the contact fingers are composed of four elongated USB gold fingers, and the sealant The system is a long strip. The memory device of the integrated integrated serial bus bar plug according to claim 1, further comprising at least one passive component disposed on the sealing surface of the substrate and sealed by the sealing body . For example, the integrated integrated universal string 18 201101459 described in the scope of the patent scope of the fifth aspect is a memory device of the bus bar plug, wherein the passive chip type. 13. The memory device 一体化 _ λ k媸 device of the integrated integrated universal bus bar plug according to the first paragraph of the patent application, the λ k媸 device, further comprising a plurality of transfer fingers, disposed on the substrate The outer surface faces the tail side. Ο 14, such as the scope of application for patents! The memory device integrated with the universal serial bus bar plug, wherein the encapsulation system is completely aligned with the peripheral edge of the substrate as a body of a universal serial bus bar plug to enable the contact fingers, The substrate is configured to integrally form the portion of the contact finger and the corresponding portion of the sealant into the universal serial bus bar plug. ❹ 19
TW098120735A 2009-06-19 2009-06-19 Memory device with integrally combining a USB plug TW201101459A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102723101A (en) * 2011-01-31 2012-10-10 马丁·库斯特 External storage device
CN102931162A (en) * 2011-08-10 2013-02-13 群丰科技股份有限公司 Packaging structure and manufacturing method thereof
US9418964B2 (en) 2012-01-05 2016-08-16 Via Technologies, Inc. Chip package structure

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102723101A (en) * 2011-01-31 2012-10-10 马丁·库斯特 External storage device
TWI506530B (en) * 2011-01-31 2015-11-01 Martin Kuster External storage device
CN102931162A (en) * 2011-08-10 2013-02-13 群丰科技股份有限公司 Packaging structure and manufacturing method thereof
US9418964B2 (en) 2012-01-05 2016-08-16 Via Technologies, Inc. Chip package structure

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